; -------------------------------------------------------------------------------- ; @Title: RCARV2H On-Chip Peripherals ; @Props: Released ; @Author: ADP, KKW ; @Changelog: 2015-10-28 KKW ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: 2014-12_R-Car-Gen2_Common_HWManual-Rev1.02.pdf ; 2014-12-31 R-Car-V2H_Specific_HWManual_Rev0.9.pdf ; @Core: Cortex-A15MPCore ; @Chip: R8A7792X ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perrcarv2h.per 14376 2022-02-24 11:15:06Z kwisniewski $ config 16. 8. tree "Core Registers (Cortex-A15MPCore)" ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- width 10. tree "ID Registers" group.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..." endif rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..." rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" textline " " bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4" rgroup.long c15:0x400++0x0 line.long 0x0 "MIDR2,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x700++0x0 line.long 0x0 "MIDR3,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." endif rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..." endif rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..." bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." textline " " bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented" textline " " bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" textline " " bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" textline " " bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" endif tree.end width 12. tree "System Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" textline " " bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled" bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified" bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented" bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented" textline " " bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled" bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced" bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced" bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes" textline " " bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes" bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes" bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes" textline " " bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes" bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled" bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced" textline " " bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited" bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed" bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed" textline " " bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced" bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced" bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes" textline " " bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled" bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes" bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes" textline " " bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited" bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes" bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes" bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes" bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches" textline " " bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes" textline " " bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x140F++0x00 line.long 0x0 "ACTLR2,Auxiliary Control Register 2" bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled" bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled" textline " " else hgroup.long c15:0x140F++0x00 hide.long 0x0 "ACTLR2,Auxiliary Control Register 2" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" endif group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled" bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes" textline " " bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" textline " " bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" endif group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address" textline " " rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" else hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x1609))&0x3)==0x3) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes" bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" textline " " bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x2) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" textline " " bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x1) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" textline " " bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x0) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " endif group.long c15:0x410F++0x00 line.long 0x00 "FILASTARTR,Peripheral port start address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region" bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid" group.long c15:0x420F++0x00 line.long 0x00 "FILAENDR,Peripheral port end address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") hgroup.long c15:0x1609++0x00 hide.long 0x00 "SCUCTLR,SCU Control Register" hgroup.long c15:0x410F++0x00 hide.long 0x00 "FILASTARTR,Peripheral port start address register" hgroup.long c15:0x420F++0x00 hide.long 0x00 "FILAENDR,Peripheral port end address register" endif tree.end width 12. tree "Memory Management Unit" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " endif if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes" bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes" textline " " bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1" bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7" endif textline " " group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." endif endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" else hgroup.long c15:0x0015++0x00 hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif endif group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA" hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable" bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred" textline " " bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved" textline " " bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable" bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate" textline " " bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate" bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection" bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..." textline " " bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " endif if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x003A++0x00 hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x013A++0x00 hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" endif else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" textline " " bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " endif if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif textline " " if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier" hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hyp Software Thread ID Register" tree.end width 15. tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x0 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hyp Configuration Register" bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system" bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted" bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override" bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override" textline " " bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hyp Debug Control Register" bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid" textline " " bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid" textline " " bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register" bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped" textline " " bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hyp System Trap Register" bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled" bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped" textline " " bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped" bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped" bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped" textline " " bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped" bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped" bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped" textline " " bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped" bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped" bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped" textline " " bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped" bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped" bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped" textline " " bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hyp Translation Table Base Register" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hyp Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved" bitfld.long 0x00 4. " S ,Sign extension bit" "0,1" bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" endif group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hyp Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..." textline " " bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hyp IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits" textline " " hgroup.long c15:0x407++0x00 hide.long 0x00 "NOP,No Operation Register" in wgroup.long c15:0x17++0x00 line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x617++0x00 line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x57++0x00 line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x157++0x00 line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x457++0x00 line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x657++0x00 line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x757++0x00 line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x167++0x00 line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x267++0x00 line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write" wgroup.long c15:0x1a7++0x00 line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x2a7++0x00 line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x4a7++0x00 line.long 0x00 "CP15DSB,Data Synchronization Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x5a7++0x00 line.long 0x00 "CP15DMB,Data Memory Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x1b7++0x00 line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x1e7++0x00 line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x2e7++0x00 line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,Invalidate instruction TLB" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,Invalidate data TLB" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,Invalidate unified TLB" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" else hgroup.long c15:0x403A++0x00 hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x413A++0x00 hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" endif group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hyp Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address" tree.end width 12. tree "Cache Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..." bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..." endif group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c15:0x10EF++0x00 line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved" else hgroup.long c15:0x10EF++0x00 hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" endif tree "Level 1 memory system" width 10. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x004F++0x00 line.long 0x00 "RAMINDEX,RAM Index Register" hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier" bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" textline " " group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High" bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High" bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High" textline " " bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High" bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High" hexmask.long 0x00 0.--26. 1. " TA ,Tag Address" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long 0x00 6.--30. 1. " SI ,Set index" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--15. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--16. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--17. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--18. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--19. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--20. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" else hgroup.long c15:0x314F++0x0 hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" endif if (((d.l(c15:0x324F))&0x100)==0x100) wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" else wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" endif endif tree.end tree "Level 2 memory system" width 11. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" textline " " bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled" bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid" textline " " bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle" textline " " bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191." rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes" bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes" bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced" bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced" bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled" bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes" bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes" bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes" textline " " bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes" bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled" bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes" textline " " bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes" bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes" textline " " bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled" bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes" group.long c15:0x130F++0x00 line.long 0x00 "L2PFR,L2 Prefetch Control Register" bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes" bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled" bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes" textline " " bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines" textline " " group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" hgroup.quad c15:0x110F0++0x01 hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes" rgroup.long c15:0x1609++0x00 line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register" bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1" bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location" textline " " bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA" bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid" endif tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" textline " " bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" textline " " bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes" bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes" bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes" bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes" textline " " bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed" bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled" tree.end width 12. tree "System Timer Register" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline " " bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline "" group.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" textline "" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" textline "" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" tree.end width 11. width 15. tree "Debug Registers" rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" textline " " hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") wgroup.long c14:6.++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" endif group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled" group.long c14:9.++0x0 line.long 0x00 "DBGECR,Debug Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group.long c14:32.++0x0 line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Debug Instruction Transfer Register" rgroup.long c14:33.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif endif wgroup.long c14:35.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" textline " " bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request" bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled" bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" endif rgroup.long c14:40.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..." rgroup.long c14:41.++0x0 line.long 0x00 "DBGCIDSR,DBGCIDSR" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register" bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure" bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated" hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,DBGVIDSR" endif width 15. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register" bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High" bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High" bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High" bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register" bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High" bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High" bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c14:959.++0x0 line.long 0x00 "DBGITISR,Debug Integration Input Status Register" bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High" bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High" bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " rgroup.long c14:959.++0x0 line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register" bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High" bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) rgroup.quad c14:128.++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address" bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.quad c14:256.++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" else rgroup.long c14:128.++0x0 line.long 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address" bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.long c14:256.++0x0 line.long 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" endif group.long c14:195.++0x00 line.long 0x00 "DBGOSDLR,OS Double Lock Register" bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked" else hgroup.quad c14:128.++0x1 hide.quad 0x0 "DBGDRAR,Debug ROM Address Register" hgroup.quad c14:256.++0x1 hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hgroup.long c14:195.++0x00 hide.long 0x00 "DBGOSDLR,OS Double Lock Register" endif wgroup.long c14:192.++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:193.++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..." group.long c14:196.++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High" bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset" bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High" bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High" bitfld.long 0x00 4. " HALTED ,Halted" "Low,High" textline " " bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High" bitfld.long 0x00 2. " RS ,Reset Status" "Low,High" bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High" textline " " bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High" tree "Processor ID registers" rgroup.long c14:(832.+0.)++0x00 line.long 0x00 "PIDR0,Processor ID register 0" rgroup.long c14:(832.+1.)++0x00 line.long 0x00 "PIDR1,Processor ID register 1" rgroup.long c14:(832.+2.)++0x00 line.long 0x00 "PIDR2,Processor ID register 2" rgroup.long c14:(832.+3.)++0x00 line.long 0x00 "PIDR3,Processor ID register 3" rgroup.long c14:(832.+4.)++0x00 line.long 0x00 "PIDR4,Processor ID register 4" rgroup.long c14:(832.+5.)++0x00 line.long 0x00 "PIDR5,Processor ID register 5" rgroup.long c14:(832.+6.)++0x00 line.long 0x00 "PIDR6,Processor ID register 6" rgroup.long c14:(832.+7.)++0x00 line.long 0x00 "PIDR7,Processor ID register 7" rgroup.long c14:(832.+8.)++0x00 line.long 0x00 "PIDR8,Processor ID register 8" rgroup.long c14:(832.+9.)++0x00 line.long 0x00 "PIDR9,Processor ID register 9" rgroup.long c14:(832.+10.)++0x00 line.long 0x00 "PIDR10,Processor ID register 10" rgroup.long c14:(832.+11.)++0x00 line.long 0x00 "PIDR11,Processor ID register 11" rgroup.long c14:(832.+12.)++0x00 line.long 0x00 "PIDR12,Processor ID register 12" rgroup.long c14:(832.+13.)++0x00 line.long 0x00 "PIDR13,Processor ID register 13" rgroup.long c14:(832.+14.)++0x00 line.long 0x00 "PIDR14,Processor ID register 14" rgroup.long c14:(832.+15.)++0x00 line.long 0x00 "PIDR15,Processor ID register 15" rgroup.long c14:(832.+16.)++0x00 line.long 0x00 "PIDR16,Processor ID register 16" rgroup.long c14:(832.+17.)++0x00 line.long 0x00 "PIDR17,Processor ID register 17" rgroup.long c14:(832.+18.)++0x00 line.long 0x00 "PIDR18,Processor ID register 18" rgroup.long c14:(832.+19.)++0x00 line.long 0x00 "PIDR19,Processor ID register 19" rgroup.long c14:(832.+20.)++0x00 line.long 0x00 "PIDR20,Processor ID register 20" rgroup.long c14:(832.+21.)++0x00 line.long 0x00 "PIDR21,Processor ID register 21" rgroup.long c14:(832.+22.)++0x00 line.long 0x00 "PIDR22,Processor ID register 22" rgroup.long c14:(832.+23.)++0x00 line.long 0x00 "PIDR23,Processor ID register 23" rgroup.long c14:(832.+24.)++0x00 line.long 0x00 "PIDR24,Processor ID register 24" rgroup.long c14:(832.+25.)++0x00 line.long 0x00 "PIDR25,Processor ID register 25" rgroup.long c14:(832.+26.)++0x00 line.long 0x00 "PIDR26,Processor ID register 26" rgroup.long c14:(832.+27.)++0x00 line.long 0x00 "PIDR27,Processor ID register 27" rgroup.long c14:(832.+28.)++0x00 line.long 0x00 "PIDR28,Processor ID register 28" rgroup.long c14:(832.+29.)++0x00 line.long 0x00 "PIDR29,Processor ID register 29" rgroup.long c14:(832.+30.)++0x00 line.long 0x00 "PIDR30,Processor ID register 30" rgroup.long c14:(832.+31.)++0x00 line.long 0x00 "PIDR31,Processor ID register 31" rgroup.long c14:(832.+32.)++0x00 line.long 0x00 "PIDR32,Processor ID register 32" rgroup.long c14:(832.+33.)++0x00 line.long 0x00 "PIDR33,Processor ID register 33" rgroup.long c14:(832.+34.)++0x00 line.long 0x00 "PIDR34,Processor ID register 34" rgroup.long c14:(832.+35.)++0x00 line.long 0x00 "PIDR35,Processor ID register 35" rgroup.long c14:(832.+36.)++0x00 line.long 0x00 "PIDR36,Processor ID register 36" rgroup.long c14:(832.+37.)++0x00 line.long 0x00 "PIDR37,Processor ID register 37" rgroup.long c14:(832.+38.)++0x00 line.long 0x00 "PIDR38,Processor ID register 38" rgroup.long c14:(832.+39.)++0x00 line.long 0x00 "PIDR39,Processor ID register 39" rgroup.long c14:(832.+40.)++0x00 line.long 0x00 "PIDR40,Processor ID register 40" rgroup.long c14:(832.+41.)++0x00 line.long 0x00 "PIDR41,Processor ID register 41" rgroup.long c14:(832.+42.)++0x00 line.long 0x00 "PIDR42,Processor ID register 42" rgroup.long c14:(832.+43.)++0x00 line.long 0x00 "PIDR43,Processor ID register 43" rgroup.long c14:(832.+44.)++0x00 line.long 0x00 "PIDR44,Processor ID register 44" rgroup.long c14:(832.+45.)++0x00 line.long 0x00 "PIDR45,Processor ID register 45" rgroup.long c14:(832.+46.)++0x00 line.long 0x00 "PIDR46,Processor ID register 46" rgroup.long c14:(832.+47.)++0x00 line.long 0x00 "PIDR47,Processor ID register 47" rgroup.long c14:(832.+48.)++0x00 line.long 0x00 "PIDR48,Processor ID register 48" rgroup.long c14:(832.+49.)++0x00 line.long 0x00 "PIDR49,Processor ID register 49" rgroup.long c14:(832.+50.)++0x00 line.long 0x00 "PIDR50,Processor ID register 50" rgroup.long c14:(832.+51.)++0x00 line.long 0x00 "PIDR51,Processor ID register 51" rgroup.long c14:(832.+52.)++0x00 line.long 0x00 "PIDR52,Processor ID register 52" rgroup.long c14:(832.+53.)++0x00 line.long 0x00 "PIDR53,Processor ID register 53" rgroup.long c14:(832.+54.)++0x00 line.long 0x00 "PIDR54,Processor ID register 54" rgroup.long c14:(832.+55.)++0x00 line.long 0x00 "PIDR55,Processor ID register 55" rgroup.long c14:(832.+56.)++0x00 line.long 0x00 "PIDR56,Processor ID register 56" rgroup.long c14:(832.+57.)++0x00 line.long 0x00 "PIDR57,Processor ID register 57" rgroup.long c14:(832.+58.)++0x00 line.long 0x00 "PIDR58,Processor ID register 58" rgroup.long c14:(832.+59.)++0x00 line.long 0x00 "PIDR59,Processor ID register 59" rgroup.long c14:(832.+60.)++0x00 line.long 0x00 "PIDR60,Processor ID register 60" rgroup.long c14:(832.+61.)++0x00 line.long 0x00 "PIDR61,Processor ID register 61" rgroup.long c14:(832.+62.)++0x00 line.long 0x00 "PIDR62,Processor ID register 62" rgroup.long c14:(832.+63.)++0x00 line.long 0x00 "PIDR63,Processor ID register 63" tree.end tree "Coresight Management Registers" group.long c14:960.++0x0 line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register" bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group.long c14:1000.++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set" group.long c14:1001.++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" textline " " rgroup.long c14:1006.++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..." endif textline " " rgroup.long c14:1010.++0x0 line.long 0x0 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..." bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..." bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." textline " " rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Debug Device Type Register" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:1016.++0x00 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup.long c14:1017.++0x00 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup.long c14:1018.++0x00 line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup.long c14:1019.++0x00 line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup.long c14:1012.++0x00 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup.long c14:1020.++0x00 line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup.long c14:1021.++0x00 line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup.long c14:1022.++0x00 line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup.long c14:1023.++0x00 line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 10. tree "Breakpoint Registers" if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+0.)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+1.)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+2.)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+3.)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+4.)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+5.)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" group.long c14:148.++0x0 line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" group.long c14:149.++0x0 line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" tree.end width 10. tree "Watchpoint Control Registers" group.long c14:(96.+0.)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+1.)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+2.)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+3.)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif tree.end width 0xb base AD:0xf1000000 tree "Interrupt Controller" width 17. group.long 0x1000++0x03 "Interrupt Controller Distributor" line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global Interrupt Enable" "Disabled,Enabled" rgroup.long 0x1004++0x03 line.long 0x00 "GICD_ICTR,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "up to 32/0 external,up to 64/32 external,up to 96/64 external,up to 128/96 external,up to 160/128 external,up to 192/160 external,up to 224/192 external,up to 256/224 external,?..." rgroup.long 0x1008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identfication Register" hexmask.long.byte 0x00 24.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" tree "Group Registers" group.long 0x1080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" group.long 0x1084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" group.long 0x1088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" group.long 0x108C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" group.long 0x1090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" group.long 0x1094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" group.long 0x1098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" group.long 0x109C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" tree.end tree "Set-Enable Registers" group.long 0x1100++0x03 line.long 0x0 "GICD_ISER0,Interrupt Set Enable Register 0" bitfld.long 0x00 31. " SEB31 ,Set Enable Bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " SEB30 ,Set Enable Bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " SEB29 ,Set Enable Bit 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB28 ,Set Enable Bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " SEB27 ,Set Enable Bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " SEB26 ,Set Enable Bit 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB25 ,Set Enable Bit 25" "Disabled,Enabled" bitfld.long 0x00 24. " SEB24 ,Set Enable Bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " SEB23 ,Set Enable Bit 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB22 ,Set Enable Bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " SEB21 ,Set Enable Bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " SEB20 ,Set Enable Bit 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB19 ,Set Enable Bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " SEB18 ,Set Enable Bit 18" "Disabled,Enabled" bitfld.long 0x00 17. " SEB17 ,Set Enable Bit 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB16 ,Set Enable Bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " SEB15 ,Set Enable Bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " SEB14 ,Set Enable Bit 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB13 ,Set Enable Bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " SEB12 ,Set Enable Bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " SEB11 ,Set Enable Bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB10 ,Set Enable Bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " SEB9 ,Set Enable Bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " SEB8 ,Set Enable Bit 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB7 ,Set Enable Bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " SEB6 ,Set Enable Bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " SEB5 ,Set Enable Bit 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB4 ,Set Enable Bit 4" "Disabled,Enabled" bitfld.long 0x00 3. " SEB3 ,Set Enable Bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " SEB2 ,Set Enable Bit 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB1 ,Set Enable Bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " SEB0 ,Set Enable Bit 0" "Disabled,Enabled" group.long 0x1104++0x03 line.long 0x0 "GICD_ISER1,Interrupt Set Enable Register 1" bitfld.long 0x00 31. " SEB63 ,Set Enable Bit 63" "Disabled,Enabled" bitfld.long 0x00 30. " SEB62 ,Set Enable Bit 62" "Disabled,Enabled" bitfld.long 0x00 29. " SEB61 ,Set Enable Bit 61" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB60 ,Set Enable Bit 60" "Disabled,Enabled" bitfld.long 0x00 27. " SEB59 ,Set Enable Bit 59" "Disabled,Enabled" bitfld.long 0x00 26. " SEB58 ,Set Enable Bit 58" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB57 ,Set Enable Bit 57" "Disabled,Enabled" bitfld.long 0x00 24. " SEB56 ,Set Enable Bit 56" "Disabled,Enabled" bitfld.long 0x00 23. " SEB55 ,Set Enable Bit 55" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB54 ,Set Enable Bit 54" "Disabled,Enabled" bitfld.long 0x00 21. " SEB53 ,Set Enable Bit 53" "Disabled,Enabled" bitfld.long 0x00 20. " SEB52 ,Set Enable Bit 52" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB51 ,Set Enable Bit 51" "Disabled,Enabled" bitfld.long 0x00 18. " SEB50 ,Set Enable Bit 50" "Disabled,Enabled" bitfld.long 0x00 17. " SEB49 ,Set Enable Bit 49" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB48 ,Set Enable Bit 48" "Disabled,Enabled" bitfld.long 0x00 15. " SEB47 ,Set Enable Bit 47" "Disabled,Enabled" bitfld.long 0x00 14. " SEB46 ,Set Enable Bit 46" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB45 ,Set Enable Bit 45" "Disabled,Enabled" bitfld.long 0x00 12. " SEB44 ,Set Enable Bit 44" "Disabled,Enabled" bitfld.long 0x00 11. " SEB43 ,Set Enable Bit 43" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB42 ,Set Enable Bit 42" "Disabled,Enabled" bitfld.long 0x00 9. " SEB41 ,Set Enable Bit 41" "Disabled,Enabled" bitfld.long 0x00 8. " SEB40 ,Set Enable Bit 40" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB39 ,Set Enable Bit 39" "Disabled,Enabled" bitfld.long 0x00 6. " SEB38 ,Set Enable Bit 38" "Disabled,Enabled" bitfld.long 0x00 5. " SEB37 ,Set Enable Bit 37" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB36 ,Set Enable Bit 36" "Disabled,Enabled" bitfld.long 0x00 3. " SEB35 ,Set Enable Bit 35" "Disabled,Enabled" bitfld.long 0x00 2. " SEB34 ,Set Enable Bit 34" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB33 ,Set Enable Bit 33" "Disabled,Enabled" bitfld.long 0x00 0. " SEB32 ,Set Enable Bit 32" "Disabled,Enabled" group.long 0x1108++0x03 line.long 0x0 "GICD_ISER2,Interrupt Set Enable Register 2" bitfld.long 0x00 31. " SEB95 ,Set Enable Bit 95" "Disabled,Enabled" bitfld.long 0x00 30. " SEB94 ,Set Enable Bit 94" "Disabled,Enabled" bitfld.long 0x00 29. " SEB93 ,Set Enable Bit 93" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB92 ,Set Enable Bit 92" "Disabled,Enabled" bitfld.long 0x00 27. " SEB91 ,Set Enable Bit 91" "Disabled,Enabled" bitfld.long 0x00 26. " SEB90 ,Set Enable Bit 90" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB89 ,Set Enable Bit 89" "Disabled,Enabled" bitfld.long 0x00 24. " SEB88 ,Set Enable Bit 88" "Disabled,Enabled" bitfld.long 0x00 23. " SEB87 ,Set Enable Bit 87" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB86 ,Set Enable Bit 86" "Disabled,Enabled" bitfld.long 0x00 21. " SEB85 ,Set Enable Bit 85" "Disabled,Enabled" bitfld.long 0x00 20. " SEB84 ,Set Enable Bit 84" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB83 ,Set Enable Bit 83" "Disabled,Enabled" bitfld.long 0x00 18. " SEB82 ,Set Enable Bit 82" "Disabled,Enabled" bitfld.long 0x00 17. " SEB81 ,Set Enable Bit 81" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB80 ,Set Enable Bit 80" "Disabled,Enabled" bitfld.long 0x00 15. " SEB79 ,Set Enable Bit 79" "Disabled,Enabled" bitfld.long 0x00 14. " SEB78 ,Set Enable Bit 78" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB77 ,Set Enable Bit 77" "Disabled,Enabled" bitfld.long 0x00 12. " SEB76 ,Set Enable Bit 76" "Disabled,Enabled" bitfld.long 0x00 11. " SEB75 ,Set Enable Bit 75" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB74 ,Set Enable Bit 74" "Disabled,Enabled" bitfld.long 0x00 9. " SEB73 ,Set Enable Bit 73" "Disabled,Enabled" bitfld.long 0x00 8. " SEB72 ,Set Enable Bit 72" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB71 ,Set Enable Bit 71" "Disabled,Enabled" bitfld.long 0x00 6. " SEB70 ,Set Enable Bit 70" "Disabled,Enabled" bitfld.long 0x00 5. " SEB69 ,Set Enable Bit 69" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB68 ,Set Enable Bit 68" "Disabled,Enabled" bitfld.long 0x00 3. " SEB67 ,Set Enable Bit 67" "Disabled,Enabled" bitfld.long 0x00 2. " SEB66 ,Set Enable Bit 66" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB65 ,Set Enable Bit 65" "Disabled,Enabled" bitfld.long 0x00 0. " SEB64 ,Set Enable Bit 64" "Disabled,Enabled" group.long 0x110C++0x03 line.long 0x0 "GICD_ISER3,Interrupt Set Enable Register 3" bitfld.long 0x00 31. " SEB127 ,Set Enable Bit 127" "Disabled,Enabled" bitfld.long 0x00 30. " SEB126 ,Set Enable Bit 126" "Disabled,Enabled" bitfld.long 0x00 29. " SEB125 ,Set Enable Bit 125" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB124 ,Set Enable Bit 124" "Disabled,Enabled" bitfld.long 0x00 27. " SEB123 ,Set Enable Bit 123" "Disabled,Enabled" bitfld.long 0x00 26. " SEB122 ,Set Enable Bit 122" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB121 ,Set Enable Bit 121" "Disabled,Enabled" bitfld.long 0x00 24. " SEB120 ,Set Enable Bit 120" "Disabled,Enabled" bitfld.long 0x00 23. " SEB119 ,Set Enable Bit 119" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB118 ,Set Enable Bit 118" "Disabled,Enabled" bitfld.long 0x00 21. " SEB117 ,Set Enable Bit 117" "Disabled,Enabled" bitfld.long 0x00 20. " SEB116 ,Set Enable Bit 116" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB115 ,Set Enable Bit 115" "Disabled,Enabled" bitfld.long 0x00 18. " SEB114 ,Set Enable Bit 114" "Disabled,Enabled" bitfld.long 0x00 17. " SEB113 ,Set Enable Bit 113" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB112 ,Set Enable Bit 112" "Disabled,Enabled" bitfld.long 0x00 15. " SEB111 ,Set Enable Bit 111" "Disabled,Enabled" bitfld.long 0x00 14. " SEB110 ,Set Enable Bit 110" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB109 ,Set Enable Bit 109" "Disabled,Enabled" bitfld.long 0x00 12. " SEB108 ,Set Enable Bit 108" "Disabled,Enabled" bitfld.long 0x00 11. " SEB107 ,Set Enable Bit 107" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB106 ,Set Enable Bit 106" "Disabled,Enabled" bitfld.long 0x00 9. " SEB105 ,Set Enable Bit 105" "Disabled,Enabled" bitfld.long 0x00 8. " SEB104 ,Set Enable Bit 104" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB103 ,Set Enable Bit 103" "Disabled,Enabled" bitfld.long 0x00 6. " SEB102 ,Set Enable Bit 102" "Disabled,Enabled" bitfld.long 0x00 5. " SEB101 ,Set Enable Bit 101" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB100 ,Set Enable Bit 100" "Disabled,Enabled" bitfld.long 0x00 3. " SEB99 ,Set Enable Bit 99" "Disabled,Enabled" bitfld.long 0x00 2. " SEB98 ,Set Enable Bit 98" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB97 ,Set Enable Bit 97" "Disabled,Enabled" bitfld.long 0x00 0. " SEB96 ,Set Enable Bit 96" "Disabled,Enabled" group.long 0x1110++0x03 line.long 0x0 "GICD_ISER4,Interrupt Set Enable Register 4" bitfld.long 0x00 31. " SEB159 ,Set Enable Bit 159" "Disabled,Enabled" bitfld.long 0x00 30. " SEB158 ,Set Enable Bit 158" "Disabled,Enabled" bitfld.long 0x00 29. " SEB157 ,Set Enable Bit 157" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB156 ,Set Enable Bit 156" "Disabled,Enabled" bitfld.long 0x00 27. " SEB155 ,Set Enable Bit 155" "Disabled,Enabled" bitfld.long 0x00 26. " SEB154 ,Set Enable Bit 154" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB153 ,Set Enable Bit 153" "Disabled,Enabled" bitfld.long 0x00 24. " SEB152 ,Set Enable Bit 152" "Disabled,Enabled" bitfld.long 0x00 23. " SEB151 ,Set Enable Bit 151" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB150 ,Set Enable Bit 150" "Disabled,Enabled" bitfld.long 0x00 21. " SEB149 ,Set Enable Bit 149" "Disabled,Enabled" bitfld.long 0x00 20. " SEB148 ,Set Enable Bit 148" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB147 ,Set Enable Bit 147" "Disabled,Enabled" bitfld.long 0x00 18. " SEB146 ,Set Enable Bit 146" "Disabled,Enabled" bitfld.long 0x00 17. " SEB145 ,Set Enable Bit 145" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB144 ,Set Enable Bit 144" "Disabled,Enabled" bitfld.long 0x00 15. " SEB143 ,Set Enable Bit 143" "Disabled,Enabled" bitfld.long 0x00 14. " SEB142 ,Set Enable Bit 142" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB141 ,Set Enable Bit 141" "Disabled,Enabled" bitfld.long 0x00 12. " SEB140 ,Set Enable Bit 140" "Disabled,Enabled" bitfld.long 0x00 11. " SEB139 ,Set Enable Bit 139" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB138 ,Set Enable Bit 138" "Disabled,Enabled" bitfld.long 0x00 9. " SEB137 ,Set Enable Bit 137" "Disabled,Enabled" bitfld.long 0x00 8. " SEB136 ,Set Enable Bit 136" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB135 ,Set Enable Bit 135" "Disabled,Enabled" bitfld.long 0x00 6. " SEB134 ,Set Enable Bit 134" "Disabled,Enabled" bitfld.long 0x00 5. " SEB133 ,Set Enable Bit 133" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB132 ,Set Enable Bit 132" "Disabled,Enabled" bitfld.long 0x00 3. " SEB131 ,Set Enable Bit 131" "Disabled,Enabled" bitfld.long 0x00 2. " SEB130 ,Set Enable Bit 130" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB129 ,Set Enable Bit 129" "Disabled,Enabled" bitfld.long 0x00 0. " SEB128 ,Set Enable Bit 128" "Disabled,Enabled" group.long 0x1114++0x03 line.long 0x0 "GICD_ISER5,Interrupt Set Enable Register 5" bitfld.long 0x00 31. " SEB191 ,Set Enable Bit 191" "Disabled,Enabled" bitfld.long 0x00 30. " SEB190 ,Set Enable Bit 190" "Disabled,Enabled" bitfld.long 0x00 29. " SEB189 ,Set Enable Bit 189" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB188 ,Set Enable Bit 188" "Disabled,Enabled" bitfld.long 0x00 27. " SEB187 ,Set Enable Bit 187" "Disabled,Enabled" bitfld.long 0x00 26. " SEB186 ,Set Enable Bit 186" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB185 ,Set Enable Bit 185" "Disabled,Enabled" bitfld.long 0x00 24. " SEB184 ,Set Enable Bit 184" "Disabled,Enabled" bitfld.long 0x00 23. " SEB183 ,Set Enable Bit 183" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB182 ,Set Enable Bit 182" "Disabled,Enabled" bitfld.long 0x00 21. " SEB181 ,Set Enable Bit 181" "Disabled,Enabled" bitfld.long 0x00 20. " SEB180 ,Set Enable Bit 180" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB179 ,Set Enable Bit 179" "Disabled,Enabled" bitfld.long 0x00 18. " SEB178 ,Set Enable Bit 178" "Disabled,Enabled" bitfld.long 0x00 17. " SEB177 ,Set Enable Bit 177" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB176 ,Set Enable Bit 176" "Disabled,Enabled" bitfld.long 0x00 15. " SEB175 ,Set Enable Bit 175" "Disabled,Enabled" bitfld.long 0x00 14. " SEB174 ,Set Enable Bit 174" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB173 ,Set Enable Bit 173" "Disabled,Enabled" bitfld.long 0x00 12. " SEB172 ,Set Enable Bit 172" "Disabled,Enabled" bitfld.long 0x00 11. " SEB171 ,Set Enable Bit 171" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB170 ,Set Enable Bit 170" "Disabled,Enabled" bitfld.long 0x00 9. " SEB169 ,Set Enable Bit 169" "Disabled,Enabled" bitfld.long 0x00 8. " SEB168 ,Set Enable Bit 168" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB167 ,Set Enable Bit 167" "Disabled,Enabled" bitfld.long 0x00 6. " SEB166 ,Set Enable Bit 166" "Disabled,Enabled" bitfld.long 0x00 5. " SEB165 ,Set Enable Bit 165" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB164 ,Set Enable Bit 164" "Disabled,Enabled" bitfld.long 0x00 3. " SEB163 ,Set Enable Bit 163" "Disabled,Enabled" bitfld.long 0x00 2. " SEB162 ,Set Enable Bit 162" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB161 ,Set Enable Bit 161" "Disabled,Enabled" bitfld.long 0x00 0. " SEB160 ,Set Enable Bit 160" "Disabled,Enabled" group.long 0x1118++0x03 line.long 0x0 "GICD_ISER6,Interrupt Set Enable Register 6" bitfld.long 0x00 31. " SEB223 ,Set Enable Bit 223" "Disabled,Enabled" bitfld.long 0x00 30. " SEB222 ,Set Enable Bit 222" "Disabled,Enabled" bitfld.long 0x00 29. " SEB221 ,Set Enable Bit 221" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB220 ,Set Enable Bit 220" "Disabled,Enabled" bitfld.long 0x00 27. " SEB219 ,Set Enable Bit 219" "Disabled,Enabled" bitfld.long 0x00 26. " SEB218 ,Set Enable Bit 218" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB217 ,Set Enable Bit 217" "Disabled,Enabled" bitfld.long 0x00 24. " SEB216 ,Set Enable Bit 216" "Disabled,Enabled" bitfld.long 0x00 23. " SEB215 ,Set Enable Bit 215" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB214 ,Set Enable Bit 214" "Disabled,Enabled" bitfld.long 0x00 21. " SEB213 ,Set Enable Bit 213" "Disabled,Enabled" bitfld.long 0x00 20. " SEB212 ,Set Enable Bit 212" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB211 ,Set Enable Bit 211" "Disabled,Enabled" bitfld.long 0x00 18. " SEB210 ,Set Enable Bit 210" "Disabled,Enabled" bitfld.long 0x00 17. " SEB209 ,Set Enable Bit 209" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB208 ,Set Enable Bit 208" "Disabled,Enabled" bitfld.long 0x00 15. " SEB207 ,Set Enable Bit 207" "Disabled,Enabled" bitfld.long 0x00 14. " SEB206 ,Set Enable Bit 206" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB205 ,Set Enable Bit 205" "Disabled,Enabled" bitfld.long 0x00 12. " SEB204 ,Set Enable Bit 204" "Disabled,Enabled" bitfld.long 0x00 11. " SEB203 ,Set Enable Bit 203" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB202 ,Set Enable Bit 202" "Disabled,Enabled" bitfld.long 0x00 9. " SEB201 ,Set Enable Bit 201" "Disabled,Enabled" bitfld.long 0x00 8. " SEB200 ,Set Enable Bit 200" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB199 ,Set Enable Bit 199" "Disabled,Enabled" bitfld.long 0x00 6. " SEB198 ,Set Enable Bit 198" "Disabled,Enabled" bitfld.long 0x00 5. " SEB197 ,Set Enable Bit 197" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB196 ,Set Enable Bit 196" "Disabled,Enabled" bitfld.long 0x00 3. " SEB195 ,Set Enable Bit 195" "Disabled,Enabled" bitfld.long 0x00 2. " SEB194 ,Set Enable Bit 194" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB193 ,Set Enable Bit 193" "Disabled,Enabled" bitfld.long 0x00 0. " SEB192 ,Set Enable Bit 192" "Disabled,Enabled" group.long 0x111C++0x03 line.long 0x0 "GICD_ISER7,Interrupt Set Enable Register 7" bitfld.long 0x00 31. " SEB255 ,Set Enable Bit 255" "Disabled,Enabled" bitfld.long 0x00 30. " SEB254 ,Set Enable Bit 254" "Disabled,Enabled" bitfld.long 0x00 29. " SEB253 ,Set Enable Bit 253" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB252 ,Set Enable Bit 252" "Disabled,Enabled" bitfld.long 0x00 27. " SEB251 ,Set Enable Bit 251" "Disabled,Enabled" bitfld.long 0x00 26. " SEB250 ,Set Enable Bit 250" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB249 ,Set Enable Bit 249" "Disabled,Enabled" bitfld.long 0x00 24. " SEB248 ,Set Enable Bit 248" "Disabled,Enabled" bitfld.long 0x00 23. " SEB247 ,Set Enable Bit 247" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB246 ,Set Enable Bit 246" "Disabled,Enabled" bitfld.long 0x00 21. " SEB245 ,Set Enable Bit 245" "Disabled,Enabled" bitfld.long 0x00 20. " SEB244 ,Set Enable Bit 244" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB243 ,Set Enable Bit 243" "Disabled,Enabled" bitfld.long 0x00 18. " SEB242 ,Set Enable Bit 242" "Disabled,Enabled" bitfld.long 0x00 17. " SEB241 ,Set Enable Bit 241" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB240 ,Set Enable Bit 240" "Disabled,Enabled" bitfld.long 0x00 15. " SEB239 ,Set Enable Bit 239" "Disabled,Enabled" bitfld.long 0x00 14. " SEB238 ,Set Enable Bit 238" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB237 ,Set Enable Bit 237" "Disabled,Enabled" bitfld.long 0x00 12. " SEB236 ,Set Enable Bit 236" "Disabled,Enabled" bitfld.long 0x00 11. " SEB235 ,Set Enable Bit 235" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB234 ,Set Enable Bit 234" "Disabled,Enabled" bitfld.long 0x00 9. " SEB233 ,Set Enable Bit 233" "Disabled,Enabled" bitfld.long 0x00 8. " SEB232 ,Set Enable Bit 232" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB231 ,Set Enable Bit 231" "Disabled,Enabled" bitfld.long 0x00 6. " SEB230 ,Set Enable Bit 230" "Disabled,Enabled" bitfld.long 0x00 5. " SEB229 ,Set Enable Bit 229" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB228 ,Set Enable Bit 228" "Disabled,Enabled" bitfld.long 0x00 3. " SEB227 ,Set Enable Bit 227" "Disabled,Enabled" bitfld.long 0x00 2. " SEB226 ,Set Enable Bit 226" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB225 ,Set Enable Bit 225" "Disabled,Enabled" bitfld.long 0x00 0. " SEB224 ,Set Enable Bit 224" "Disabled,Enabled" tree.end tree "Clear-Enable Registers" group.long 0x1180++0x03 line.long 0x0 "GICD_ICER0,Interrupt Clear Enable Register 0" eventfld.long 0x00 31. " CEB31 ,Clear Enable Bit 31" "Disabled,Enabled" eventfld.long 0x00 30. " CEB30 ,Clear Enable Bit 30" "Disabled,Enabled" eventfld.long 0x00 29. " CEB29 ,Clear Enable Bit 29" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB28 ,Clear Enable Bit 28" "Disabled,Enabled" eventfld.long 0x00 27. " CEB27 ,Clear Enable Bit 27" "Disabled,Enabled" eventfld.long 0x00 26. " CEB26 ,Clear Enable Bit 26" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB25 ,Clear Enable Bit 25" "Disabled,Enabled" eventfld.long 0x00 24. " CEB24 ,Clear Enable Bit 24" "Disabled,Enabled" eventfld.long 0x00 23. " CEB23 ,Clear Enable Bit 23" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB22 ,Clear Enable Bit 22" "Disabled,Enabled" eventfld.long 0x00 21. " CEB21 ,Clear Enable Bit 21" "Disabled,Enabled" eventfld.long 0x00 20. " CEB20 ,Clear Enable Bit 20" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB19 ,Clear Enable Bit 19" "Disabled,Enabled" eventfld.long 0x00 18. " CEB18 ,Clear Enable Bit 18" "Disabled,Enabled" eventfld.long 0x00 17. " CEB17 ,Clear Enable Bit 17" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB16 ,Clear Enable Bit 16" "Disabled,Enabled" eventfld.long 0x00 15. " CEB15 ,Clear Enable Bit 15" "Disabled,Enabled" eventfld.long 0x00 14. " CEB14 ,Clear Enable Bit 14" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB13 ,Clear Enable Bit 13" "Disabled,Enabled" eventfld.long 0x00 12. " CEB12 ,Clear Enable Bit 12" "Disabled,Enabled" eventfld.long 0x00 11. " CEB11 ,Clear Enable Bit 11" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB10 ,Clear Enable Bit 10" "Disabled,Enabled" eventfld.long 0x00 9. " CEB9 ,Clear Enable Bit 9" "Disabled,Enabled" eventfld.long 0x00 8. " CEB8 ,Clear Enable Bit 8" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB7 ,Clear Enable Bit 7" "Disabled,Enabled" eventfld.long 0x00 6. " CEB6 ,Clear Enable Bit 6" "Disabled,Enabled" eventfld.long 0x00 5. " CEB5 ,Clear Enable Bit 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB4 ,Clear Enable Bit 4" "Disabled,Enabled" eventfld.long 0x00 3. " CEB3 ,Clear Enable Bit 3" "Disabled,Enabled" eventfld.long 0x00 2. " CEB2 ,Clear Enable Bit 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB1 ,Clear Enable Bit 1" "Disabled,Enabled" eventfld.long 0x00 0. " CEB0 ,Clear Enable Bit 0" "Disabled,Enabled" group.long 0x1184++0x03 line.long 0x0 "GICD_ICER1,Interrupt Clear Enable Register 1" eventfld.long 0x00 31. " CEB63 ,Clear Enable Bit 63" "Disabled,Enabled" eventfld.long 0x00 30. " CEB62 ,Clear Enable Bit 62" "Disabled,Enabled" eventfld.long 0x00 29. " CEB61 ,Clear Enable Bit 61" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB60 ,Clear Enable Bit 60" "Disabled,Enabled" eventfld.long 0x00 27. " CEB59 ,Clear Enable Bit 59" "Disabled,Enabled" eventfld.long 0x00 26. " CEB58 ,Clear Enable Bit 58" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB57 ,Clear Enable Bit 57" "Disabled,Enabled" eventfld.long 0x00 24. " CEB56 ,Clear Enable Bit 56" "Disabled,Enabled" eventfld.long 0x00 23. " CEB55 ,Clear Enable Bit 55" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB54 ,Clear Enable Bit 54" "Disabled,Enabled" eventfld.long 0x00 21. " CEB53 ,Clear Enable Bit 53" "Disabled,Enabled" eventfld.long 0x00 20. " CEB52 ,Clear Enable Bit 52" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB51 ,Clear Enable Bit 51" "Disabled,Enabled" eventfld.long 0x00 18. " CEB50 ,Clear Enable Bit 50" "Disabled,Enabled" eventfld.long 0x00 17. " CEB49 ,Clear Enable Bit 49" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB48 ,Clear Enable Bit 48" "Disabled,Enabled" eventfld.long 0x00 15. " CEB47 ,Clear Enable Bit 47" "Disabled,Enabled" eventfld.long 0x00 14. " CEB46 ,Clear Enable Bit 46" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB45 ,Clear Enable Bit 45" "Disabled,Enabled" eventfld.long 0x00 12. " CEB44 ,Clear Enable Bit 44" "Disabled,Enabled" eventfld.long 0x00 11. " CEB43 ,Clear Enable Bit 43" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB42 ,Clear Enable Bit 42" "Disabled,Enabled" eventfld.long 0x00 9. " CEB41 ,Clear Enable Bit 41" "Disabled,Enabled" eventfld.long 0x00 8. " CEB40 ,Clear Enable Bit 40" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB39 ,Clear Enable Bit 39" "Disabled,Enabled" eventfld.long 0x00 6. " CEB38 ,Clear Enable Bit 38" "Disabled,Enabled" eventfld.long 0x00 5. " CEB37 ,Clear Enable Bit 37" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB36 ,Clear Enable Bit 36" "Disabled,Enabled" eventfld.long 0x00 3. " CEB35 ,Clear Enable Bit 35" "Disabled,Enabled" eventfld.long 0x00 2. " CEB34 ,Clear Enable Bit 34" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB33 ,Clear Enable Bit 33" "Disabled,Enabled" eventfld.long 0x00 0. " CEB32 ,Clear Enable Bit 32" "Disabled,Enabled" group.long 0x1188++0x03 line.long 0x0 "GICD_ICER2,Interrupt Clear Enable Register 2" eventfld.long 0x00 31. " CEB95 ,Clear Enable Bit 95" "Disabled,Enabled" eventfld.long 0x00 30. " CEB94 ,Clear Enable Bit 94" "Disabled,Enabled" eventfld.long 0x00 29. " CEB93 ,Clear Enable Bit 93" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB92 ,Clear Enable Bit 92" "Disabled,Enabled" eventfld.long 0x00 27. " CEB91 ,Clear Enable Bit 91" "Disabled,Enabled" eventfld.long 0x00 26. " CEB90 ,Clear Enable Bit 90" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB89 ,Clear Enable Bit 89" "Disabled,Enabled" eventfld.long 0x00 24. " CEB88 ,Clear Enable Bit 88" "Disabled,Enabled" eventfld.long 0x00 23. " CEB87 ,Clear Enable Bit 87" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB86 ,Clear Enable Bit 86" "Disabled,Enabled" eventfld.long 0x00 21. " CEB85 ,Clear Enable Bit 85" "Disabled,Enabled" eventfld.long 0x00 20. " CEB84 ,Clear Enable Bit 84" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB83 ,Clear Enable Bit 83" "Disabled,Enabled" eventfld.long 0x00 18. " CEB82 ,Clear Enable Bit 82" "Disabled,Enabled" eventfld.long 0x00 17. " CEB81 ,Clear Enable Bit 81" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB80 ,Clear Enable Bit 80" "Disabled,Enabled" eventfld.long 0x00 15. " CEB79 ,Clear Enable Bit 79" "Disabled,Enabled" eventfld.long 0x00 14. " CEB78 ,Clear Enable Bit 78" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB77 ,Clear Enable Bit 77" "Disabled,Enabled" eventfld.long 0x00 12. " CEB76 ,Clear Enable Bit 76" "Disabled,Enabled" eventfld.long 0x00 11. " CEB75 ,Clear Enable Bit 75" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB74 ,Clear Enable Bit 74" "Disabled,Enabled" eventfld.long 0x00 9. " CEB73 ,Clear Enable Bit 73" "Disabled,Enabled" eventfld.long 0x00 8. " CEB72 ,Clear Enable Bit 72" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB71 ,Clear Enable Bit 71" "Disabled,Enabled" eventfld.long 0x00 6. " CEB70 ,Clear Enable Bit 70" "Disabled,Enabled" eventfld.long 0x00 5. " CEB69 ,Clear Enable Bit 69" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB68 ,Clear Enable Bit 68" "Disabled,Enabled" eventfld.long 0x00 3. " CEB67 ,Clear Enable Bit 67" "Disabled,Enabled" eventfld.long 0x00 2. " CEB66 ,Clear Enable Bit 66" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB65 ,Clear Enable Bit 65" "Disabled,Enabled" eventfld.long 0x00 0. " CEB64 ,Clear Enable Bit 64" "Disabled,Enabled" group.long 0x118C++0x03 line.long 0x0 "GICD_ICER3,Interrupt Clear Enable Register 3" eventfld.long 0x00 31. " CEB127 ,Clear Enable Bit 127" "Disabled,Enabled" eventfld.long 0x00 30. " CEB126 ,Clear Enable Bit 126" "Disabled,Enabled" eventfld.long 0x00 29. " CEB125 ,Clear Enable Bit 125" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB124 ,Clear Enable Bit 124" "Disabled,Enabled" eventfld.long 0x00 27. " CEB123 ,Clear Enable Bit 123" "Disabled,Enabled" eventfld.long 0x00 26. " CEB122 ,Clear Enable Bit 122" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB121 ,Clear Enable Bit 121" "Disabled,Enabled" eventfld.long 0x00 24. " CEB120 ,Clear Enable Bit 120" "Disabled,Enabled" eventfld.long 0x00 23. " CEB119 ,Clear Enable Bit 119" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB118 ,Clear Enable Bit 118" "Disabled,Enabled" eventfld.long 0x00 21. " CEB117 ,Clear Enable Bit 117" "Disabled,Enabled" eventfld.long 0x00 20. " CEB116 ,Clear Enable Bit 116" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB115 ,Clear Enable Bit 115" "Disabled,Enabled" eventfld.long 0x00 18. " CEB114 ,Clear Enable Bit 114" "Disabled,Enabled" eventfld.long 0x00 17. " CEB113 ,Clear Enable Bit 113" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB112 ,Clear Enable Bit 112" "Disabled,Enabled" eventfld.long 0x00 15. " CEB111 ,Clear Enable Bit 111" "Disabled,Enabled" eventfld.long 0x00 14. " CEB110 ,Clear Enable Bit 110" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB109 ,Clear Enable Bit 109" "Disabled,Enabled" eventfld.long 0x00 12. " CEB108 ,Clear Enable Bit 108" "Disabled,Enabled" eventfld.long 0x00 11. " CEB107 ,Clear Enable Bit 107" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB106 ,Clear Enable Bit 106" "Disabled,Enabled" eventfld.long 0x00 9. " CEB105 ,Clear Enable Bit 105" "Disabled,Enabled" eventfld.long 0x00 8. " CEB104 ,Clear Enable Bit 104" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB103 ,Clear Enable Bit 103" "Disabled,Enabled" eventfld.long 0x00 6. " CEB102 ,Clear Enable Bit 102" "Disabled,Enabled" eventfld.long 0x00 5. " CEB101 ,Clear Enable Bit 101" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB100 ,Clear Enable Bit 100" "Disabled,Enabled" eventfld.long 0x00 3. " CEB99 ,Clear Enable Bit 99" "Disabled,Enabled" eventfld.long 0x00 2. " CEB98 ,Clear Enable Bit 98" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB97 ,Clear Enable Bit 97" "Disabled,Enabled" eventfld.long 0x00 0. " CEB96 ,Clear Enable Bit 96" "Disabled,Enabled" group.long 0x1190++0x03 line.long 0x0 "GICD_ICER4,Interrupt Clear Enable Register 4" eventfld.long 0x00 31. " CEB159 ,Clear Enable Bit 159" "Disabled,Enabled" eventfld.long 0x00 30. " CEB158 ,Clear Enable Bit 158" "Disabled,Enabled" eventfld.long 0x00 29. " CEB157 ,Clear Enable Bit 157" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB156 ,Clear Enable Bit 156" "Disabled,Enabled" eventfld.long 0x00 27. " CEB155 ,Clear Enable Bit 155" "Disabled,Enabled" eventfld.long 0x00 26. " CEB154 ,Clear Enable Bit 154" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB153 ,Clear Enable Bit 153" "Disabled,Enabled" eventfld.long 0x00 24. " CEB152 ,Clear Enable Bit 152" "Disabled,Enabled" eventfld.long 0x00 23. " CEB151 ,Clear Enable Bit 151" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB150 ,Clear Enable Bit 150" "Disabled,Enabled" eventfld.long 0x00 21. " CEB149 ,Clear Enable Bit 149" "Disabled,Enabled" eventfld.long 0x00 20. " CEB148 ,Clear Enable Bit 148" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB147 ,Clear Enable Bit 147" "Disabled,Enabled" eventfld.long 0x00 18. " CEB146 ,Clear Enable Bit 146" "Disabled,Enabled" eventfld.long 0x00 17. " CEB145 ,Clear Enable Bit 145" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB144 ,Clear Enable Bit 144" "Disabled,Enabled" eventfld.long 0x00 15. " CEB143 ,Clear Enable Bit 143" "Disabled,Enabled" eventfld.long 0x00 14. " CEB142 ,Clear Enable Bit 142" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB141 ,Clear Enable Bit 141" "Disabled,Enabled" eventfld.long 0x00 12. " CEB140 ,Clear Enable Bit 140" "Disabled,Enabled" eventfld.long 0x00 11. " CEB139 ,Clear Enable Bit 139" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB138 ,Clear Enable Bit 138" "Disabled,Enabled" eventfld.long 0x00 9. " CEB137 ,Clear Enable Bit 137" "Disabled,Enabled" eventfld.long 0x00 8. " CEB136 ,Clear Enable Bit 136" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB135 ,Clear Enable Bit 135" "Disabled,Enabled" eventfld.long 0x00 6. " CEB134 ,Clear Enable Bit 134" "Disabled,Enabled" eventfld.long 0x00 5. " CEB133 ,Clear Enable Bit 133" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB132 ,Clear Enable Bit 132" "Disabled,Enabled" eventfld.long 0x00 3. " CEB131 ,Clear Enable Bit 131" "Disabled,Enabled" eventfld.long 0x00 2. " CEB130 ,Clear Enable Bit 130" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB129 ,Clear Enable Bit 129" "Disabled,Enabled" eventfld.long 0x00 0. " CEB128 ,Clear Enable Bit 128" "Disabled,Enabled" group.long 0x1194++0x03 line.long 0x0 "GICD_ICER5,Interrupt Clear Enable Register 5" eventfld.long 0x00 31. " CEB191 ,Clear Enable Bit 191" "Disabled,Enabled" eventfld.long 0x00 30. " CEB190 ,Clear Enable Bit 190" "Disabled,Enabled" eventfld.long 0x00 29. " CEB189 ,Clear Enable Bit 189" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB188 ,Clear Enable Bit 188" "Disabled,Enabled" eventfld.long 0x00 27. " CEB187 ,Clear Enable Bit 187" "Disabled,Enabled" eventfld.long 0x00 26. " CEB186 ,Clear Enable Bit 186" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB185 ,Clear Enable Bit 185" "Disabled,Enabled" eventfld.long 0x00 24. " CEB184 ,Clear Enable Bit 184" "Disabled,Enabled" eventfld.long 0x00 23. " CEB183 ,Clear Enable Bit 183" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB182 ,Clear Enable Bit 182" "Disabled,Enabled" eventfld.long 0x00 21. " CEB181 ,Clear Enable Bit 181" "Disabled,Enabled" eventfld.long 0x00 20. " CEB180 ,Clear Enable Bit 180" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB179 ,Clear Enable Bit 179" "Disabled,Enabled" eventfld.long 0x00 18. " CEB178 ,Clear Enable Bit 178" "Disabled,Enabled" eventfld.long 0x00 17. " CEB177 ,Clear Enable Bit 177" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB176 ,Clear Enable Bit 176" "Disabled,Enabled" eventfld.long 0x00 15. " CEB175 ,Clear Enable Bit 175" "Disabled,Enabled" eventfld.long 0x00 14. " CEB174 ,Clear Enable Bit 174" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB173 ,Clear Enable Bit 173" "Disabled,Enabled" eventfld.long 0x00 12. " CEB172 ,Clear Enable Bit 172" "Disabled,Enabled" eventfld.long 0x00 11. " CEB171 ,Clear Enable Bit 171" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB170 ,Clear Enable Bit 170" "Disabled,Enabled" eventfld.long 0x00 9. " CEB169 ,Clear Enable Bit 169" "Disabled,Enabled" eventfld.long 0x00 8. " CEB168 ,Clear Enable Bit 168" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB167 ,Clear Enable Bit 167" "Disabled,Enabled" eventfld.long 0x00 6. " CEB166 ,Clear Enable Bit 166" "Disabled,Enabled" eventfld.long 0x00 5. " CEB165 ,Clear Enable Bit 165" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB164 ,Clear Enable Bit 164" "Disabled,Enabled" eventfld.long 0x00 3. " CEB163 ,Clear Enable Bit 163" "Disabled,Enabled" eventfld.long 0x00 2. " CEB162 ,Clear Enable Bit 162" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB161 ,Clear Enable Bit 161" "Disabled,Enabled" eventfld.long 0x00 0. " CEB160 ,Clear Enable Bit 160" "Disabled,Enabled" group.long 0x1198++0x03 line.long 0x0 "GICD_ICER6,Interrupt Clear Enable Register 6" eventfld.long 0x00 31. " CEB223 ,Clear Enable Bit 223" "Disabled,Enabled" eventfld.long 0x00 30. " CEB222 ,Clear Enable Bit 222" "Disabled,Enabled" eventfld.long 0x00 29. " CEB221 ,Clear Enable Bit 221" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB220 ,Clear Enable Bit 220" "Disabled,Enabled" eventfld.long 0x00 27. " CEB219 ,Clear Enable Bit 219" "Disabled,Enabled" eventfld.long 0x00 26. " CEB218 ,Clear Enable Bit 218" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB217 ,Clear Enable Bit 217" "Disabled,Enabled" eventfld.long 0x00 24. " CEB216 ,Clear Enable Bit 216" "Disabled,Enabled" eventfld.long 0x00 23. " CEB215 ,Clear Enable Bit 215" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB214 ,Clear Enable Bit 214" "Disabled,Enabled" eventfld.long 0x00 21. " CEB213 ,Clear Enable Bit 213" "Disabled,Enabled" eventfld.long 0x00 20. " CEB212 ,Clear Enable Bit 212" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB211 ,Clear Enable Bit 211" "Disabled,Enabled" eventfld.long 0x00 18. " CEB210 ,Clear Enable Bit 210" "Disabled,Enabled" eventfld.long 0x00 17. " CEB209 ,Clear Enable Bit 209" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB208 ,Clear Enable Bit 208" "Disabled,Enabled" eventfld.long 0x00 15. " CEB207 ,Clear Enable Bit 207" "Disabled,Enabled" eventfld.long 0x00 14. " CEB206 ,Clear Enable Bit 206" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB205 ,Clear Enable Bit 205" "Disabled,Enabled" eventfld.long 0x00 12. " CEB204 ,Clear Enable Bit 204" "Disabled,Enabled" eventfld.long 0x00 11. " CEB203 ,Clear Enable Bit 203" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB202 ,Clear Enable Bit 202" "Disabled,Enabled" eventfld.long 0x00 9. " CEB201 ,Clear Enable Bit 201" "Disabled,Enabled" eventfld.long 0x00 8. " CEB200 ,Clear Enable Bit 200" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB199 ,Clear Enable Bit 199" "Disabled,Enabled" eventfld.long 0x00 6. " CEB198 ,Clear Enable Bit 198" "Disabled,Enabled" eventfld.long 0x00 5. " CEB197 ,Clear Enable Bit 197" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB196 ,Clear Enable Bit 196" "Disabled,Enabled" eventfld.long 0x00 3. " CEB195 ,Clear Enable Bit 195" "Disabled,Enabled" eventfld.long 0x00 2. " CEB194 ,Clear Enable Bit 194" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB193 ,Clear Enable Bit 193" "Disabled,Enabled" eventfld.long 0x00 0. " CEB192 ,Clear Enable Bit 192" "Disabled,Enabled" group.long 0x119C++0x03 line.long 0x0 "GICD_ICER7,Interrupt Clear Enable Register 7" eventfld.long 0x00 31. " CEB255 ,Clear Enable Bit 255" "Disabled,Enabled" eventfld.long 0x00 30. " CEB254 ,Clear Enable Bit 254" "Disabled,Enabled" eventfld.long 0x00 29. " CEB253 ,Clear Enable Bit 253" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB252 ,Clear Enable Bit 252" "Disabled,Enabled" eventfld.long 0x00 27. " CEB251 ,Clear Enable Bit 251" "Disabled,Enabled" eventfld.long 0x00 26. " CEB250 ,Clear Enable Bit 250" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB249 ,Clear Enable Bit 249" "Disabled,Enabled" eventfld.long 0x00 24. " CEB248 ,Clear Enable Bit 248" "Disabled,Enabled" eventfld.long 0x00 23. " CEB247 ,Clear Enable Bit 247" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB246 ,Clear Enable Bit 246" "Disabled,Enabled" eventfld.long 0x00 21. " CEB245 ,Clear Enable Bit 245" "Disabled,Enabled" eventfld.long 0x00 20. " CEB244 ,Clear Enable Bit 244" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB243 ,Clear Enable Bit 243" "Disabled,Enabled" eventfld.long 0x00 18. " CEB242 ,Clear Enable Bit 242" "Disabled,Enabled" eventfld.long 0x00 17. " CEB241 ,Clear Enable Bit 241" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB240 ,Clear Enable Bit 240" "Disabled,Enabled" eventfld.long 0x00 15. " CEB239 ,Clear Enable Bit 239" "Disabled,Enabled" eventfld.long 0x00 14. " CEB238 ,Clear Enable Bit 238" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB237 ,Clear Enable Bit 237" "Disabled,Enabled" eventfld.long 0x00 12. " CEB236 ,Clear Enable Bit 236" "Disabled,Enabled" eventfld.long 0x00 11. " CEB235 ,Clear Enable Bit 235" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB234 ,Clear Enable Bit 234" "Disabled,Enabled" eventfld.long 0x00 9. " CEB233 ,Clear Enable Bit 233" "Disabled,Enabled" eventfld.long 0x00 8. " CEB232 ,Clear Enable Bit 232" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB231 ,Clear Enable Bit 231" "Disabled,Enabled" eventfld.long 0x00 6. " CEB230 ,Clear Enable Bit 230" "Disabled,Enabled" eventfld.long 0x00 5. " CEB229 ,Clear Enable Bit 229" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB228 ,Clear Enable Bit 228" "Disabled,Enabled" eventfld.long 0x00 3. " CEB227 ,Clear Enable Bit 227" "Disabled,Enabled" eventfld.long 0x00 2. " CEB226 ,Clear Enable Bit 226" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB225 ,Clear Enable Bit 225" "Disabled,Enabled" eventfld.long 0x00 0. " CEB224 ,Clear Enable Bit 224" "Disabled,Enabled" tree.end tree "Set-Pending Registers" group.long 0x1200++0x03 line.long 0x0 "GICD_ISPR0,Interrupt Set Pending Register 0" bitfld.long 0x00 31. " SPB31 ,Set Pending Bit 31" "Not pending,Pending" bitfld.long 0x00 30. " SPB30 ,Set Pending Bit 30" "Not pending,Pending" bitfld.long 0x00 29. " SPB29 ,Set Pending Bit 29" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB28 ,Set Pending Bit 28" "Not pending,Pending" bitfld.long 0x00 27. " SPB27 ,Set Pending Bit 27" "Not pending,Pending" bitfld.long 0x00 26. " SPB26 ,Set Pending Bit 26" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB25 ,Set Pending Bit 25" "Not pending,Pending" bitfld.long 0x00 24. " SPB24 ,Set Pending Bit 24" "Not pending,Pending" bitfld.long 0x00 23. " SPB23 ,Set Pending Bit 23" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB22 ,Set Pending Bit 22" "Not pending,Pending" bitfld.long 0x00 21. " SPB21 ,Set Pending Bit 21" "Not pending,Pending" bitfld.long 0x00 20. " SPB20 ,Set Pending Bit 20" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB19 ,Set Pending Bit 19" "Not pending,Pending" bitfld.long 0x00 18. " SPB18 ,Set Pending Bit 18" "Not pending,Pending" bitfld.long 0x00 17. " SPB17 ,Set Pending Bit 17" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB16 ,Set Pending Bit 16" "Not pending,Pending" bitfld.long 0x00 15. " SPB15 ,Set Pending Bit 15" "Not pending,Pending" bitfld.long 0x00 14. " SPB14 ,Set Pending Bit 14" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB13 ,Set Pending Bit 13" "Not pending,Pending" bitfld.long 0x00 12. " SPB12 ,Set Pending Bit 12" "Not pending,Pending" bitfld.long 0x00 11. " SPB11 ,Set Pending Bit 11" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB10 ,Set Pending Bit 10" "Not pending,Pending" bitfld.long 0x00 9. " SPB9 ,Set Pending Bit 9" "Not pending,Pending" bitfld.long 0x00 8. " SPB8 ,Set Pending Bit 8" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB7 ,Set Pending Bit 7" "Not pending,Pending" bitfld.long 0x00 6. " SPB6 ,Set Pending Bit 6" "Not pending,Pending" bitfld.long 0x00 5. " SPB5 ,Set Pending Bit 5" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB4 ,Set Pending Bit 4" "Not pending,Pending" bitfld.long 0x00 3. " SPB3 ,Set Pending Bit 3" "Not pending,Pending" bitfld.long 0x00 2. " SPB2 ,Set Pending Bit 2" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB1 ,Set Pending Bit 1" "Not pending,Pending" bitfld.long 0x00 0. " SPB0 ,Set Pending Bit 0" "Not pending,Pending" group.long 0x1204++0x03 line.long 0x0 "GICD_ISPR1,Interrupt Set Pending Register 1" bitfld.long 0x00 31. " SPB63 ,Set Pending Bit 63" "Not pending,Pending" bitfld.long 0x00 30. " SPB62 ,Set Pending Bit 62" "Not pending,Pending" bitfld.long 0x00 29. " SPB61 ,Set Pending Bit 61" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB60 ,Set Pending Bit 60" "Not pending,Pending" bitfld.long 0x00 27. " SPB59 ,Set Pending Bit 59" "Not pending,Pending" bitfld.long 0x00 26. " SPB58 ,Set Pending Bit 58" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB57 ,Set Pending Bit 57" "Not pending,Pending" bitfld.long 0x00 24. " SPB56 ,Set Pending Bit 56" "Not pending,Pending" bitfld.long 0x00 23. " SPB55 ,Set Pending Bit 55" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB54 ,Set Pending Bit 54" "Not pending,Pending" bitfld.long 0x00 21. " SPB53 ,Set Pending Bit 53" "Not pending,Pending" bitfld.long 0x00 20. " SPB52 ,Set Pending Bit 52" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB51 ,Set Pending Bit 51" "Not pending,Pending" bitfld.long 0x00 18. " SPB50 ,Set Pending Bit 50" "Not pending,Pending" bitfld.long 0x00 17. " SPB49 ,Set Pending Bit 49" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB48 ,Set Pending Bit 48" "Not pending,Pending" bitfld.long 0x00 15. " SPB47 ,Set Pending Bit 47" "Not pending,Pending" bitfld.long 0x00 14. " SPB46 ,Set Pending Bit 46" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB45 ,Set Pending Bit 45" "Not pending,Pending" bitfld.long 0x00 12. " SPB44 ,Set Pending Bit 44" "Not pending,Pending" bitfld.long 0x00 11. " SPB43 ,Set Pending Bit 43" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB42 ,Set Pending Bit 42" "Not pending,Pending" bitfld.long 0x00 9. " SPB41 ,Set Pending Bit 41" "Not pending,Pending" bitfld.long 0x00 8. " SPB40 ,Set Pending Bit 40" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB39 ,Set Pending Bit 39" "Not pending,Pending" bitfld.long 0x00 6. " SPB38 ,Set Pending Bit 38" "Not pending,Pending" bitfld.long 0x00 5. " SPB37 ,Set Pending Bit 37" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB36 ,Set Pending Bit 36" "Not pending,Pending" bitfld.long 0x00 3. " SPB35 ,Set Pending Bit 35" "Not pending,Pending" bitfld.long 0x00 2. " SPB34 ,Set Pending Bit 34" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB33 ,Set Pending Bit 33" "Not pending,Pending" bitfld.long 0x00 0. " SPB32 ,Set Pending Bit 32" "Not pending,Pending" group.long 0x1208++0x03 line.long 0x0 "GICD_ISPR2,Interrupt Set Pending Register 2" bitfld.long 0x00 31. " SPB95 ,Set Pending Bit 95" "Not pending,Pending" bitfld.long 0x00 30. " SPB94 ,Set Pending Bit 94" "Not pending,Pending" bitfld.long 0x00 29. " SPB93 ,Set Pending Bit 93" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB92 ,Set Pending Bit 92" "Not pending,Pending" bitfld.long 0x00 27. " SPB91 ,Set Pending Bit 91" "Not pending,Pending" bitfld.long 0x00 26. " SPB90 ,Set Pending Bit 90" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB89 ,Set Pending Bit 89" "Not pending,Pending" bitfld.long 0x00 24. " SPB88 ,Set Pending Bit 88" "Not pending,Pending" bitfld.long 0x00 23. " SPB87 ,Set Pending Bit 87" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB86 ,Set Pending Bit 86" "Not pending,Pending" bitfld.long 0x00 21. " SPB85 ,Set Pending Bit 85" "Not pending,Pending" bitfld.long 0x00 20. " SPB84 ,Set Pending Bit 84" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB83 ,Set Pending Bit 83" "Not pending,Pending" bitfld.long 0x00 18. " SPB82 ,Set Pending Bit 82" "Not pending,Pending" bitfld.long 0x00 17. " SPB81 ,Set Pending Bit 81" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB80 ,Set Pending Bit 80" "Not pending,Pending" bitfld.long 0x00 15. " SPB79 ,Set Pending Bit 79" "Not pending,Pending" bitfld.long 0x00 14. " SPB78 ,Set Pending Bit 78" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB77 ,Set Pending Bit 77" "Not pending,Pending" bitfld.long 0x00 12. " SPB76 ,Set Pending Bit 76" "Not pending,Pending" bitfld.long 0x00 11. " SPB75 ,Set Pending Bit 75" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB74 ,Set Pending Bit 74" "Not pending,Pending" bitfld.long 0x00 9. " SPB73 ,Set Pending Bit 73" "Not pending,Pending" bitfld.long 0x00 8. " SPB72 ,Set Pending Bit 72" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB71 ,Set Pending Bit 71" "Not pending,Pending" bitfld.long 0x00 6. " SPB70 ,Set Pending Bit 70" "Not pending,Pending" bitfld.long 0x00 5. " SPB69 ,Set Pending Bit 69" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB68 ,Set Pending Bit 68" "Not pending,Pending" bitfld.long 0x00 3. " SPB67 ,Set Pending Bit 67" "Not pending,Pending" bitfld.long 0x00 2. " SPB66 ,Set Pending Bit 66" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB65 ,Set Pending Bit 65" "Not pending,Pending" bitfld.long 0x00 0. " SPB64 ,Set Pending Bit 64" "Not pending,Pending" group.long 0x120C++0x03 line.long 0x0 "GICD_ISPR3,Interrupt Set Pending Register 3" bitfld.long 0x00 31. " SPB127 ,Set Pending Bit 127" "Not pending,Pending" bitfld.long 0x00 30. " SPB126 ,Set Pending Bit 126" "Not pending,Pending" bitfld.long 0x00 29. " SPB125 ,Set Pending Bit 125" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB124 ,Set Pending Bit 124" "Not pending,Pending" bitfld.long 0x00 27. " SPB123 ,Set Pending Bit 123" "Not pending,Pending" bitfld.long 0x00 26. " SPB122 ,Set Pending Bit 122" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB121 ,Set Pending Bit 121" "Not pending,Pending" bitfld.long 0x00 24. " SPB120 ,Set Pending Bit 120" "Not pending,Pending" bitfld.long 0x00 23. " SPB119 ,Set Pending Bit 119" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB118 ,Set Pending Bit 118" "Not pending,Pending" bitfld.long 0x00 21. " SPB117 ,Set Pending Bit 117" "Not pending,Pending" bitfld.long 0x00 20. " SPB116 ,Set Pending Bit 116" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB115 ,Set Pending Bit 115" "Not pending,Pending" bitfld.long 0x00 18. " SPB114 ,Set Pending Bit 114" "Not pending,Pending" bitfld.long 0x00 17. " SPB113 ,Set Pending Bit 113" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB112 ,Set Pending Bit 112" "Not pending,Pending" bitfld.long 0x00 15. " SPB111 ,Set Pending Bit 111" "Not pending,Pending" bitfld.long 0x00 14. " SPB110 ,Set Pending Bit 110" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB109 ,Set Pending Bit 109" "Not pending,Pending" bitfld.long 0x00 12. " SPB108 ,Set Pending Bit 108" "Not pending,Pending" bitfld.long 0x00 11. " SPB107 ,Set Pending Bit 107" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB106 ,Set Pending Bit 106" "Not pending,Pending" bitfld.long 0x00 9. " SPB105 ,Set Pending Bit 105" "Not pending,Pending" bitfld.long 0x00 8. " SPB104 ,Set Pending Bit 104" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB103 ,Set Pending Bit 103" "Not pending,Pending" bitfld.long 0x00 6. " SPB102 ,Set Pending Bit 102" "Not pending,Pending" bitfld.long 0x00 5. " SPB101 ,Set Pending Bit 101" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB100 ,Set Pending Bit 100" "Not pending,Pending" bitfld.long 0x00 3. " SPB99 ,Set Pending Bit 99" "Not pending,Pending" bitfld.long 0x00 2. " SPB98 ,Set Pending Bit 98" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB97 ,Set Pending Bit 97" "Not pending,Pending" bitfld.long 0x00 0. " SPB96 ,Set Pending Bit 96" "Not pending,Pending" group.long 0x1210++0x03 line.long 0x0 "GICD_ISPR4,Interrupt Set Pending Register 4" bitfld.long 0x00 31. " SPB159 ,Set Pending Bit 159" "Not pending,Pending" bitfld.long 0x00 30. " SPB158 ,Set Pending Bit 158" "Not pending,Pending" bitfld.long 0x00 29. " SPB157 ,Set Pending Bit 157" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB156 ,Set Pending Bit 156" "Not pending,Pending" bitfld.long 0x00 27. " SPB155 ,Set Pending Bit 155" "Not pending,Pending" bitfld.long 0x00 26. " SPB154 ,Set Pending Bit 154" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB153 ,Set Pending Bit 153" "Not pending,Pending" bitfld.long 0x00 24. " SPB152 ,Set Pending Bit 152" "Not pending,Pending" bitfld.long 0x00 23. " SPB151 ,Set Pending Bit 151" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB150 ,Set Pending Bit 150" "Not pending,Pending" bitfld.long 0x00 21. " SPB149 ,Set Pending Bit 149" "Not pending,Pending" bitfld.long 0x00 20. " SPB148 ,Set Pending Bit 148" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB147 ,Set Pending Bit 147" "Not pending,Pending" bitfld.long 0x00 18. " SPB146 ,Set Pending Bit 146" "Not pending,Pending" bitfld.long 0x00 17. " SPB145 ,Set Pending Bit 145" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB144 ,Set Pending Bit 144" "Not pending,Pending" bitfld.long 0x00 15. " SPB143 ,Set Pending Bit 143" "Not pending,Pending" bitfld.long 0x00 14. " SPB142 ,Set Pending Bit 142" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB141 ,Set Pending Bit 141" "Not pending,Pending" bitfld.long 0x00 12. " SPB140 ,Set Pending Bit 140" "Not pending,Pending" bitfld.long 0x00 11. " SPB139 ,Set Pending Bit 139" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB138 ,Set Pending Bit 138" "Not pending,Pending" bitfld.long 0x00 9. " SPB137 ,Set Pending Bit 137" "Not pending,Pending" bitfld.long 0x00 8. " SPB136 ,Set Pending Bit 136" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB135 ,Set Pending Bit 135" "Not pending,Pending" bitfld.long 0x00 6. " SPB134 ,Set Pending Bit 134" "Not pending,Pending" bitfld.long 0x00 5. " SPB133 ,Set Pending Bit 133" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB132 ,Set Pending Bit 132" "Not pending,Pending" bitfld.long 0x00 3. " SPB131 ,Set Pending Bit 131" "Not pending,Pending" bitfld.long 0x00 2. " SPB130 ,Set Pending Bit 130" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB129 ,Set Pending Bit 129" "Not pending,Pending" bitfld.long 0x00 0. " SPB128 ,Set Pending Bit 128" "Not pending,Pending" group.long 0x1214++0x03 line.long 0x0 "GICD_ISPR5,Interrupt Set Pending Register 5" bitfld.long 0x00 31. " SPB191 ,Set Pending Bit 191" "Not pending,Pending" bitfld.long 0x00 30. " SPB190 ,Set Pending Bit 190" "Not pending,Pending" bitfld.long 0x00 29. " SPB189 ,Set Pending Bit 189" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB188 ,Set Pending Bit 188" "Not pending,Pending" bitfld.long 0x00 27. " SPB187 ,Set Pending Bit 187" "Not pending,Pending" bitfld.long 0x00 26. " SPB186 ,Set Pending Bit 186" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB185 ,Set Pending Bit 185" "Not pending,Pending" bitfld.long 0x00 24. " SPB184 ,Set Pending Bit 184" "Not pending,Pending" bitfld.long 0x00 23. " SPB183 ,Set Pending Bit 183" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB182 ,Set Pending Bit 182" "Not pending,Pending" bitfld.long 0x00 21. " SPB181 ,Set Pending Bit 181" "Not pending,Pending" bitfld.long 0x00 20. " SPB180 ,Set Pending Bit 180" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB179 ,Set Pending Bit 179" "Not pending,Pending" bitfld.long 0x00 18. " SPB178 ,Set Pending Bit 178" "Not pending,Pending" bitfld.long 0x00 17. " SPB177 ,Set Pending Bit 177" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB176 ,Set Pending Bit 176" "Not pending,Pending" bitfld.long 0x00 15. " SPB175 ,Set Pending Bit 175" "Not pending,Pending" bitfld.long 0x00 14. " SPB174 ,Set Pending Bit 174" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB173 ,Set Pending Bit 173" "Not pending,Pending" bitfld.long 0x00 12. " SPB172 ,Set Pending Bit 172" "Not pending,Pending" bitfld.long 0x00 11. " SPB171 ,Set Pending Bit 171" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB170 ,Set Pending Bit 170" "Not pending,Pending" bitfld.long 0x00 9. " SPB169 ,Set Pending Bit 169" "Not pending,Pending" bitfld.long 0x00 8. " SPB168 ,Set Pending Bit 168" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB167 ,Set Pending Bit 167" "Not pending,Pending" bitfld.long 0x00 6. " SPB166 ,Set Pending Bit 166" "Not pending,Pending" bitfld.long 0x00 5. " SPB165 ,Set Pending Bit 165" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB164 ,Set Pending Bit 164" "Not pending,Pending" bitfld.long 0x00 3. " SPB163 ,Set Pending Bit 163" "Not pending,Pending" bitfld.long 0x00 2. " SPB162 ,Set Pending Bit 162" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB161 ,Set Pending Bit 161" "Not pending,Pending" bitfld.long 0x00 0. " SPB160 ,Set Pending Bit 160" "Not pending,Pending" group.long 0x1218++0x03 line.long 0x0 "GICD_ISPR6,Interrupt Set Pending Register 6" bitfld.long 0x00 31. " SPB223 ,Set Pending Bit 223" "Not pending,Pending" bitfld.long 0x00 30. " SPB222 ,Set Pending Bit 222" "Not pending,Pending" bitfld.long 0x00 29. " SPB221 ,Set Pending Bit 221" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB220 ,Set Pending Bit 220" "Not pending,Pending" bitfld.long 0x00 27. " SPB219 ,Set Pending Bit 219" "Not pending,Pending" bitfld.long 0x00 26. " SPB218 ,Set Pending Bit 218" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB217 ,Set Pending Bit 217" "Not pending,Pending" bitfld.long 0x00 24. " SPB216 ,Set Pending Bit 216" "Not pending,Pending" bitfld.long 0x00 23. " SPB215 ,Set Pending Bit 215" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB214 ,Set Pending Bit 214" "Not pending,Pending" bitfld.long 0x00 21. " SPB213 ,Set Pending Bit 213" "Not pending,Pending" bitfld.long 0x00 20. " SPB212 ,Set Pending Bit 212" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB211 ,Set Pending Bit 211" "Not pending,Pending" bitfld.long 0x00 18. " SPB210 ,Set Pending Bit 210" "Not pending,Pending" bitfld.long 0x00 17. " SPB209 ,Set Pending Bit 209" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB208 ,Set Pending Bit 208" "Not pending,Pending" bitfld.long 0x00 15. " SPB207 ,Set Pending Bit 207" "Not pending,Pending" bitfld.long 0x00 14. " SPB206 ,Set Pending Bit 206" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB205 ,Set Pending Bit 205" "Not pending,Pending" bitfld.long 0x00 12. " SPB204 ,Set Pending Bit 204" "Not pending,Pending" bitfld.long 0x00 11. " SPB203 ,Set Pending Bit 203" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB202 ,Set Pending Bit 202" "Not pending,Pending" bitfld.long 0x00 9. " SPB201 ,Set Pending Bit 201" "Not pending,Pending" bitfld.long 0x00 8. " SPB200 ,Set Pending Bit 200" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB199 ,Set Pending Bit 199" "Not pending,Pending" bitfld.long 0x00 6. " SPB198 ,Set Pending Bit 198" "Not pending,Pending" bitfld.long 0x00 5. " SPB197 ,Set Pending Bit 197" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB196 ,Set Pending Bit 196" "Not pending,Pending" bitfld.long 0x00 3. " SPB195 ,Set Pending Bit 195" "Not pending,Pending" bitfld.long 0x00 2. " SPB194 ,Set Pending Bit 194" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB193 ,Set Pending Bit 193" "Not pending,Pending" bitfld.long 0x00 0. " SPB192 ,Set Pending Bit 192" "Not pending,Pending" group.long 0x121C++0x03 line.long 0x0 "GICD_ISPR7,Interrupt Set Pending Register 7" bitfld.long 0x00 31. " SPB255 ,Set Pending Bit 255" "Not pending,Pending" bitfld.long 0x00 30. " SPB254 ,Set Pending Bit 254" "Not pending,Pending" bitfld.long 0x00 29. " SPB253 ,Set Pending Bit 253" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB252 ,Set Pending Bit 252" "Not pending,Pending" bitfld.long 0x00 27. " SPB251 ,Set Pending Bit 251" "Not pending,Pending" bitfld.long 0x00 26. " SPB250 ,Set Pending Bit 250" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB249 ,Set Pending Bit 249" "Not pending,Pending" bitfld.long 0x00 24. " SPB248 ,Set Pending Bit 248" "Not pending,Pending" bitfld.long 0x00 23. " SPB247 ,Set Pending Bit 247" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB246 ,Set Pending Bit 246" "Not pending,Pending" bitfld.long 0x00 21. " SPB245 ,Set Pending Bit 245" "Not pending,Pending" bitfld.long 0x00 20. " SPB244 ,Set Pending Bit 244" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB243 ,Set Pending Bit 243" "Not pending,Pending" bitfld.long 0x00 18. " SPB242 ,Set Pending Bit 242" "Not pending,Pending" bitfld.long 0x00 17. " SPB241 ,Set Pending Bit 241" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB240 ,Set Pending Bit 240" "Not pending,Pending" bitfld.long 0x00 15. " SPB239 ,Set Pending Bit 239" "Not pending,Pending" bitfld.long 0x00 14. " SPB238 ,Set Pending Bit 238" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB237 ,Set Pending Bit 237" "Not pending,Pending" bitfld.long 0x00 12. " SPB236 ,Set Pending Bit 236" "Not pending,Pending" bitfld.long 0x00 11. " SPB235 ,Set Pending Bit 235" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB234 ,Set Pending Bit 234" "Not pending,Pending" bitfld.long 0x00 9. " SPB233 ,Set Pending Bit 233" "Not pending,Pending" bitfld.long 0x00 8. " SPB232 ,Set Pending Bit 232" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB231 ,Set Pending Bit 231" "Not pending,Pending" bitfld.long 0x00 6. " SPB230 ,Set Pending Bit 230" "Not pending,Pending" bitfld.long 0x00 5. " SPB229 ,Set Pending Bit 229" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB228 ,Set Pending Bit 228" "Not pending,Pending" bitfld.long 0x00 3. " SPB227 ,Set Pending Bit 227" "Not pending,Pending" bitfld.long 0x00 2. " SPB226 ,Set Pending Bit 226" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB225 ,Set Pending Bit 225" "Not pending,Pending" bitfld.long 0x00 0. " SPB224 ,Set Pending Bit 224" "Not pending,Pending" textline " " tree.end tree "Clear-Pending Registers" group.long 0x1280++0x03 line.long 0x0 "GICD_ICPR0,Interrupt Clear Pending Register 0" eventfld.long 0x00 31. " CPB31 ,Clear Pending Bit 31" "Not pending,Pending" eventfld.long 0x00 30. " CPB30 ,Clear Pending Bit 30" "Not pending,Pending" eventfld.long 0x00 29. " CPB29 ,Clear Pending Bit 29" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB28 ,Clear Pending Bit 28" "Not pending,Pending" eventfld.long 0x00 27. " CPB27 ,Clear Pending Bit 27" "Not pending,Pending" eventfld.long 0x00 26. " CPB26 ,Clear Pending Bit 26" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB25 ,Clear Pending Bit 25" "Not pending,Pending" eventfld.long 0x00 24. " CPB24 ,Clear Pending Bit 24" "Not pending,Pending" eventfld.long 0x00 23. " CPB23 ,Clear Pending Bit 23" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB22 ,Clear Pending Bit 22" "Not pending,Pending" eventfld.long 0x00 21. " CPB21 ,Clear Pending Bit 21" "Not pending,Pending" eventfld.long 0x00 20. " CPB20 ,Clear Pending Bit 20" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB19 ,Clear Pending Bit 19" "Not pending,Pending" eventfld.long 0x00 18. " CPB18 ,Clear Pending Bit 18" "Not pending,Pending" eventfld.long 0x00 17. " CPB17 ,Clear Pending Bit 17" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB16 ,Clear Pending Bit 16" "Not pending,Pending" eventfld.long 0x00 15. " CPB15 ,Clear Pending Bit 15" "Not pending,Pending" eventfld.long 0x00 14. " CPB14 ,Clear Pending Bit 14" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB13 ,Clear Pending Bit 13" "Not pending,Pending" eventfld.long 0x00 12. " CPB12 ,Clear Pending Bit 12" "Not pending,Pending" eventfld.long 0x00 11. " CPB11 ,Clear Pending Bit 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB10 ,Clear Pending Bit 10" "Not pending,Pending" eventfld.long 0x00 9. " CPB9 ,Clear Pending Bit 9" "Not pending,Pending" eventfld.long 0x00 8. " CPB8 ,Clear Pending Bit 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB7 ,Clear Pending Bit 7" "Not pending,Pending" eventfld.long 0x00 6. " CPB6 ,Clear Pending Bit 6" "Not pending,Pending" eventfld.long 0x00 5. " CPB5 ,Clear Pending Bit 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB4 ,Clear Pending Bit 4" "Not pending,Pending" eventfld.long 0x00 3. " CPB3 ,Clear Pending Bit 3" "Not pending,Pending" eventfld.long 0x00 2. " CPB2 ,Clear Pending Bit 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB1 ,Clear Pending Bit 1" "Not pending,Pending" eventfld.long 0x00 0. " CPB0 ,Clear Pending Bit 0" "Not pending,Pending" group.long 0x1284++0x03 line.long 0x0 "GICD_ICPR1,Interrupt Clear Pending Register 1" eventfld.long 0x00 31. " CPB63 ,Clear Pending Bit 63" "Not pending,Pending" eventfld.long 0x00 30. " CPB62 ,Clear Pending Bit 62" "Not pending,Pending" eventfld.long 0x00 29. " CPB61 ,Clear Pending Bit 61" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB60 ,Clear Pending Bit 60" "Not pending,Pending" eventfld.long 0x00 27. " CPB59 ,Clear Pending Bit 59" "Not pending,Pending" eventfld.long 0x00 26. " CPB58 ,Clear Pending Bit 58" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB57 ,Clear Pending Bit 57" "Not pending,Pending" eventfld.long 0x00 24. " CPB56 ,Clear Pending Bit 56" "Not pending,Pending" eventfld.long 0x00 23. " CPB55 ,Clear Pending Bit 55" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB54 ,Clear Pending Bit 54" "Not pending,Pending" eventfld.long 0x00 21. " CPB53 ,Clear Pending Bit 53" "Not pending,Pending" eventfld.long 0x00 20. " CPB52 ,Clear Pending Bit 52" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB51 ,Clear Pending Bit 51" "Not pending,Pending" eventfld.long 0x00 18. " CPB50 ,Clear Pending Bit 50" "Not pending,Pending" eventfld.long 0x00 17. " CPB49 ,Clear Pending Bit 49" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB48 ,Clear Pending Bit 48" "Not pending,Pending" eventfld.long 0x00 15. " CPB47 ,Clear Pending Bit 47" "Not pending,Pending" eventfld.long 0x00 14. " CPB46 ,Clear Pending Bit 46" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB45 ,Clear Pending Bit 45" "Not pending,Pending" eventfld.long 0x00 12. " CPB44 ,Clear Pending Bit 44" "Not pending,Pending" eventfld.long 0x00 11. " CPB43 ,Clear Pending Bit 43" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB42 ,Clear Pending Bit 42" "Not pending,Pending" eventfld.long 0x00 9. " CPB41 ,Clear Pending Bit 41" "Not pending,Pending" eventfld.long 0x00 8. " CPB40 ,Clear Pending Bit 40" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB39 ,Clear Pending Bit 39" "Not pending,Pending" eventfld.long 0x00 6. " CPB38 ,Clear Pending Bit 38" "Not pending,Pending" eventfld.long 0x00 5. " CPB37 ,Clear Pending Bit 37" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB36 ,Clear Pending Bit 36" "Not pending,Pending" eventfld.long 0x00 3. " CPB35 ,Clear Pending Bit 35" "Not pending,Pending" eventfld.long 0x00 2. " CPB34 ,Clear Pending Bit 34" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB33 ,Clear Pending Bit 33" "Not pending,Pending" eventfld.long 0x00 0. " CPB32 ,Clear Pending Bit 32" "Not pending,Pending" group.long 0x1288++0x03 line.long 0x0 "GICD_ICPR2,Interrupt Clear Pending Register 2" eventfld.long 0x00 31. " CPB95 ,Clear Pending Bit 95" "Not pending,Pending" eventfld.long 0x00 30. " CPB94 ,Clear Pending Bit 94" "Not pending,Pending" eventfld.long 0x00 29. " CPB93 ,Clear Pending Bit 93" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB92 ,Clear Pending Bit 92" "Not pending,Pending" eventfld.long 0x00 27. " CPB91 ,Clear Pending Bit 91" "Not pending,Pending" eventfld.long 0x00 26. " CPB90 ,Clear Pending Bit 90" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB89 ,Clear Pending Bit 89" "Not pending,Pending" eventfld.long 0x00 24. " CPB88 ,Clear Pending Bit 88" "Not pending,Pending" eventfld.long 0x00 23. " CPB87 ,Clear Pending Bit 87" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB86 ,Clear Pending Bit 86" "Not pending,Pending" eventfld.long 0x00 21. " CPB85 ,Clear Pending Bit 85" "Not pending,Pending" eventfld.long 0x00 20. " CPB84 ,Clear Pending Bit 84" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB83 ,Clear Pending Bit 83" "Not pending,Pending" eventfld.long 0x00 18. " CPB82 ,Clear Pending Bit 82" "Not pending,Pending" eventfld.long 0x00 17. " CPB81 ,Clear Pending Bit 81" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB80 ,Clear Pending Bit 80" "Not pending,Pending" eventfld.long 0x00 15. " CPB79 ,Clear Pending Bit 79" "Not pending,Pending" eventfld.long 0x00 14. " CPB78 ,Clear Pending Bit 78" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB77 ,Clear Pending Bit 77" "Not pending,Pending" eventfld.long 0x00 12. " CPB76 ,Clear Pending Bit 76" "Not pending,Pending" eventfld.long 0x00 11. " CPB75 ,Clear Pending Bit 75" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB74 ,Clear Pending Bit 74" "Not pending,Pending" eventfld.long 0x00 9. " CPB73 ,Clear Pending Bit 73" "Not pending,Pending" eventfld.long 0x00 8. " CPB72 ,Clear Pending Bit 72" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB71 ,Clear Pending Bit 71" "Not pending,Pending" eventfld.long 0x00 6. " CPB70 ,Clear Pending Bit 70" "Not pending,Pending" eventfld.long 0x00 5. " CPB69 ,Clear Pending Bit 69" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB68 ,Clear Pending Bit 68" "Not pending,Pending" eventfld.long 0x00 3. " CPB67 ,Clear Pending Bit 67" "Not pending,Pending" eventfld.long 0x00 2. " CPB66 ,Clear Pending Bit 66" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB65 ,Clear Pending Bit 65" "Not pending,Pending" eventfld.long 0x00 0. " CPB64 ,Clear Pending Bit 64" "Not pending,Pending" group.long 0x128C++0x03 line.long 0x0 "GICD_ICPR3,Interrupt Clear Pending Register 3" eventfld.long 0x00 31. " CPB127 ,Clear Pending Bit 127" "Not pending,Pending" eventfld.long 0x00 30. " CPB126 ,Clear Pending Bit 126" "Not pending,Pending" eventfld.long 0x00 29. " CPB125 ,Clear Pending Bit 125" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB124 ,Clear Pending Bit 124" "Not pending,Pending" eventfld.long 0x00 27. " CPB123 ,Clear Pending Bit 123" "Not pending,Pending" eventfld.long 0x00 26. " CPB122 ,Clear Pending Bit 122" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB121 ,Clear Pending Bit 121" "Not pending,Pending" eventfld.long 0x00 24. " CPB120 ,Clear Pending Bit 120" "Not pending,Pending" eventfld.long 0x00 23. " CPB119 ,Clear Pending Bit 119" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB118 ,Clear Pending Bit 118" "Not pending,Pending" eventfld.long 0x00 21. " CPB117 ,Clear Pending Bit 117" "Not pending,Pending" eventfld.long 0x00 20. " CPB116 ,Clear Pending Bit 116" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB115 ,Clear Pending Bit 115" "Not pending,Pending" eventfld.long 0x00 18. " CPB114 ,Clear Pending Bit 114" "Not pending,Pending" eventfld.long 0x00 17. " CPB113 ,Clear Pending Bit 113" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB112 ,Clear Pending Bit 112" "Not pending,Pending" eventfld.long 0x00 15. " CPB111 ,Clear Pending Bit 111" "Not pending,Pending" eventfld.long 0x00 14. " CPB110 ,Clear Pending Bit 110" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB109 ,Clear Pending Bit 109" "Not pending,Pending" eventfld.long 0x00 12. " CPB108 ,Clear Pending Bit 108" "Not pending,Pending" eventfld.long 0x00 11. " CPB107 ,Clear Pending Bit 107" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB106 ,Clear Pending Bit 106" "Not pending,Pending" eventfld.long 0x00 9. " CPB105 ,Clear Pending Bit 105" "Not pending,Pending" eventfld.long 0x00 8. " CPB104 ,Clear Pending Bit 104" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB103 ,Clear Pending Bit 103" "Not pending,Pending" eventfld.long 0x00 6. " CPB102 ,Clear Pending Bit 102" "Not pending,Pending" eventfld.long 0x00 5. " CPB101 ,Clear Pending Bit 101" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB100 ,Clear Pending Bit 100" "Not pending,Pending" eventfld.long 0x00 3. " CPB99 ,Clear Pending Bit 99" "Not pending,Pending" eventfld.long 0x00 2. " CPB98 ,Clear Pending Bit 98" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB97 ,Clear Pending Bit 97" "Not pending,Pending" eventfld.long 0x00 0. " CPB96 ,Clear Pending Bit 96" "Not pending,Pending" group.long 0x1290++0x03 line.long 0x0 "GICD_ICPR4,Interrupt Clear Pending Register 4" eventfld.long 0x00 31. " CPB159 ,Clear Pending Bit 159" "Not pending,Pending" eventfld.long 0x00 30. " CPB158 ,Clear Pending Bit 158" "Not pending,Pending" eventfld.long 0x00 29. " CPB157 ,Clear Pending Bit 157" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB156 ,Clear Pending Bit 156" "Not pending,Pending" eventfld.long 0x00 27. " CPB155 ,Clear Pending Bit 155" "Not pending,Pending" eventfld.long 0x00 26. " CPB154 ,Clear Pending Bit 154" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB153 ,Clear Pending Bit 153" "Not pending,Pending" eventfld.long 0x00 24. " CPB152 ,Clear Pending Bit 152" "Not pending,Pending" eventfld.long 0x00 23. " CPB151 ,Clear Pending Bit 151" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB150 ,Clear Pending Bit 150" "Not pending,Pending" eventfld.long 0x00 21. " CPB149 ,Clear Pending Bit 149" "Not pending,Pending" eventfld.long 0x00 20. " CPB148 ,Clear Pending Bit 148" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB147 ,Clear Pending Bit 147" "Not pending,Pending" eventfld.long 0x00 18. " CPB146 ,Clear Pending Bit 146" "Not pending,Pending" eventfld.long 0x00 17. " CPB145 ,Clear Pending Bit 145" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB144 ,Clear Pending Bit 144" "Not pending,Pending" eventfld.long 0x00 15. " CPB143 ,Clear Pending Bit 143" "Not pending,Pending" eventfld.long 0x00 14. " CPB142 ,Clear Pending Bit 142" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB141 ,Clear Pending Bit 141" "Not pending,Pending" eventfld.long 0x00 12. " CPB140 ,Clear Pending Bit 140" "Not pending,Pending" eventfld.long 0x00 11. " CPB139 ,Clear Pending Bit 139" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB138 ,Clear Pending Bit 138" "Not pending,Pending" eventfld.long 0x00 9. " CPB137 ,Clear Pending Bit 137" "Not pending,Pending" eventfld.long 0x00 8. " CPB136 ,Clear Pending Bit 136" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB135 ,Clear Pending Bit 135" "Not pending,Pending" eventfld.long 0x00 6. " CPB134 ,Clear Pending Bit 134" "Not pending,Pending" eventfld.long 0x00 5. " CPB133 ,Clear Pending Bit 133" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB132 ,Clear Pending Bit 132" "Not pending,Pending" eventfld.long 0x00 3. " CPB131 ,Clear Pending Bit 131" "Not pending,Pending" eventfld.long 0x00 2. " CPB130 ,Clear Pending Bit 130" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB129 ,Clear Pending Bit 129" "Not pending,Pending" eventfld.long 0x00 0. " CPB128 ,Clear Pending Bit 128" "Not pending,Pending" group.long 0x1294++0x03 line.long 0x0 "GICD_ICPR5,Interrupt Clear Pending Register 5" eventfld.long 0x00 31. " CPB191 ,Clear Pending Bit 191" "Not pending,Pending" eventfld.long 0x00 30. " CPB190 ,Clear Pending Bit 190" "Not pending,Pending" eventfld.long 0x00 29. " CPB189 ,Clear Pending Bit 189" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB188 ,Clear Pending Bit 188" "Not pending,Pending" eventfld.long 0x00 27. " CPB187 ,Clear Pending Bit 187" "Not pending,Pending" eventfld.long 0x00 26. " CPB186 ,Clear Pending Bit 186" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB185 ,Clear Pending Bit 185" "Not pending,Pending" eventfld.long 0x00 24. " CPB184 ,Clear Pending Bit 184" "Not pending,Pending" eventfld.long 0x00 23. " CPB183 ,Clear Pending Bit 183" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB182 ,Clear Pending Bit 182" "Not pending,Pending" eventfld.long 0x00 21. " CPB181 ,Clear Pending Bit 181" "Not pending,Pending" eventfld.long 0x00 20. " CPB180 ,Clear Pending Bit 180" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB179 ,Clear Pending Bit 179" "Not pending,Pending" eventfld.long 0x00 18. " CPB178 ,Clear Pending Bit 178" "Not pending,Pending" eventfld.long 0x00 17. " CPB177 ,Clear Pending Bit 177" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB176 ,Clear Pending Bit 176" "Not pending,Pending" eventfld.long 0x00 15. " CPB175 ,Clear Pending Bit 175" "Not pending,Pending" eventfld.long 0x00 14. " CPB174 ,Clear Pending Bit 174" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB173 ,Clear Pending Bit 173" "Not pending,Pending" eventfld.long 0x00 12. " CPB172 ,Clear Pending Bit 172" "Not pending,Pending" eventfld.long 0x00 11. " CPB171 ,Clear Pending Bit 171" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB170 ,Clear Pending Bit 170" "Not pending,Pending" eventfld.long 0x00 9. " CPB169 ,Clear Pending Bit 169" "Not pending,Pending" eventfld.long 0x00 8. " CPB168 ,Clear Pending Bit 168" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB167 ,Clear Pending Bit 167" "Not pending,Pending" eventfld.long 0x00 6. " CPB166 ,Clear Pending Bit 166" "Not pending,Pending" eventfld.long 0x00 5. " CPB165 ,Clear Pending Bit 165" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB164 ,Clear Pending Bit 164" "Not pending,Pending" eventfld.long 0x00 3. " CPB163 ,Clear Pending Bit 163" "Not pending,Pending" eventfld.long 0x00 2. " CPB162 ,Clear Pending Bit 162" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB161 ,Clear Pending Bit 161" "Not pending,Pending" eventfld.long 0x00 0. " CPB160 ,Clear Pending Bit 160" "Not pending,Pending" group.long 0x1298++0x03 line.long 0x0 "GICD_ICPR6,Interrupt Clear Pending Register 6" eventfld.long 0x00 31. " CPB223 ,Clear Pending Bit 223" "Not pending,Pending" eventfld.long 0x00 30. " CPB222 ,Clear Pending Bit 222" "Not pending,Pending" eventfld.long 0x00 29. " CPB221 ,Clear Pending Bit 221" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB220 ,Clear Pending Bit 220" "Not pending,Pending" eventfld.long 0x00 27. " CPB219 ,Clear Pending Bit 219" "Not pending,Pending" eventfld.long 0x00 26. " CPB218 ,Clear Pending Bit 218" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB217 ,Clear Pending Bit 217" "Not pending,Pending" eventfld.long 0x00 24. " CPB216 ,Clear Pending Bit 216" "Not pending,Pending" eventfld.long 0x00 23. " CPB215 ,Clear Pending Bit 215" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB214 ,Clear Pending Bit 214" "Not pending,Pending" eventfld.long 0x00 21. " CPB213 ,Clear Pending Bit 213" "Not pending,Pending" eventfld.long 0x00 20. " CPB212 ,Clear Pending Bit 212" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB211 ,Clear Pending Bit 211" "Not pending,Pending" eventfld.long 0x00 18. " CPB210 ,Clear Pending Bit 210" "Not pending,Pending" eventfld.long 0x00 17. " CPB209 ,Clear Pending Bit 209" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB208 ,Clear Pending Bit 208" "Not pending,Pending" eventfld.long 0x00 15. " CPB207 ,Clear Pending Bit 207" "Not pending,Pending" eventfld.long 0x00 14. " CPB206 ,Clear Pending Bit 206" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB205 ,Clear Pending Bit 205" "Not pending,Pending" eventfld.long 0x00 12. " CPB204 ,Clear Pending Bit 204" "Not pending,Pending" eventfld.long 0x00 11. " CPB203 ,Clear Pending Bit 203" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB202 ,Clear Pending Bit 202" "Not pending,Pending" eventfld.long 0x00 9. " CPB201 ,Clear Pending Bit 201" "Not pending,Pending" eventfld.long 0x00 8. " CPB200 ,Clear Pending Bit 200" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB199 ,Clear Pending Bit 199" "Not pending,Pending" eventfld.long 0x00 6. " CPB198 ,Clear Pending Bit 198" "Not pending,Pending" eventfld.long 0x00 5. " CPB197 ,Clear Pending Bit 197" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB196 ,Clear Pending Bit 196" "Not pending,Pending" eventfld.long 0x00 3. " CPB195 ,Clear Pending Bit 195" "Not pending,Pending" eventfld.long 0x00 2. " CPB194 ,Clear Pending Bit 194" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB193 ,Clear Pending Bit 193" "Not pending,Pending" eventfld.long 0x00 0. " CPB192 ,Clear Pending Bit 192" "Not pending,Pending" group.long 0x129C++0x03 line.long 0x0 "GICD_ICPR7,Interrupt Clear Pending Register 7" eventfld.long 0x00 31. " CPB255 ,Clear Pending Bit 255" "Not pending,Pending" eventfld.long 0x00 30. " CPB254 ,Clear Pending Bit 254" "Not pending,Pending" eventfld.long 0x00 29. " CPB253 ,Clear Pending Bit 253" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB252 ,Clear Pending Bit 252" "Not pending,Pending" eventfld.long 0x00 27. " CPB251 ,Clear Pending Bit 251" "Not pending,Pending" eventfld.long 0x00 26. " CPB250 ,Clear Pending Bit 250" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB249 ,Clear Pending Bit 249" "Not pending,Pending" eventfld.long 0x00 24. " CPB248 ,Clear Pending Bit 248" "Not pending,Pending" eventfld.long 0x00 23. " CPB247 ,Clear Pending Bit 247" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB246 ,Clear Pending Bit 246" "Not pending,Pending" eventfld.long 0x00 21. " CPB245 ,Clear Pending Bit 245" "Not pending,Pending" eventfld.long 0x00 20. " CPB244 ,Clear Pending Bit 244" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB243 ,Clear Pending Bit 243" "Not pending,Pending" eventfld.long 0x00 18. " CPB242 ,Clear Pending Bit 242" "Not pending,Pending" eventfld.long 0x00 17. " CPB241 ,Clear Pending Bit 241" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB240 ,Clear Pending Bit 240" "Not pending,Pending" eventfld.long 0x00 15. " CPB239 ,Clear Pending Bit 239" "Not pending,Pending" eventfld.long 0x00 14. " CPB238 ,Clear Pending Bit 238" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB237 ,Clear Pending Bit 237" "Not pending,Pending" eventfld.long 0x00 12. " CPB236 ,Clear Pending Bit 236" "Not pending,Pending" eventfld.long 0x00 11. " CPB235 ,Clear Pending Bit 235" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB234 ,Clear Pending Bit 234" "Not pending,Pending" eventfld.long 0x00 9. " CPB233 ,Clear Pending Bit 233" "Not pending,Pending" eventfld.long 0x00 8. " CPB232 ,Clear Pending Bit 232" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB231 ,Clear Pending Bit 231" "Not pending,Pending" eventfld.long 0x00 6. " CPB230 ,Clear Pending Bit 230" "Not pending,Pending" eventfld.long 0x00 5. " CPB229 ,Clear Pending Bit 229" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB228 ,Clear Pending Bit 228" "Not pending,Pending" eventfld.long 0x00 3. " CPB227 ,Clear Pending Bit 227" "Not pending,Pending" eventfld.long 0x00 2. " CPB226 ,Clear Pending Bit 226" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB225 ,Clear Pending Bit 225" "Not pending,Pending" eventfld.long 0x00 0. " CPB224 ,Clear Pending Bit 224" "Not pending,Pending" textline " " tree.end tree "Set/Clear Active Registers" group.long 0x1300++0x03 line.long 0x0 "GICD_ISACTIVER0,Interrupt Set Active Register 0" group.long 0x1304++0x03 line.long 0x0 "GICD_ISACTIVER1,Interrupt Set Active Register 1" group.long 0x1308++0x03 line.long 0x0 "GICD_ISACTIVER2,Interrupt Set Active Register 2" group.long 0x130C++0x03 line.long 0x0 "GICD_ISACTIVER3,Interrupt Set Active Register 3" group.long 0x1310++0x03 line.long 0x0 "GICD_ISACTIVER4,Interrupt Set Active Register 4" group.long 0x1314++0x03 line.long 0x0 "GICD_ISACTIVER5,Interrupt Set Active Register 5" group.long 0x1318++0x03 line.long 0x0 "GICD_ISACTIVER6,Interrupt Set Active Register 6" group.long 0x131C++0x03 line.long 0x0 "GICD_ISACTIVER7,Interrupt Set Active Register 7" textline " " group.long 0x1380++0x03 line.long 0x0 "GICD_ICACTIVER0,Interrupt Clear Active Register 0" group.long 0x1384++0x03 line.long 0x0 "GICD_ICACTIVER1,Interrupt Clear Active Register 1" group.long 0x1388++0x03 line.long 0x0 "GICD_ICACTIVER2,Interrupt Clear Active Register 2" group.long 0x138C++0x03 line.long 0x0 "GICD_ICACTIVER3,Interrupt Clear Active Register 3" group.long 0x1390++0x03 line.long 0x0 "GICD_ICACTIVER4,Interrupt Clear Active Register 4" group.long 0x1394++0x03 line.long 0x0 "GICD_ICACTIVER5,Interrupt Clear Active Register 5" group.long 0x1398++0x03 line.long 0x0 "GICD_ICACTIVER6,Interrupt Clear Active Register 6" group.long 0x139C++0x03 line.long 0x0 "GICD_ICACTIVER7,Interrupt Clear Active Register 7" textline " " tree.end tree "Priority Registers" group.long 0x1400++0x03 line.long 0x0 "GICD_IPR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1404++0x03 line.long 0x0 "GICD_IPR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1408++0x03 line.long 0x0 "GICD_IPR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x140C++0x03 line.long 0x0 "GICD_IPR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1410++0x03 line.long 0x0 "GICD_IPR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1414++0x03 line.long 0x0 "GICD_IPR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1418++0x03 line.long 0x0 "GICD_IPR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x141C++0x03 line.long 0x0 "GICD_IPR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1420++0x03 line.long 0x0 "GICD_IPR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1424++0x03 line.long 0x0 "GICD_IPR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1428++0x03 line.long 0x0 "GICD_IPR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x142C++0x03 line.long 0x0 "GICD_IPR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1430++0x03 line.long 0x0 "GICD_IPR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1434++0x03 line.long 0x0 "GICD_IPR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1438++0x03 line.long 0x0 "GICD_IPR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x143C++0x03 line.long 0x0 "GICD_IPR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1440++0x03 line.long 0x0 "GICD_IPR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1444++0x03 line.long 0x0 "GICD_IPR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1448++0x03 line.long 0x0 "GICD_IPR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x144C++0x03 line.long 0x0 "GICD_IPR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1450++0x03 line.long 0x0 "GICD_IPR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1454++0x03 line.long 0x0 "GICD_IPR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1458++0x03 line.long 0x0 "GICD_IPR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x145C++0x03 line.long 0x0 "GICD_IPR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1460++0x03 line.long 0x0 "GICD_IPR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1464++0x03 line.long 0x0 "GICD_IPR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1468++0x03 line.long 0x0 "GICD_IPR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x146C++0x03 line.long 0x0 "GICD_IPR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1470++0x03 line.long 0x0 "GICD_IPR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1474++0x03 line.long 0x0 "GICD_IPR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1478++0x03 line.long 0x0 "GICD_IPR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x147C++0x03 line.long 0x0 "GICD_IPR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1480++0x03 line.long 0x0 "GICD_IPR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1484++0x03 line.long 0x0 "GICD_IPR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1488++0x03 line.long 0x0 "GICD_IPR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x148C++0x03 line.long 0x0 "GICD_IPR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1490++0x03 line.long 0x0 "GICD_IPR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1494++0x03 line.long 0x0 "GICD_IPR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1498++0x03 line.long 0x0 "GICD_IPR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x149C++0x03 line.long 0x0 "GICD_IPR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A0++0x03 line.long 0x0 "GICD_IPR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A4++0x03 line.long 0x0 "GICD_IPR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A8++0x03 line.long 0x0 "GICD_IPR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14AC++0x03 line.long 0x0 "GICD_IPR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B0++0x03 line.long 0x0 "GICD_IPR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B4++0x03 line.long 0x0 "GICD_IPR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B8++0x03 line.long 0x0 "GICD_IPR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14BC++0x03 line.long 0x0 "GICD_IPR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C0++0x03 line.long 0x0 "GICD_IPR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C4++0x03 line.long 0x0 "GICD_IPR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C8++0x03 line.long 0x0 "GICD_IPR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14CC++0x03 line.long 0x0 "GICD_IPR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D0++0x03 line.long 0x0 "GICD_IPR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D4++0x03 line.long 0x0 "GICD_IPR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D8++0x03 line.long 0x0 "GICD_IPR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14DC++0x03 line.long 0x0 "GICD_IPR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E0++0x03 line.long 0x0 "GICD_IPR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E4++0x03 line.long 0x0 "GICD_IPR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E8++0x03 line.long 0x0 "GICD_IPR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14EC++0x03 line.long 0x0 "GICD_IPR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F0++0x03 line.long 0x0 "GICD_IPR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F4++0x03 line.long 0x0 "GICD_IPR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F8++0x03 line.long 0x0 "GICD_IPR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14FC++0x03 line.long 0x0 "GICD_IPR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" textline " " tree.end tree "Processor Targets Registers" rgroup.long 0x1800++0x03 line.long 0x0 "GICD_IPTR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1804++0x03 line.long 0x0 "GICD_IPTR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1808++0x03 line.long 0x0 "GICD_IPTR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x180C++0x03 line.long 0x0 "GICD_IPTR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1810++0x03 line.long 0x0 "GICD_IPTR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1814++0x03 line.long 0x0 "GICD_IPTR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1818++0x03 line.long 0x0 "GICD_IPTR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x181C++0x03 line.long 0x0 "GICD_IPTR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1820++0x03 line.long 0x0 "GICD_IPTR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1824++0x03 line.long 0x0 "GICD_IPTR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1828++0x03 line.long 0x0 "GICD_IPTR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x182C++0x03 line.long 0x0 "GICD_IPTR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1830++0x03 line.long 0x0 "GICD_IPTR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1834++0x03 line.long 0x0 "GICD_IPTR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1838++0x03 line.long 0x0 "GICD_IPTR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x183C++0x03 line.long 0x0 "GICD_IPTR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1840++0x03 line.long 0x0 "GICD_IPTR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1844++0x03 line.long 0x0 "GICD_IPTR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1848++0x03 line.long 0x0 "GICD_IPTR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x184C++0x03 line.long 0x0 "GICD_IPTR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1850++0x03 line.long 0x0 "GICD_IPTR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1854++0x03 line.long 0x0 "GICD_IPTR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1858++0x03 line.long 0x0 "GICD_IPTR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x185C++0x03 line.long 0x0 "GICD_IPTR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1860++0x03 line.long 0x0 "GICD_IPTR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1864++0x03 line.long 0x0 "GICD_IPTR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1868++0x03 line.long 0x0 "GICD_IPTR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x186C++0x03 line.long 0x0 "GICD_IPTR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1870++0x03 line.long 0x0 "GICD_IPTR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1874++0x03 line.long 0x0 "GICD_IPTR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1878++0x03 line.long 0x0 "GICD_IPTR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x187C++0x03 line.long 0x0 "GICD_IPTR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1880++0x03 line.long 0x0 "GICD_IPTR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1884++0x03 line.long 0x0 "GICD_IPTR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1888++0x03 line.long 0x0 "GICD_IPTR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x188C++0x03 line.long 0x0 "GICD_IPTR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1890++0x03 line.long 0x0 "GICD_IPTR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1894++0x03 line.long 0x0 "GICD_IPTR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1898++0x03 line.long 0x0 "GICD_IPTR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x189C++0x03 line.long 0x0 "GICD_IPTR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A0++0x03 line.long 0x0 "GICD_IPTR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A4++0x03 line.long 0x0 "GICD_IPTR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A8++0x03 line.long 0x0 "GICD_IPTR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18AC++0x03 line.long 0x0 "GICD_IPTR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B0++0x03 line.long 0x0 "GICD_IPTR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B4++0x03 line.long 0x0 "GICD_IPTR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B8++0x03 line.long 0x0 "GICD_IPTR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18BC++0x03 line.long 0x0 "GICD_IPTR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C0++0x03 line.long 0x0 "GICD_IPTR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C4++0x03 line.long 0x0 "GICD_IPTR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C8++0x03 line.long 0x0 "GICD_IPTR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18CC++0x03 line.long 0x0 "GICD_IPTR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D0++0x03 line.long 0x0 "GICD_IPTR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D4++0x03 line.long 0x0 "GICD_IPTR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D8++0x03 line.long 0x0 "GICD_IPTR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18DC++0x03 line.long 0x0 "GICD_IPTR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E0++0x03 line.long 0x0 "GICD_IPTR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E4++0x03 line.long 0x0 "GICD_IPTR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E8++0x03 line.long 0x0 "GICD_IPTR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18EC++0x03 line.long 0x0 "GICD_IPTR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F0++0x03 line.long 0x0 "GICD_IPTR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F4++0x03 line.long 0x0 "GICD_IPTR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F8++0x03 line.long 0x0 "GICD_IPTR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18FC++0x03 line.long 0x0 "GICD_IPTR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" textline " " tree.end tree "Configuration Registers" rgroup.long 0x1C00++0x03 line.long 0x00 "GICD_ICFR0,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" rgroup.long 0x1C04++0x03 line.long 0x00 "GICD_ICFR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C08++0x03 line.long 0x00 "GICD_ICFR2,Interrupt Configuration Register 0x1C08" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C0C++0x03 line.long 0x00 "GICD_ICFR3,Interrupt Configuration Register 0x1C0C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C10++0x03 line.long 0x00 "GICD_ICFR4,Interrupt Configuration Register 0x1C10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C14++0x03 line.long 0x00 "GICD_ICFR5,Interrupt Configuration Register 0x1C14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C18++0x03 line.long 0x00 "GICD_ICFR6,Interrupt Configuration Register 0x1C18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C1C++0x03 line.long 0x00 "GICD_ICFR7,Interrupt Configuration Register 0x1C1C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C20++0x03 line.long 0x00 "GICD_ICFR8,Interrupt Configuration Register 0x1C20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C24++0x03 line.long 0x00 "GICD_ICFR9,Interrupt Configuration Register 0x1C24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C28++0x03 line.long 0x00 "GICD_ICFR10,Interrupt Configuration Register 0x1C28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C2C++0x03 line.long 0x00 "GICD_ICFR11,Interrupt Configuration Register 0x1C2C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C30++0x03 line.long 0x00 "GICD_ICFR12,Interrupt Configuration Register 0x1C30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C34++0x03 line.long 0x00 "GICD_ICFR13,Interrupt Configuration Register 0x1C34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C38++0x03 line.long 0x00 "GICD_ICFR14,Interrupt Configuration Register 0x1C38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C3C++0x03 line.long 0x00 "GICD_ICFR15,Interrupt Configuration Register 0x1C3C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " tree.end width 17. tree "Private/Shared Peripheral Interrupt Status Registers" rgroup.long 0x1D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" rgroup.long 0x1D04++0x03 line.long 0x00 "GICD_SPISR0,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[31] ,IRQS[31] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[30] ,IRQS[30] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[29] ,IRQS[29] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[28] ,IRQS[28] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[27] ,IRQS[27] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[26] ,IRQS[26] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[25] ,IRQS[25] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[24] ,IRQS[24] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[23] ,IRQS[23] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[22] ,IRQS[22] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[21] ,IRQS[21] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[20] ,IRQS[20] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[19] ,IRQS[19] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[18] ,IRQS[18] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[17] ,IRQS[17] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[16] ,IRQS[16] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[15] ,IRQS[15] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[14] ,IRQS[14] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[13] ,IRQS[13] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[12] ,IRQS[12] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[11] ,IRQS[11] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[10] ,IRQS[10] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[9] ,IRQS[9] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[8] ,IRQS[8] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[7] ,IRQS[7] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[6] ,IRQS[6] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[5] ,IRQS[5] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[4] ,IRQS[4] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[3] ,IRQS[3] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[2] ,IRQS[2] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[1] ,IRQS[1] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[0] ,IRQS[0] status" "No interrupt,Interrupt" rgroup.long 0x1D08++0x03 line.long 0x00 "GICD_SPISR1,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[63] ,IRQS[63] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[62] ,IRQS[62] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[61] ,IRQS[61] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[60] ,IRQS[60] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[59] ,IRQS[59] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[58] ,IRQS[58] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[57] ,IRQS[57] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[56] ,IRQS[56] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[55] ,IRQS[55] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[54] ,IRQS[54] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[53] ,IRQS[53] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[52] ,IRQS[52] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[51] ,IRQS[51] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[50] ,IRQS[50] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[49] ,IRQS[49] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[48] ,IRQS[48] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[47] ,IRQS[47] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[46] ,IRQS[46] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[45] ,IRQS[45] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[44] ,IRQS[44] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[43] ,IRQS[43] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[42] ,IRQS[42] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[41] ,IRQS[41] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[40] ,IRQS[40] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[39] ,IRQS[39] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[38] ,IRQS[38] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[37] ,IRQS[37] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[36] ,IRQS[36] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[35] ,IRQS[35] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[34] ,IRQS[34] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[33] ,IRQS[33] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[32] ,IRQS[32] status" "No interrupt,Interrupt" rgroup.long 0x1D0C++0x03 line.long 0x00 "GICD_SPISR2,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[95] ,IRQS[95] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[94] ,IRQS[94] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[93] ,IRQS[93] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[92] ,IRQS[92] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[91] ,IRQS[91] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[90] ,IRQS[90] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[89] ,IRQS[89] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[88] ,IRQS[88] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[87] ,IRQS[87] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[86] ,IRQS[86] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[85] ,IRQS[85] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[84] ,IRQS[84] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[83] ,IRQS[83] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[82] ,IRQS[82] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[81] ,IRQS[81] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[80] ,IRQS[80] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[79] ,IRQS[79] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[78] ,IRQS[78] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[77] ,IRQS[77] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[76] ,IRQS[76] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[75] ,IRQS[75] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[74] ,IRQS[74] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[73] ,IRQS[73] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[72] ,IRQS[72] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[71] ,IRQS[71] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[70] ,IRQS[70] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[69] ,IRQS[69] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[68] ,IRQS[68] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[67] ,IRQS[67] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[66] ,IRQS[66] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[65] ,IRQS[65] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[64] ,IRQS[64] status" "No interrupt,Interrupt" rgroup.long 0x1D10++0x03 line.long 0x00 "GICD_SPISR3,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[127] ,IRQS[127] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[126] ,IRQS[126] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[125] ,IRQS[125] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[124] ,IRQS[124] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[123] ,IRQS[123] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[122] ,IRQS[122] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[121] ,IRQS[121] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[120] ,IRQS[120] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[119] ,IRQS[119] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[118] ,IRQS[118] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[117] ,IRQS[117] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[116] ,IRQS[116] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[115] ,IRQS[115] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[114] ,IRQS[114] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[113] ,IRQS[113] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[112] ,IRQS[112] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[111] ,IRQS[111] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[110] ,IRQS[110] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[109] ,IRQS[109] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[108] ,IRQS[108] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[107] ,IRQS[107] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[106] ,IRQS[106] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[105] ,IRQS[105] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[104] ,IRQS[104] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[103] ,IRQS[103] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[102] ,IRQS[102] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[101] ,IRQS[101] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[100] ,IRQS[100] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[99] ,IRQS[99] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[98] ,IRQS[98] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[97] ,IRQS[97] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[96] ,IRQS[96] status" "No interrupt,Interrupt" rgroup.long 0x1D14++0x03 line.long 0x00 "GICD_SPISR4,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[159] ,IRQS[159] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[158] ,IRQS[158] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[157] ,IRQS[157] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[156] ,IRQS[156] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[155] ,IRQS[155] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[154] ,IRQS[154] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[153] ,IRQS[153] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[152] ,IRQS[152] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[151] ,IRQS[151] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[150] ,IRQS[150] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[149] ,IRQS[149] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[148] ,IRQS[148] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[147] ,IRQS[147] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[146] ,IRQS[146] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[145] ,IRQS[145] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[144] ,IRQS[144] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[143] ,IRQS[143] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[142] ,IRQS[142] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[141] ,IRQS[141] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[140] ,IRQS[140] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[139] ,IRQS[139] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[138] ,IRQS[138] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[137] ,IRQS[137] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[136] ,IRQS[136] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[135] ,IRQS[135] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[134] ,IRQS[134] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[133] ,IRQS[133] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[132] ,IRQS[132] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[131] ,IRQS[131] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[130] ,IRQS[130] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[129] ,IRQS[129] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[128] ,IRQS[128] status" "No interrupt,Interrupt" rgroup.long 0x1D18++0x03 line.long 0x00 "GICD_SPISR5,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[191] ,IRQS[191] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[190] ,IRQS[190] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[189] ,IRQS[189] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[188] ,IRQS[188] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[187] ,IRQS[187] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[186] ,IRQS[186] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[185] ,IRQS[185] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[184] ,IRQS[184] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[183] ,IRQS[183] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[182] ,IRQS[182] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[181] ,IRQS[181] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[180] ,IRQS[180] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[179] ,IRQS[179] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[178] ,IRQS[178] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[177] ,IRQS[177] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[176] ,IRQS[176] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[175] ,IRQS[175] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[174] ,IRQS[174] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[173] ,IRQS[173] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[172] ,IRQS[172] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[171] ,IRQS[171] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[170] ,IRQS[170] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[169] ,IRQS[169] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[168] ,IRQS[168] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[167] ,IRQS[167] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[166] ,IRQS[166] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[165] ,IRQS[165] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[164] ,IRQS[164] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[163] ,IRQS[163] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[162] ,IRQS[162] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[161] ,IRQS[161] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[160] ,IRQS[160] status" "No interrupt,Interrupt" rgroup.long 0x1D1C++0x03 line.long 0x00 "GICD_SPISR6,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[223] ,IRQS[223] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[222] ,IRQS[222] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[221] ,IRQS[221] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[220] ,IRQS[220] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[219] ,IRQS[219] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[218] ,IRQS[218] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[217] ,IRQS[217] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[216] ,IRQS[216] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[215] ,IRQS[215] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[214] ,IRQS[214] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[213] ,IRQS[213] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[212] ,IRQS[212] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[211] ,IRQS[211] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[210] ,IRQS[210] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[209] ,IRQS[209] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[208] ,IRQS[208] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[207] ,IRQS[207] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[206] ,IRQS[206] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[205] ,IRQS[205] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[204] ,IRQS[204] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[203] ,IRQS[203] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[202] ,IRQS[202] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[201] ,IRQS[201] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[200] ,IRQS[200] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[199] ,IRQS[199] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[198] ,IRQS[198] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[197] ,IRQS[197] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[196] ,IRQS[196] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[195] ,IRQS[195] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[194] ,IRQS[194] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[193] ,IRQS[193] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[192] ,IRQS[192] status" "No interrupt,Interrupt" tree.end textline " " width 17. wgroup.long 0x1F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "Send to specified,Send to all,Send to interrupt,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" bitfld.long 0x00 15. " SATT ,SATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x1F10++0x03 line.long 0x00 "GICD_CPENDSGIR0,SGI Clear Pending Registers" group.long 0x1F14++0x03 line.long 0x00 "GICD_CPENDSGIR1,SGI Clear Pending Registers" group.long 0x1F18++0x03 line.long 0x00 "GICD_CPENDSGIR2,SGI Clear Pending Registers" group.long 0x1F1C++0x03 line.long 0x00 "GICD_CPENDSGIR3,SGI Clear Pending Registers" textline " " group.long 0x1F20++0x03 line.long 0x00 "GICD_SPENDSGIR0,SGI Set Pending Registers" group.long 0x1F24++0x03 line.long 0x00 "GICD_SPENDSGIR1,SGI Set Pending Registers" group.long 0x1F28++0x03 line.long 0x00 "GICD_SPENDSGIR2,SGI Set Pending Registers" group.long 0x1F2C++0x03 line.long 0x00 "GICD_SPENDSGIR3,SGI Set Pending Registers" textline " " rgroup.long 0x1FE0++0x03 "Peripheral/Component ID Registers" line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.long 0x1FE4++0x03 line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1FE8++0x03 line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.long 0x00 0.--2. " DEVID ,DevID field" "0,1,2,3,4,5,6,7" rgroup.long 0x1FEC++0x03 line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.long 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1FD0++0x03 line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.long 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hgroup.long 0x1FD4++0x03 hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register" hgroup.long 0x1FD8++0x03 hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register" hgroup.long 0x1FDC++0x03 hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.long 0x1FF0++0x03 line.long 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FF4++0x03 line.long 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FF8++0x03 line.long 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FFC++0x03 line.long 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " width 17. group.long 0x2000++0x03 "Interrupt Controller Physical CPU Interface" line.long 0x00 "GICC_ICR,CPU Interface Control Register" bitfld.long 0x00 4. " SBPR ,Secure/Non-secure Binary Point Register for preemption control" "SBPR for Secure/Non-SBPR for Non-Secure,SBPR for Both" textline " " bitfld.long 0x00 3. " FIQEN ,Indicates using of FIQ or IRQ signal for interrupts" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Interrupt acknowledge control" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 1. " ENABLENS ,Global Enable for signalling of Non-secure interrupts" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLES ,Global Enable for signalling of Secure interrupts" "Disabled,Enabled" group.long 0x2004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" group.long 0x2008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7" hgroup.long 0x200C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x2010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access" rgroup.long 0x2014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt" rgroup.long 0x2018++0x03 line.long 0x00 "GICC_HPIR,Highest Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt" group.long 0x201C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" group.long 0x20D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" group.long 0x20E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" rgroup.long 0x20FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x3000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" width 17. group.long 0x4000++0x03 "Interrupt Controller Virtual CPU Interface (Hypervisor view)" line.long 0x00 "GICH_HCR,Hypervisor Control Register" rgroup.long 0x4004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x40F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" group.long 0x4100++0x03 line.long 0x00 "GICH_LR0,List Register 0" group.long 0x4104++0x03 line.long 0x00 "GICH_LR1,List Register 1" group.long 0x4108++0x03 line.long 0x00 "GICH_LR2,List Register 2" group.long 0x410C++0x03 line.long 0x00 "GICH_LR3,List Register 3" group.long 0x6000++0x03 "Interrupt Controller Virtual CPU Interface (Virtual Machine View)" line.long 0x00 "GICV_CTLR,VM Control Register" group.long 0x6004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" group.long 0x6008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" hgroup.long 0x600C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x6010++0x03 line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register" rgroup.long 0x6014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" rgroup.long 0x6018++0x03 line.long 0x00 "GICV_HPIR,VM Highest Pending Interrupt Register" group.long 0x601C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" group.long 0x60D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" group.long 0x60E0++0x03 line.long 0x00 "GICV_NSAPR0,VM Non-Secure Active Priority Register" rgroup.long 0x60FC++0x03 line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x7000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" tree.end tree.end tree "PFC (Pin Function Controller)" base ad:0xE6060000 width 16. group.long 0x00++0x03 line.long 0x00 "PMMR,LSI Multiplexed Pin Setting Mask Register" bitfld.long 0x00 31. " PMPM_31 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 30. " PMPM_30 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 29. " PMPM_29 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 28. " PMPM_28 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 27. " PMPM_27 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 26. " PMPM_26 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PMPM_25 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 24. " PMPM_24 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 23. " PMPM_23 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 22. " PMPM_22 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 21. " PMPM_21 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 20. " PMPM_20 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " PMPM_19 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 18. " PMPM_18 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 17. " PMPM_17 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " PMPM_16 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 15. " PMPM_15 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 14. " PMPM_14 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " PMPM_13 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 12. " PMPM_12 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 11. " PMPM_11 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " PMPM_10 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 9. " PMPM_9 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 8. " PMPM_8 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PMPM_7 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 6. " PMPM_6 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 5. " PMPM_5 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " PMPM_4 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 3. " PMPM_3 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 2. " PMPM_2 ,Multiplexed Pin Setting Mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PMPM_1 ,Multiplexed Pin Setting Mask" "Not masked,Masked" bitfld.long 0x00 0. " PMPM_0 ,Multiplexed Pin Setting Mask" "Not masked,Masked" group.long 0x04++0x03 line.long 0x00 "GPSR0,GPIO/Peripheral Function Select Register 0" bitfld.long 0x00 28. " GP0_28 ,Multiplexed LSI pins functions select" "GP-0-28,IP1[4]" bitfld.long 0x00 27. " GP0_27 ,Multiplexed LSI pins functions select" "GP-0-27,IP1[3]" bitfld.long 0x00 26. " GP0_26 ,Multiplexed LSI pins functions select" "GP-0-26,IP1[2]" textline " " bitfld.long 0x00 25. " GP0_25 ,Multiplexed LSI pins functions select" "GP-0-25,IP1[1]" bitfld.long 0x00 24. " GP0_24 ,Multiplexed LSI pins functions select" "GP-0-24,IP1[0]" bitfld.long 0x00 23. " GP0_23 ,Multiplexed LSI pins functions select" "GP-0-23,IP0[23]" textline " " bitfld.long 0x00 22. " GP0_22 ,Multiplexed LSI pins functions select" "GP-0-22,IP0[22]" bitfld.long 0x00 21. " GP0_21 ,Multiplexed LSI pins functions select" "GP-0-21,IP0[21]" bitfld.long 0x00 20. " GP0_20 ,Multiplexed LSI pins functions select" "GP-0-20,IP0[20]" textline " " bitfld.long 0x00 19. " GP0_19 ,Multiplexed LSI pins functions select" "GP-0-19,IP0[19]" bitfld.long 0x00 18. " GP0_18 ,Multiplexed LSI pins functions select" "GP-0-18,IP0[18]" bitfld.long 0x00 17. " GP0_17 ,Multiplexed LSI pins functions select" "GP-0-17,IP0[17]" textline " " bitfld.long 0x00 16. " GP0_16 ,Multiplexed LSI pins functions select" "GP-0-16,IP0[16]" bitfld.long 0x00 15. " GP0_15 ,Multiplexed LSI pins functions select" "GP-0-15,IP0[15]" bitfld.long 0x00 14. " GP0_14 ,Multiplexed LSI pins functions select" "GP-0-14,IP0[14]" textline " " bitfld.long 0x00 13. " GP0_13 ,Multiplexed LSI pins functions select" "GP-0-13,IP0[13]" bitfld.long 0x00 12. " GP0_12 ,Multiplexed LSI pins functions select" "GP-0-12,IP0[12]" bitfld.long 0x00 11. " GP0_11 ,Multiplexed LSI pins functions select" "GP-0-11,IP0[11]" textline " " bitfld.long 0x00 10. " GP0_10 ,Multiplexed LSI pins functions select" "GP-0-10,IP0[10]" bitfld.long 0x00 9. " GP0_9 ,Multiplexed LSI pins functions select" "GP-0-9,IP0[9]" bitfld.long 0x00 8. " GP0_8 ,Multiplexed LSI pins functions select" "GP-0-8,IP0[8]" textline " " bitfld.long 0x00 7. " GP0_7 ,Multiplexed LSI pins functions select" "GP-0-7,IP0[7]" bitfld.long 0x00 6. " GP0_6 ,Multiplexed LSI pins functions select" "GP-0-6,IP0[6]" bitfld.long 0x00 5. " GP0_5 ,Multiplexed LSI pins functions select" "GP-0-5,IP0[5]" textline " " bitfld.long 0x00 4. " GP0_4 ,Multiplexed LSI pins functions select" "GP-0-4,IP0[4]" bitfld.long 0x00 3. " GP0_3 ,Multiplexed LSI pins functions select" "GP-0-3,IP0[3]" bitfld.long 0x00 2. " GP0_2 ,Multiplexed LSI pins functions select" "GP-0-2,IP0[2]" textline " " bitfld.long 0x00 1. " GP0_1 ,Multiplexed LSI pins functions select" "GP-0-1,IP0[1]" bitfld.long 0x00 0. " GP0_0 ,Multiplexed LSI pins functions select" "GP-0-0,IP0[0]" group.long 0x08++0x03 line.long 0x00 "GPSR1,GPIO/Peripheral Function Select Register 1" bitfld.long 0x00 22. " GP1_22 ,Multiplexed LSI pins functions select" "GP-1-22,DU1_CDE" bitfld.long 0x00 21. " GP1_21 ,Multiplexed LSI pins functions select" "GP-1-21,DU1_DISP" bitfld.long 0x00 20. " GP1_20 ,Multiplexed LSI pins functions select" "GP-1-20,DU1_EXODDF_DU1_ODDF_DISP_CDE" textline " " bitfld.long 0x00 19. " GP1_19 ,Multiplexed LSI pins functions select" "GP-1-19,DU1_EXVSYNC_DU1_VSYNC" bitfld.long 0x00 18. " GP1_18 ,Multiplexed LSI pins functions select" "GP-1-18,DU1_EXHSYNC_DU1_HSYNC" bitfld.long 0x00 17. " GP1_17 ,Multiplexed LSI pins functions select" "GP-1-17,DU1_DB7_C5" textline " " bitfld.long 0x00 16. " GP1_16 ,Multiplexed LSI pins functions select" "GP-1-16,DU1_DB6_C4" bitfld.long 0x00 15. " GP1_15 ,Multiplexed LSI pins functions select" "GP-1-15,DU1_DB5_C3_DATA15" bitfld.long 0x00 14. " GP1_14 ,Multiplexed LSI pins functions select" "GP-1-14,DU1_DB4_C2_DATA14" textline " " bitfld.long 0x00 13. " GP1_13 ,Multiplexed LSI pins functions select" "GP-1-13,DU1_DB3_C1_DATA13" bitfld.long 0x00 12. " GP1_12 ,Multiplexed LSI pins functions select" "GP-1-12,DU1_DB2_C0_DATA12" bitfld.long 0x00 11. " GP1_11 ,Multiplexed LSI pins functions select" "GP-1-11,IP1[16]" textline " " bitfld.long 0x00 10. " GP1_10 ,Multiplexed LSI pins functions select" "GP-1-10,IP1[15]" bitfld.long 0x00 9. " GP1_9 ,Multiplexed LSI pins functions select" "GP-1-9,IP1[14]" bitfld.long 0x00 8. " GP1_8 ,Multiplexed LSI pins functions select" "GP-1-8,IP1[13]" textline " " bitfld.long 0x00 7. " GP1_7 ,Multiplexed LSI pins functions select" "GP-1-7,IP1[12]" bitfld.long 0x00 6. " GP1_6 ,Multiplexed LSI pins functions select" "GP-1-6,IP1[11]" bitfld.long 0x00 5. " GP1_5 ,Multiplexed LSI pins functions select" "GP-1-5,IP1[10]" textline " " bitfld.long 0x00 4. " GP1_4 ,Multiplexed LSI pins functions select" "GP-1-4,IP1[9]" bitfld.long 0x00 3. " GP1_3 ,Multiplexed LSI pins functions select" "GP-1-3,IP1[8]" bitfld.long 0x00 2. " GP1_2 ,Multiplexed LSI pins functions select" "GP-1-2,IP1[7]" textline " " bitfld.long 0x00 1. " GP1_1 ,Multiplexed LSI pins functions select" "GP-1-1,IP1[6]" bitfld.long 0x00 0. " GP1_0 ,Multiplexed LSI pins functions select" "GP-1-0,IP1[5]" group.long 0x0C++0x03 line.long 0x00 "GPSR2,GPIO/Peripheral Function Select Register 2" bitfld.long 0x00 31. " GP2_31 ,Multiplexed LSI pins functions select" "GP-2-31,A15" bitfld.long 0x00 30. " GP2_30 ,Multiplexed LSI pins functions select" "GP-2-30,A14" bitfld.long 0x00 29. " GP2_29 ,Multiplexed LSI pins functions select" "GP-2-29,A13" textline " " bitfld.long 0x00 28. " GP2_28 ,Multiplexed LSI pins functions select" "GP-2-28,A12" bitfld.long 0x00 27. " GP2_27 ,Multiplexed LSI pins functions select" "GP-2-27,A11" bitfld.long 0x00 26. " GP2_26 ,Multiplexed LSI pins functions select" "GP-2-26,A10" textline " " bitfld.long 0x00 25. " GP2_25 ,Multiplexed LSI pins functions select" "GP-2-25,A9" bitfld.long 0x00 24. " GP2_24 ,Multiplexed LSI pins functions select" "GP-2-24,A8" bitfld.long 0x00 23. " GP2_23 ,Multiplexed LSI pins functions select" "GP-2-23,A7" textline " " bitfld.long 0x00 22. " GP2_22 ,Multiplexed LSI pins functions select" "GP-2-22,A6" bitfld.long 0x00 21. " GP2_21 ,Multiplexed LSI pins functions select" "GP-2-21,A5" bitfld.long 0x00 20. " GP2_20 ,Multiplexed LSI pins functions select" "GP-2-20,A4" textline " " bitfld.long 0x00 19. " GP2_19 ,Multiplexed LSI pins functions select" "GP-2-19,A3" bitfld.long 0x00 18. " GP2_18 ,Multiplexed LSI pins functions select" "GP-2-18,A2" bitfld.long 0x00 17. " GP2_17 ,Multiplexed LSI pins functions select" "GP-2-17,A1" textline " " bitfld.long 0x00 16. " GP2_16 ,Multiplexed LSI pins functions select" "GP-2-16,A0" bitfld.long 0x00 15. " GP2_15 ,Multiplexed LSI pins functions select" "GP-2-15,D15" bitfld.long 0x00 14. " GP2_14 ,Multiplexed LSI pins functions select" "GP-2-14,D14" textline " " bitfld.long 0x00 13. " GP2_13 ,Multiplexed LSI pins functions select" "GP-2-13,D13" bitfld.long 0x00 12. " GP2_12 ,Multiplexed LSI pins functions select" "GP-2-12,D12" bitfld.long 0x00 11. " GP2_11 ,Multiplexed LSI pins functions select" "GP-2-11,D11" textline " " bitfld.long 0x00 10. " GP2_10 ,Multiplexed LSI pins functions select" "GP-2-10,D10" bitfld.long 0x00 9. " GP2_9 ,Multiplexed LSI pins functions select" "GP-2-9,D9" bitfld.long 0x00 8. " GP2_8 ,Multiplexed LSI pins functions select" "GP-2-8,D8" textline " " bitfld.long 0x00 7. " GP2_7 ,Multiplexed LSI pins functions select" "GP-2-7,D7" bitfld.long 0x00 6. " GP2_6 ,Multiplexed LSI pins functions select" "GP-2-6,D6" bitfld.long 0x00 5. " GP2_5 ,Multiplexed LSI pins functions select" "GP-2-5,D5" textline " " bitfld.long 0x00 4. " GP2_4 ,Multiplexed LSI pins functions select" "GP-2-4,D4" bitfld.long 0x00 3. " GP2_3 ,Multiplexed LSI pins functions select" "GP-2-3,D3" bitfld.long 0x00 2. " GP2_2 ,Multiplexed LSI pins functions select" "GP-2-2,D2" textline " " bitfld.long 0x00 1. " GP2_1 ,Multiplexed LSI pins functions select" "GP-2-1,D1" bitfld.long 0x00 0. " GP2_0 ,Multiplexed LSI pins functions select" "GP-2-0,D0" group.long 0x10++0x03 line.long 0x00 "GPSR3,GPIO/Peripheral Function Select Register 3" bitfld.long 0x00 27. " GP3_27 ,Multiplexed LSI pins functions select" "GP-3-27,CS0#" bitfld.long 0x00 26. " GP3_26 ,Multiplexed LSI pins functions select" "GP-3-26,IP1[22]" textline " " bitfld.long 0x00 25. " GP3_25 ,Multiplexed LSI pins functions select" "GP-3-25,IP1[21]" bitfld.long 0x00 24. " GP3_24 ,Multiplexed LSI pins functions select" "GP-3-24,IP1[20]" bitfld.long 0x00 23. " GP3_23 ,Multiplexed LSI pins functions select" "GP-3-23,IP1[19]" textline " " bitfld.long 0x00 22. " GP3_22 ,Multiplexed LSI pins functions select" "GP-3-22,IRQ3" bitfld.long 0x00 21. " GP3_21 ,Multiplexed LSI pins functions select" "GP-3-21,IRQ2" bitfld.long 0x00 20. " GP3_20 ,Multiplexed LSI pins functions select" "GP-3-20,IRQ1" textline " " bitfld.long 0x00 19. " GP3_19 ,Multiplexed LSI pins functions select" "GP-3-19,IRQ0" bitfld.long 0x00 18. " GP3_18 ,Multiplexed LSI pins functions select" "GP-3-18,EX_WAIT0" bitfld.long 0x00 17. " GP3_17 ,Multiplexed LSI pins functions select" "GP-3-17,WE1#" textline " " bitfld.long 0x00 16. " GP3_16 ,Multiplexed LSI pins functions select" "GP-3-16,WE0#" bitfld.long 0x00 15. " GP3_15 ,Multiplexed LSI pins functions select" "GP-3-15,RD_WR#" bitfld.long 0x00 14. " GP3_14 ,Multiplexed LSI pins functions select" "GP-3-14,RD#" textline " " bitfld.long 0x00 13. " GP3_13 ,Multiplexed LSI pins functions select" "GP-3-13,BS#" bitfld.long 0x00 12. " GP3_12 ,Multiplexed LSI pins functions select" "GP-3-12,EX_CS5#" bitfld.long 0x00 11. " GP3_11 ,Multiplexed LSI pins functions select" "GP-3-11,EX_CS4#" textline " " bitfld.long 0x00 10. " GP3_10 ,Multiplexed LSI pins functions select" "GP-3-10,EX_CS3#" bitfld.long 0x00 9. " GP3_9 ,Multiplexed LSI pins functions select" "GP-3-9,EX_CS2#" bitfld.long 0x00 8. " GP3_8 ,Multiplexed LSI pins functions select" "GP-3-8,EX_CS1#" textline " " bitfld.long 0x00 7. " GP3_7 ,Multiplexed LSI pins functions select" "GP-3-7,EX_CS0#" bitfld.long 0x00 6. " GP3_6 ,Multiplexed LSI pins functions select" "GP-3-6,CS1#_A26" bitfld.long 0x00 5. " GP3_5 ,Multiplexed LSI pins functions select" "GP-3-5,IP1[18]" textline " " bitfld.long 0x00 4. " GP3_4 ,Multiplexed LSI pins functions select" "GP-3-4,IP1[17]" bitfld.long 0x00 3. " GP3_3 ,Multiplexed LSI pins functions select" "GP-3-3,A19" bitfld.long 0x00 2. " GP3_2 ,Multiplexed LSI pins functions select" "GP-3-2,A18" textline " " bitfld.long 0x00 1. " GP3_1 ,Multiplexed LSI pins functions select" "GP-3-1,A17" bitfld.long 0x00 0. " GP3_0 ,Multiplexed LSI pins functions select" "GP-3-0,A16" group.long 0x14++0x03 line.long 0x00 "GPSR4,GPIO/Peripheral Function Select Register 4" bitfld.long 0x00 16. " GP4_16 ,Multiplexed LSI pins functions select" "GP-4-16,VI0_FIELD" bitfld.long 0x00 15. " GP4_15 ,Multiplexed LSI pins functions select" "GP-4-15,VI0_D11_G3_Y3" bitfld.long 0x00 14. " GP4_14 ,Multiplexed LSI pins functions select" "GP-4-14,VI0_D10_G2_Y2" textline " " bitfld.long 0x00 13. " GP4_13 ,Multiplexed LSI pins functions select" "GP-4-13,VI0_D9_G1_Y1" bitfld.long 0x00 12. " GP4_12 ,Multiplexed LSI pins functions select" "GP-4-12,VI0_D8_G0_Y0" bitfld.long 0x00 11. " GP4_11 ,Multiplexed LSI pins functions select" "GP-4-11,VI0_D7_B7_C7" textline " " bitfld.long 0x00 10. " GP4_10 ,Multiplexed LSI pins functions select" "GP-4-10,VI0_D6_B6_C6" bitfld.long 0x00 9. " GP4_9 ,Multiplexed LSI pins functions select" "GP-4-9,VI0_D5_B5_C5" bitfld.long 0x00 8. " GP4_8 ,Multiplexed LSI pins functions select" "GP-4-8,VI0_D4_B4_C4" textline " " bitfld.long 0x00 7. " GP4_7 ,Multiplexed LSI pins functions select" "GP-4-7,VI0_D3_B3_C3" bitfld.long 0x00 6. " GP4_6 ,Multiplexed LSI pins functions select" "GP-4-6,VI0_D2_B2_C2" bitfld.long 0x00 5. " GP4_5 ,Multiplexed LSI pins functions select" "GP-4-5,VI0_D1_B1_C1" textline " " bitfld.long 0x00 4. " GP4_4 ,Multiplexed LSI pins functions select" "GP-4-4,VI0_D0_B0_C0" bitfld.long 0x00 3. " GP4_3 ,Multiplexed LSI pins functions select" "GP-4-3,VI0_VSYNC#" bitfld.long 0x00 2. " GP4_2 ,Multiplexed LSI pins functions select" "GP-4-2,VI0_HSYNC#" textline " " bitfld.long 0x00 1. " GP4_1 ,Multiplexed LSI pins functions select" "GP-4-1,VI0_CLKENB" bitfld.long 0x00 0. " GP4_0 ,Multiplexed LSI pins functions select" "GP-4-0,VI0_CLK" group.long 0x18++0x03 line.long 0x00 "GPSR5,GPIO/Peripheral Function Select Register 5" bitfld.long 0x00 16. " GP5_16 ,Multiplexed LSI pins functions select" "GP-5-16,VI1_FIELD" bitfld.long 0x00 15. " GP5_15 ,Multiplexed LSI pins functions select" "GP-5-15,VI1_D11_G3_Y3" bitfld.long 0x00 14. " GP5_14 ,Multiplexed LSI pins functions select" "GP-5-14,VI1_D10_G2_Y2" textline " " bitfld.long 0x00 13. " GP5_13 ,Multiplexed LSI pins functions select" "GP-5-13,VI1_D9_G1_Y1" bitfld.long 0x00 12. " GP5_12 ,Multiplexed LSI pins functions select" "GP-5-12,VI1_D8_G0_Y0" bitfld.long 0x00 11. " GP5_11 ,Multiplexed LSI pins functions select" "GP-5-11,VI1_D7_B7_C7" textline " " bitfld.long 0x00 10. " GP5_10 ,Multiplexed LSI pins functions select" "GP-5-10,VI1_D6_B6_C6" bitfld.long 0x00 9. " GP5_9 ,Multiplexed LSI pins functions select" "GP-5-9,VI1_D5_B5_C5" bitfld.long 0x00 8. " GP5_8 ,Multiplexed LSI pins functions select" "GP-5-8,VI1_D4_B4_C4" textline " " bitfld.long 0x00 7. " GP5_7 ,Multiplexed LSI pins functions select" "GP-5-7,VI1_D3_B3_C3" bitfld.long 0x00 6. " GP5_6 ,Multiplexed LSI pins functions select" "GP-5-6,VI1_D2_B2_C2" bitfld.long 0x00 5. " GP5_5 ,Multiplexed LSI pins functions select" "GP-5-5,VI1_D1_B1_C1" textline " " bitfld.long 0x00 4. " GP5_4 ,Multiplexed LSI pins functions select" "GP-5-4,VI1_D0_B0_C0" bitfld.long 0x00 3. " GP5_3 ,Multiplexed LSI pins functions select" "GP-5-3,VI1_VSYNC#" bitfld.long 0x00 2. " GP5_2 ,Multiplexed LSI pins functions select" "GP-5-2,VI1_HSYNC#" textline " " bitfld.long 0x00 1. " GP5_1 ,Multiplexed LSI pins functions select" "GP-5-1,VI1_CLKENB" bitfld.long 0x00 0. " GP5_0 ,Multiplexed LSI pins functions select" "GP-5-0,VI1_CLK" group.long 0x1C++0x03 line.long 0x00 "GPSR6,GPIO/Peripheral Function Select Register 6 " bitfld.long 0x00 16. " GP6_16 ,Multiplexed LSI pins functions select" "GP-6-16,IP2[16]" bitfld.long 0x00 15. " GP6_15 ,Multiplexed LSI pins functions select" "GP-6-15,IP2[15]" bitfld.long 0x00 14. " GP6_14 ,Multiplexed LSI pins functions select" "GP-6-14,IP2[14]" textline " " bitfld.long 0x00 13. " GP6_13 ,Multiplexed LSI pins functions select" "GP-6-13,IP2[13]" bitfld.long 0x00 12. " GP6_12 ,Multiplexed LSI pins functions select" "GP-6-12,IP2[12]" bitfld.long 0x00 11. " GP6_11 ,Multiplexed LSI pins functions select" "GP-6-11,IP2[11]" textline " " bitfld.long 0x00 10. " GP6_10 ,Multiplexed LSI pins functions select" "GP-6-10,IP2[10]" bitfld.long 0x00 9. " GP6_9 ,Multiplexed LSI pins functions select" "GP-6-9,IP2[9]" bitfld.long 0x00 8. " GP6_8 ,Multiplexed LSI pins functions select" "GP-6-8,IP2[8]" textline " " bitfld.long 0x00 7. " GP6_7 ,Multiplexed LSI pins functions select" "GP-6-7,IP2[7]" bitfld.long 0x00 6. " GP6_6 ,Multiplexed LSI pins functions select" "GP-6-6,IP2[6]" bitfld.long 0x00 5. " GP6_5 ,Multiplexed LSI pins functions select" "GP-6-5,IP2[5]" textline " " bitfld.long 0x00 4. " GP6_4 ,Multiplexed LSI pins functions select" "GP-6-4,IP2[4]" bitfld.long 0x00 3. " GP6_3 ,Multiplexed LSI pins functions select" "GP-6-3,IP2[3]" bitfld.long 0x00 2. " GP6_2 ,Multiplexed LSI pins functions select" "GP-6-2,IP2[2]" textline " " bitfld.long 0x00 1. " GP6_1 ,Multiplexed LSI pins functions select" "GP-6-1,IP2[1]" bitfld.long 0x00 0. " GP6_0 ,Multiplexed LSI pins functions select" "GP-6-0,IP2[0]" group.long 0x20++0x03 line.long 0x00 "GPSR7,GPIO/Peripheral Function Select Register 7" bitfld.long 0x00 16. " GP7_16 ,Multiplexed LSI pins functions select" "GP-7-16,VI3_FIELD" bitfld.long 0x00 15. " GP7_15 ,Multiplexed LSI pins functions select" "GP-7-15,IP3[14]" bitfld.long 0x00 14. " GP7_14 ,Multiplexed LSI pins functions select" "GP-7-14,VI3_D10_Y2" textline " " bitfld.long 0x00 13. " GP7_13 ,Multiplexed LSI pins functions select" "GP-7-13,IP3[13]" bitfld.long 0x00 12. " GP7_12 ,Multiplexed LSI pins functions select" "GP-7-12,IP3[12]" bitfld.long 0x00 11. " GP7_11 ,Multiplexed LSI pins functions select" "GP-7-11,IP3[11]" textline " " bitfld.long 0x00 10. " GP7_10 ,Multiplexed LSI pins functions select" "GP-7-10,IP3[10]" bitfld.long 0x00 9. " GP7_9 ,Multiplexed LSI pins functions select" "GP-7-9,IP3[9]" bitfld.long 0x00 8. " GP7_8 ,Multiplexed LSI pins functions select" "GP-7-8,IP3[8]" textline " " bitfld.long 0x00 7. " GP7_7 ,Multiplexed LSI pins functions select" "GP-7-7,IP3[7]" bitfld.long 0x00 6. " GP7_6 ,Multiplexed LSI pins functions select" "GP-7-6,IP3[6]" bitfld.long 0x00 5. " GP7_5 ,Multiplexed LSI pins functions select" "GP-7-5,IP3[5]" textline " " bitfld.long 0x00 4. " GP7_4 ,Multiplexed LSI pins functions select" "GP-7-4,IP3[4]" bitfld.long 0x00 3. " GP7_3 ,Multiplexed LSI pins functions select" "GP-7-3,IP3[3]" bitfld.long 0x00 2. " GP7_2 ,Multiplexed LSI pins functions select" "GP-7-2,IP3[2]" textline " " bitfld.long 0x00 1. " GP7_1 ,Multiplexed LSI pins functions select" "GP-7-1,IP3[1]" bitfld.long 0x00 0. " GP7_0 ,Multiplexed LSI pins functions select" "GP-7-0,IP3[0]" group.long 0x24++0x03 line.long 0x00 "GPSR8,GPIO/Peripheral Function Select Register 8" bitfld.long 0x00 16. " GP8_16 ,Multiplexed LSI pins functions select" "GP-8-16,IP4[24]" bitfld.long 0x00 15. " GP8_15 ,Multiplexed LSI pins functions select" "GP-8-15,IP4[23]" bitfld.long 0x00 14. " GP8_14 ,Multiplexed LSI pins functions select" "GP-8-14,IP4[22]" textline " " bitfld.long 0x00 13. " GP8_13 ,Multiplexed LSI pins functions select" "GP-8-13,IP4[21]" bitfld.long 0x00 12. " GP8_12 ,Multiplexed LSI pins functions select" "GP-8-12,IP4[20:19]" bitfld.long 0x00 11. " GP8_11 ,Multiplexed LSI pins functions select" "GP-8-11,IP4[18:17]" textline " " bitfld.long 0x00 10. " GP8_10 ,Multiplexed LSI pins functions select" "GP-8-10,IP4[16:15]" bitfld.long 0x00 9. " GP8_9 ,Multiplexed LSI pins functions select" "GP-8-9,IP4[14:13]" bitfld.long 0x00 8. " GP8_8 ,Multiplexed LSI pins functions select" "GP-8-8,IP4[12:11]" textline " " bitfld.long 0x00 7. " GP8_7 ,Multiplexed LSI pins functions select" "GP-8-7,IP4[10:9]" bitfld.long 0x00 6. " GP8_6 ,Multiplexed LSI pins functions select" "GP-8-6,IP4[8:7]" bitfld.long 0x00 5. " GP8_5 ,Multiplexed LSI pins functions select" "GP-8-5,IP4[6:5]" textline " " bitfld.long 0x00 4. " GP8_4 ,Multiplexed LSI pins functions select" "GP-8-4,IP4[4]" bitfld.long 0x00 3. " GP8_3 ,Multiplexed LSI pins functions select" "GP-8-3,IP4[3:2]" bitfld.long 0x00 2. " GP8_2 ,Multiplexed LSI pins functions select" "GP-8-2,IP4[1]" textline " " bitfld.long 0x00 1. " GP8_1 ,Multiplexed LSI pins functions select" "GP-8-1,IP4[0]" bitfld.long 0x00 0. " GP8_0 ,Multiplexed LSI pins functions select" "GP-8-0,VI4_CLK" group.long 0x28++0x03 line.long 0x00 "GPSR9,GPIO/Peripheral Function Select Register 9" bitfld.long 0x00 16. " GP9_16 ,Multiplexed LSI pins functions select" "GP-9-16,VI5_FIELD" bitfld.long 0x00 15. " GP9_15 ,Multiplexed LSI pins functions select" "GP-9-15,VI5_D11_Y3" bitfld.long 0x00 14. " GP9_14 ,Multiplexed LSI pins functions select" "GP-9-14,VI5_D10_Y2" textline " " bitfld.long 0x00 13. " GP9_13 ,Multiplexed LSI pins functions select" "GP-9-13,VI5_D9_Y1" bitfld.long 0x00 12. " GP9_12 ,Multiplexed LSI pins functions select" "GP-9-12,IP5[11]" bitfld.long 0x00 11. " GP9_11 ,Multiplexed LSI pins functions select" "GP-9-11,IP5[10]" textline " " bitfld.long 0x00 10. " GP9_10 ,Multiplexed LSI pins functions select" "GP-9-10,IP5[9]" bitfld.long 0x00 9. " GP9_9 ,Multiplexed LSI pins functions select" "GP-9-9,IP5[8]" bitfld.long 0x00 8. " GP9_8 ,Multiplexed LSI pins functions select" "GP-9-8,IP5[7]" textline " " bitfld.long 0x00 7. " GP9_7 ,Multiplexed LSI pins functions select" "GP-9-7,IP5[6]" bitfld.long 0x00 6. " GP9_6 ,Multiplexed LSI pins functions select" "GP-9-6,IP5[5]" bitfld.long 0x00 5. " GP9_5 ,Multiplexed LSI pins functions select" "GP-9-5,IP5[4]" textline " " bitfld.long 0x00 4. " GP9_4 ,Multiplexed LSI pins functions select" "GP-9-4,IP5[3]" bitfld.long 0x00 3. " GP9_3 ,Multiplexed LSI pins functions select" "GP-9-3,IP5[2]" bitfld.long 0x00 2. " GP9_2 ,Multiplexed LSI pins functions select" "GP-9-2,IP5[1]" textline " " bitfld.long 0x00 1. " GP9_1 ,Multiplexed LSI pins functions select" "GP-9-1,IP5[0]" bitfld.long 0x00 0. " GP9_0 ,Multiplexed LSI pins functions select" "GP-9-0,VI5_CLK" group.long 0x2C++0x03 line.long 0x00 "GPSR10,GPIO/Peripheral Function Select Register 10" bitfld.long 0x00 31. " GP10_31 ,Multiplexed LSI pins functions select" "GP-10-31,CAN1_RX" bitfld.long 0x00 30. " GP10_30 ,Multiplexed LSI pins functions select" "GP-10-30,CAN1_TX" bitfld.long 0x00 29. " GP10_29 ,Multiplexed LSI pins functions select" "GP-10-29,CAN_CLK" textline " " bitfld.long 0x00 28. " GP10_28 ,Multiplexed LSI pins functions select" "GP-10-28,CAN0_RX" bitfld.long 0x00 27. " GP10_27 ,Multiplexed LSI pins functions select" "GP-10-27,CAN0_TX" bitfld.long 0x00 26. " GP10_26 ,Multiplexed LSI pins functions select" "GP-10-26,SCIF_CLK" textline " " bitfld.long 0x00 25. " GP10_25 ,Multiplexed LSI pins functions select" "GP-10-25,IP6[18:17]" bitfld.long 0x00 24. " GP10_24 ,Multiplexed LSI pins functions select" "GP-10-24,IP6[16]" bitfld.long 0x00 23. " GP10_23 ,Multiplexed LSI pins functions select" "GP-10-23,IP6[15:14]" textline " " bitfld.long 0x00 22. " GP10_22 ,Multiplexed LSI pins functions select" "GP-10-22,IP6[13:12]" bitfld.long 0x00 21. " GP10_21 ,Multiplexed LSI pins functions select" "GP-10-21,IP6[11:10]" bitfld.long 0x00 20. " GP10_20 ,Multiplexed LSI pins functions select" "GP-10-20,IP6[9:8]" textline " " bitfld.long 0x00 19. " GP10_19 ,Multiplexed LSI pins functions select" "GP-10-19,RX1" bitfld.long 0x00 18. " GP10_18 ,Multiplexed LSI pins functions select" "GP-10-18,TX1" bitfld.long 0x00 17. " GP10_17 ,Multiplexed LSI pins functions select" "GP-10-17,RTS1#" textline " " bitfld.long 0x00 16. " GP10_16 ,Multiplexed LSI pins functions select" "GP-10-16,CTS1#" bitfld.long 0x00 15. " GP10_15 ,Multiplexed LSI pins functions select" "GP-10-15,SCK1" bitfld.long 0x00 14. " GP10_14 ,Multiplexed LSI pins functions select" "GP-10-14,RX0" textline " " bitfld.long 0x00 13. " GP10_13 ,Multiplexed LSI pins functions select" "GP-10-13,TX0" bitfld.long 0x00 12. " GP10_12 ,Multiplexed LSI pins functions select" "GP-10-12,RTS0#" bitfld.long 0x00 11. " GP10_11 ,Multiplexed LSI pins functions select" "GP-10-11,CTS0#" textline " " bitfld.long 0x00 10. " GP10_10 ,Multiplexed LSI pins functions select" "GP-10-10,SCK0" bitfld.long 0x00 9. " GP10_9 ,Multiplexed LSI pins functions select" "GP-10-9,IP6[7]" bitfld.long 0x00 8. " GP10_8 ,Multiplexed LSI pins functions select" "GP-10-8,IP6[6]" textline " " bitfld.long 0x00 7. " GP10_7 ,Multiplexed LSI pins functions select" "GP-10-7,HCTS1#" bitfld.long 0x00 6. " GP10_6 ,Multiplexed LSI pins functions select" "GP-10-6,IP6[5]" bitfld.long 0x00 5. " GP10_5 ,Multiplexed LSI pins functions select" "GP-10-5,IP6[4]" textline " " bitfld.long 0x00 4. " GP10_4 ,Multiplexed LSI pins functions select" "GP-10-4,IP6[3]" bitfld.long 0x00 3. " GP10_3 ,Multiplexed LSI pins functions select" "GP-10-3,IP6[2]" bitfld.long 0x00 2. " GP10_2 ,Multiplexed LSI pins functions select" "GP-10-2,HRTS0#" textline " " bitfld.long 0x00 1. " GP10_1 ,Multiplexed LSI pins functions select" "GP-10-1,IP6[1]" bitfld.long 0x00 0. " GP10_0 ,Multiplexed LSI pins functions select" "GP-10-0,IP6[0]" group.long 0x30++0x03 line.long 0x00 "GPSR11,GPIO/Peripheral Function Select Register 11" bitfld.long 0x00 29. " GP11_29 ,Multiplexed LSI pins functions select" "GP-11-29,AVS2" textline " " bitfld.long 0x00 28. " GP11_28 ,Multiplexed LSI pins functions select" "GP-11-28,AVS1" bitfld.long 0x00 27. " GP11_27 ,Multiplexed LSI pins functions select" "GP-11-27,ADICHS2" bitfld.long 0x00 26. " GP11_26 ,Multiplexed LSI pins functions select" "GP-11-26,ADICHS1" textline " " bitfld.long 0x00 25. " GP11_25 ,Multiplexed LSI pins functions select" "GP-11-25,ADICHS0" bitfld.long 0x00 24. " GP11_24 ,Multiplexed LSI pins functions select" "GP-11-24,ADIDATA" bitfld.long 0x00 23. " GP11_23 ,Multiplexed LSI pins functions select" "GP-11-23,ADICS_SAMP" textline " " bitfld.long 0x00 22. " GP11_22 ,Multiplexed LSI pins functions select" "GP-11-22,ADICLK" bitfld.long 0x00 21. " GP11_21 ,Multiplexed LSI pins functions select" "GP-11-21,IP7[20]" bitfld.long 0x00 20. " GP11_20 ,Multiplexed LSI pins functions select" "GP-11-20,IP7[19]" textline " " bitfld.long 0x00 19. " GP11_19 ,Multiplexed LSI pins functions select" "GP-11-19,IP7[18]" bitfld.long 0x00 18. " GP11_18 ,Multiplexed LSI pins functions select" "GP-11-18,IP7[17]" bitfld.long 0x00 17. " GP11_17 ,Multiplexed LSI pins functions select" "GP-11-17,IP7[16]" textline " " bitfld.long 0x00 16. " GP11_16 ,Multiplexed LSI pins functions select" "GP-11-16,IP7[15:14]" bitfld.long 0x00 15. " GP11_15 ,Multiplexed LSI pins functions select" "GP-11-15,IP7[13:12" bitfld.long 0x00 14. " GP11_14 ,Multiplexed LSI pins functions select" "GP-11-14,IP7[11:10]" textline " " bitfld.long 0x00 13. " GP11_13 ,Multiplexed LSI pins functions select" "GP-11-13,IP7[9:8]" bitfld.long 0x00 12. " GP11_12 ,Multiplexed LSI pins functions select" "GP-11-12,SD0_WP" bitfld.long 0x00 11. " GP11_11 ,Multiplexed LSI pins functions select" "GP-11-11,SD0_CD" textline " " bitfld.long 0x00 10. " GP11_10 ,Multiplexed LSI pins functions select" "GP-11-10,SD0_DAT3" bitfld.long 0x00 9. " GP11_9 ,Multiplexed LSI pins functions select" "GP-11-9,SD0_DAT2" bitfld.long 0x00 8. " GP11_8 ,Multiplexed LSI pins functions select" "GP-11-8,SD0_DAT1" textline " " bitfld.long 0x00 7. " GP11_7 ,Multiplexed LSI pins functions select" "GP-11-7,SD0_DAT0" bitfld.long 0x00 6. " GP11_6 ,Multiplexed LSI pins functions select" "GP-11-6,SD0_CMD" bitfld.long 0x00 5. " GP11_5 ,Multiplexed LSI pins functions select" "GP-11-5,SD0_CLK" textline " " bitfld.long 0x00 4. " GP11_4 ,Multiplexed LSI pins functions select" "GP-11-4,IP7[7]" bitfld.long 0x00 3. " GP11_3 ,Multiplexed LSI pins functions select" "GP-11-3,IP7[6]" bitfld.long 0x00 2. " GP11_2 ,Multiplexed LSI pins functions select" "GP-11-2,IP7[5:4]" textline " " bitfld.long 0x00 1. " GP11_1 ,Multiplexed LSI pins functions select" "GP-11-1,IP7[3:2]" bitfld.long 0x00 0. " GP11_0 ,Multiplexed LSI pins functions select" "GP-11-0,IP7[1:0]" group.long 0x40++0x03 line.long 0x00 "IPSR0,Peripheral Function Select Register 0" bitfld.long 0x00 23. " IP0_23 ,Multiplexed LSI pins functions select" "DU0_DB7_C5,?..." textline " " bitfld.long 0x00 22. " IP0_22 ,Multiplexed LSI pins functions select" "DU0_DB6_C4,?..." bitfld.long 0x00 21. " IP0_21 ,Multiplexed LSI pins functions select" "DU0_DB5_C3,?..." bitfld.long 0x00 20. " IP0_20 ,Multiplexed LSI pins functions select" "DU0_DB4_C2,?..." textline " " bitfld.long 0x00 19. " IP0_19 ,Multiplexed LSI pins functions select" "DU0_DB3_C1,?..." bitfld.long 0x00 18. " IP0_18 ,Multiplexed LSI pins functions select" "DU0_DB2_C0,?..." bitfld.long 0x00 17. " IP0_17 ,Multiplexed LSI pins functions select" "DU0_DB1,?..." textline " " bitfld.long 0x00 16. " IP0_16 ,Multiplexed LSI pins functions select" "DU0_DB0,?..." bitfld.long 0x00 15. " IP0_15 ,Multiplexed LSI pins functions select" "DU0_DG7_Y3_DATA15,?..." bitfld.long 0x00 14. " IP0_14 ,Multiplexed LSI pins functions select" "DU0_DG6_Y2_DATA14,?..." textline " " bitfld.long 0x00 13. " IP0_13 ,Multiplexed LSI pins functions select" "DU0_DG5_Y1_DATA13,?..." bitfld.long 0x00 12. " IP0_12 ,Multiplexed LSI pins functions select" "DU0_DG4_Y0_DATA12,?..." bitfld.long 0x00 11. " IP0_11 ,Multiplexed LSI pins functions select" "DU0_DG3_C7_DATA11,?..." textline " " bitfld.long 0x00 10. " IP0_10 ,Multiplexed LSI pins functions select" "DU0_DG2_C6_DATA10,?..." bitfld.long 0x00 9. " IP0_9 ,Multiplexed LSI pins functions select" "DU0_DG1_DATA9,?..." bitfld.long 0x00 8. " IP0_8 ,Multiplexed LSI pins functions select" "DU0_DG0_DATA8,?..." textline " " bitfld.long 0x00 7. " IP0_7 ,Multiplexed LSI pins functions select" "DU0_DR7_Y9_DATA7,?..." bitfld.long 0x00 6. " IP0_6 ,Multiplexed LSI pins functions select" "DU0_DR6_Y8_DATA6,?..." bitfld.long 0x00 5. " IP0_5 ,Multiplexed LSI pins functions select" "DU0_DR5_Y7_DATA5,?..." textline " " bitfld.long 0x00 4. " IP0_4 ,Multiplexed LSI pins functions select" "DU0_DR4_Y6_DATA4,?..." bitfld.long 0x00 3. " IP0_3 ,Multiplexed LSI pins functions select" "DU0_DR3_Y5_DATA3,?..." bitfld.long 0x00 2. " IP0_2 ,Multiplexed LSI pins functions select" "DU0_DR2_Y4_DATA2,?..." textline " " bitfld.long 0x00 1. " IP0_1 ,Multiplexed LSI pins functions select" "DU0_DR1_DATA1,?..." bitfld.long 0x00 0. " IP0_0 ,Multiplexed LSI pins functions select" "DU0_DR0_DATA0,?..." group.long 0x44++0x03 line.long 0x00 "IPSR1,Peripheral Function Select Register 1" bitfld.long 0x00 22. " IP1_22 ,Multiplexed LSI pins functions select" "A25,SSL" bitfld.long 0x00 21. " IP1_21 ,Multiplexed LSI pins functions select" "A24,SPCLK" bitfld.long 0x00 20. " IP1_20 ,Multiplexed LSI pins functions select" "A23,IO3" textline " " bitfld.long 0x00 19. " IP1_19 ,Multiplexed LSI pins functions select" "A22,IO2" bitfld.long 0x00 18. " IP1_18 ,Multiplexed LSI pins functions select" "A21,MISO_IO1" bitfld.long 0x00 17. " IP1_17 ,Multiplexed LSI pins functions select" "A20,MOSI_IO0" textline " " bitfld.long 0x00 16. " IP1_16 ,Multiplexed LSI pins functions select" "DU1_DG7_Y3_DATA11,?..." bitfld.long 0x00 15. " IP1_15 ,Multiplexed LSI pins functions select" "DU1_DG6_Y2_DATA10,?..." bitfld.long 0x00 14. " IP1_14 ,Multiplexed LSI pins functions select" "DU1_DG5_Y1_DATA9,?..." textline " " bitfld.long 0x00 13. " IP1_13 ,Multiplexed LSI pins functions select" "DU1_DG4_Y0_DATA8,?..." bitfld.long 0x00 12. " IP1_12 ,Multiplexed LSI pins functions select" "DU1_DG3_C7_DATA7,?..." bitfld.long 0x00 11. " IP1_11 ,Multiplexed LSI pins functions select" "DU1_DG2_C6_DATA6,?..." textline " " bitfld.long 0x00 10. " IP1_10 ,Multiplexed LSI pins functions select" "DU1_DR7_DATA5,?..." bitfld.long 0x00 9. " IP1_9 ,Multiplexed LSI pins functions select" "DU1_DR6_DATA4,?..." bitfld.long 0x00 8. " IP1_8 ,Multiplexed LSI pins functions select" "DU1_DR5_Y7_DATA3,?..." textline " " bitfld.long 0x00 7. " IP1_7 ,Multiplexed LSI pins functions select" "DU1_DR4_Y6_DATA2,?..." bitfld.long 0x00 6. " IP1_6 ,Multiplexed LSI pins functions select" "DU1_DR3_Y5_DATA1,?..." bitfld.long 0x00 5. " IP1_5 ,Multiplexed LSI pins functions select" "DU1_DR2_Y4_DATA0,?..." textline " " bitfld.long 0x00 4. " IP1_4 ,Multiplexed LSI pins functions select" "DU0_CDE,?..." bitfld.long 0x00 3. " IP1_3 ,Multiplexed LSI pins functions select" "DU0_DISP,?..." bitfld.long 0x00 2. " IP1_2 ,Multiplexed LSI pins functions select" "DU0_EXODDF_DU0_ODDF_DISP_CDE,?..." textline " " bitfld.long 0x00 1. " IP1_1 ,Multiplexed LSI pins functions select" "DU0_EXVSYNC_DU0_VSYNC,?..." bitfld.long 0x00 0. " IP1_0 ,Multiplexed LSI pins functions select" "DU0_EXHSYNC_DU0_HSYNC,?..." group.long 0x48++0x03 line.long 0x00 "IPSR2,Peripheral Function Select Register 2" bitfld.long 0x00 16. " IP2_16 ,Multiplexed LSI pins functions select" "VI2_FIELD,AVB_TXD2" bitfld.long 0x00 15. " IP2_15 ,Multiplexed LSI pins functions select" "VI2_D11_Y3,AVB_TXD1" bitfld.long 0x00 14. " IP2_14 ,Multiplexed LSI pins functions select" "VI2_D10_Y2,AVB_TXD0" textline " " bitfld.long 0x00 13. " IP2_13 ,Multiplexed LSI pins functions select" "VI2_D9_Y1,AVB_TX_EN" bitfld.long 0x00 12. " IP2_12 ,Multiplexed LSI pins functions select" "VI2_D8_Y0,AVB_TXD3" bitfld.long 0x00 11. " IP2_11 ,Multiplexed LSI pins functions select" "VI2_D7_C7,AVB_COL" textline " " bitfld.long 0x00 10. " IP2_10 ,Multiplexed LSI pins functions select" "VI2_D6_C6,AVB_RX_ER" bitfld.long 0x00 9. " IP2_9 ,Multiplexed LSI pins functions select" "VI2_D5_C5,AVB_RXD7" bitfld.long 0x00 8. " IP2_8 ,Multiplexed LSI pins functions select" "VI2_D4_C4,AVB_RXD6" textline " " bitfld.long 0x00 7. " IP2_7 ,Multiplexed LSI pins functions select" "VI2_D3_C3,AVB_RXD5" bitfld.long 0x00 6. " IP2_6 ,Multiplexed LSI pins functions select" "VI2_D2_C2,AVB_RXD4" bitfld.long 0x00 5. " IP2_5 ,Multiplexed LSI pins functions select" "VI2_D1_C1,AVB_RXD3" textline " " bitfld.long 0x00 4. " IP2_4 ,Multiplexed LSI pins functions select" "VI2_D0_C0,AVB_RXD2" bitfld.long 0x00 3. " IP2_3 ,Multiplexed LSI pins functions select" "VI2_VSYNC#,AVB_RXD1" bitfld.long 0x00 2. " IP2_2 ,Multiplexed LSI pins functions select" "VI2_HSYNC#,AVB_RXD0" textline " " bitfld.long 0x00 1. " IP2_1 ,Multiplexed LSI pins functions select" "VI2_CLKENB,AVB_RX_DV" bitfld.long 0x00 0. " IP2_0 ,Multiplexed LSI pins functions select" "VI2_CLK,AVB_RX_CLK" group.long 0x4C++0x03 line.long 0x00 "IPSR3,Peripheral Function Select Register 3" bitfld.long 0x00 14. " IP3_14 ,Multiplexed LSI pins functions select" "VI3_D11_Y3,AVB_AVTP_MATCH" bitfld.long 0x00 13. " IP3_13 ,Multiplexed LSI pins functions select" "VI3_D9_Y1,AVB_GTXREFCLK" bitfld.long 0x00 12. " IP3_12 ,Multiplexed LSI pins functions select" "VI3_D8_Y0,AVB_CRS" textline " " bitfld.long 0x00 11. " IP3_11 ,Multiplexed LSI pins functions select" "VI3_D7_C7,AVB_PHY_INT" bitfld.long 0x00 10. " IP3_10 ,Multiplexed LSI pins functions select" "VI3_D6_C6,AVB_MAGIC" bitfld.long 0x00 9. " IP3_9 ,Multiplexed LSI pins functions select" "VI3_D5_C5,AVB_LINK" textline " " bitfld.long 0x00 8. " IP3_8 ,Multiplexed LSI pins functions select" "VI3_D4_C4,AVB_MDIO" bitfld.long 0x00 7. " IP3_7 ,Multiplexed LSI pins functions select" "VI3_D3_C3,AVB_MDC" bitfld.long 0x00 6. " IP3_6 ,Multiplexed LSI pins functions select" "VI3_D2_C2,AVB_GTX_CLK" textline " " bitfld.long 0x00 5. " IP3_5 ,Multiplexed LSI pins functions select" "VI3_D1_C1,AVB_TX_ER" bitfld.long 0x00 4. " IP3_4 ,Multiplexed LSI pins functions select" "VI3_D0_C0,AVB_TXD7" bitfld.long 0x00 3. " IP3_3 ,Multiplexed LSI pins functions select" "VI3_VSYNC#,AVB_TXD6" textline " " bitfld.long 0x00 2. " IP3_2 ,Multiplexed LSI pins functions select" "VI3_HSYNC#,AVB_TXD5" bitfld.long 0x00 1. " IP3_1 ,Multiplexed LSI pins functions select" "VI3_CLKENB,AVB_TXD4" bitfld.long 0x00 0. " IP3_0 ,Multiplexed LSI pins functions select" "VI3_CLK,AVB_TX_CLK" group.long 0x50++0x03 line.long 0x00 "IPSR4,Peripheral Function Select Register 4" bitfld.long 0x00 24. " IP4_24 ,Multiplexed LSI pins functions select" "VI4_FIELD,VI3_D15_Y7" bitfld.long 0x00 23. " IP4_23 ,Multiplexed LSI pins functions select" "VI4_D11_Y3,VI3_D14_Y6" bitfld.long 0x00 22. " IP4_22 ,Multiplexed LSI pins functions select" "VI4_D10_Y2,VI3_D13_Y5" textline " " bitfld.long 0x00 21. " IP4_21 ,Multiplexed LSI pins functions select" "VI4_D9_Y1,VI3_D12_Y4" bitfld.long 0x00 19.--20. " IP4_19_20 ,Multiplexed LSI pins functions select" "VI4_D8_Y0,VI0_D23_R7,VI2_D15_Y7,?..." bitfld.long 0x00 17.--18. " IP4_17_18 ,Multiplexed LSI pins functions select" "VI4_D7_C7,VI0_D22_R6,VI2_D14_Y6,?..." textline " " bitfld.long 0x00 15.--16. " IP4_15_16 ,Multiplexed LSI pins functions select" "VI4_D6_C6,VI0_D21_R5,VI2_D13_Y5,?..." bitfld.long 0x00 13.--14. " IP4_13_14 ,Multiplexed LSI pins functions select" "VI4_D5_C5,VI0_D20_R4,VI2_D12_Y4,?..." bitfld.long 0x00 11.--12. " IP4_11_12 ,Multiplexed LSI pins functions select" "VI4_D4_C4,VI0_D19_R3,VI1_D15_G7_Y7,?..." textline " " bitfld.long 0x00 9.--10. " IP4_9_10 ,Multiplexed LSI pins functions select" "VI4_D3_C3,VI0_D18_R2,VI1_D14_G6_Y6,?..." bitfld.long 0x00 7.--8. " IP4_7_8 ,Multiplexed LSI pins functions select" "VI4_D2_C2,VI0_D17_R1,VI1_D13_G5_Y5,?..." bitfld.long 0x00 5.--6. " IP4_5_6 ,Multiplexed LSI pins functions select" "VI4_D1_C1,VI0_D16_R0,VI1_D12_G4_Y4,?..." textline " " bitfld.long 0x00 4. " IP4_4 ,Multiplexed LSI pins functions select" "VI4_D0_C0,VI0_D15_G7_Y7" bitfld.long 0x00 2.--3. " IP4_2_3 ,Multiplexed LSI pins functions select" "VI4_VSYNC#,VI0_D14_G6_Y6,?..." textline " " bitfld.long 0x00 1. " IP4_1 ,Multiplexed LSI pins functions select" "VI4_HSYNC#,VI0_D13_G5_Y5" bitfld.long 0x00 0. " IP4_0 ,Multiplexed LSI pins functions select" "VI4_CLKENB,VI0_D12_G4_Y4" group.long 0x54++0x03 line.long 0x00 "IPSR5,Peripheral Function Select Register 5" bitfld.long 0x00 11. " IP5_11 ,Multiplexed LSI pins functions select" "VI5_D8_Y0,VI1_D23_R7" bitfld.long 0x00 10. " IP5_10 ,Multiplexed LSI pins functions select" "VI5_D7_C7,VI1_D22_R6" bitfld.long 0x00 9. " IP5_9 ,Multiplexed LSI pins functions select" "VI5_D6_C6,VI1_D21_R5" textline " " bitfld.long 0x00 8. " IP5_8 ,Multiplexed LSI pins functions select" "VI5_D5_C5,VI1_D20_R4" bitfld.long 0x00 7. " IP5_7 ,Multiplexed LSI pins functions select" "VI5_D4_C4,VI1_D19_R3" bitfld.long 0x00 6. " IP5_6 ,Multiplexed LSI pins functions select" "VI5_D3_C3,VI1_D18_R2" textline " " bitfld.long 0x00 5. " IP5_5 ,Multiplexed LSI pins functions select" "VI5_D2_C2,VI1_D17_R1" bitfld.long 0x00 4. " IP5_4 ,Multiplexed LSI pins functions select" "VI5_D1_C1,VI1_D16_R0" bitfld.long 0x00 3. " IP5_3 ,Multiplexed LSI pins functions select" "VI5_D0_C0,VI1_D15_G7_Y7" textline " " bitfld.long 0x00 2. " IP5_2 ,Multiplexed LSI pins functions select" "VI5_VSYNC#,VI1_D14_G6_Y6" bitfld.long 0x00 1. " IP5_1 ,Multiplexed LSI pins functions select" "VI5_HSYNC#,VI1_D13_G5_Y5" bitfld.long 0x00 0. " IP5_0 ,Multiplexed LSI pins functions select" "VI5_CLKENB,VI1_D12_G4_Y4" group.long 0x58++0x03 line.long 0x00 "IPSR6,Peripheral Function Select Register 6" bitfld.long 0x00 17.--18. " IP6_17_18 ,Multiplexed LSI pins functions select" "DREQ1#,SCK3,?..." bitfld.long 0x00 16. " IP6_16 ,Multiplexed LSI pins functions select" "TX3,?..." bitfld.long 0x00 14.--15. " IP6_14_15 ,Multiplexed LSI pins functions select" "DACK1,SCK3,?..." textline " " bitfld.long 0x00 12.--13. " IP6_12_13 ,Multiplexed LSI pins functions select" "DREQ0#,RX2,?..." bitfld.long 0x00 10.--11. " IP6_10_11 ,Multiplexed LSI pins functions select" "DACK0,TX2,?..." bitfld.long 0x00 8.--9. " IP6_8_9 ,Multiplexed LSI pins functions select" "DRACK0,SCK2,?..." textline " " bitfld.long 0x00 7. " IP6_7 ,Multiplexed LSI pins functions select" "MSIOF1_RXD,HRX1" bitfld.long 0x00 6. " IP6_6 ,Multiplexed LSI pins functions select" "MSIOF1_TXD,HTX1" bitfld.long 0x00 5. " IP6_5 ,Multiplexed LSI pins functions select" "MSIOF1_SYNC,HRTS1#" textline " " bitfld.long 0x00 4. " IP6_4 ,Multiplexed LSI pins functions select" "MSIOF1_SCK,HSCK1" bitfld.long 0x00 3. " IP6_3 ,Multiplexed LSI pins functions select" "MSIOF0_RXD,HRX0" bitfld.long 0x00 2. " IP6_2 ,Multiplexed LSI pins functions select" "MSIOF0_TXD,HTX0" textline " " bitfld.long 0x00 1. " IP6_1 ,Multiplexed LSI pins functions select" "MSIOF0_SYNC,HCTS0#" bitfld.long 0x00 0. " IP6_0 ,Multiplexed LSI pins functions select" "MSIOF0_SCK,HSCK0" group.long 0x5C++0x03 line.long 0x00 "IPSR7,Peripheral Function Select Register 7" bitfld.long 0x00 20. " IP7_20 ,Multiplexed LSI pins functions select" "AUDIO_CLKB,?..." bitfld.long 0x00 19. " IP7_19 ,Multiplexed LSI pins functions select" "AUDIO_CLKA,?..." bitfld.long 0x00 18. " IP7_18 ,Multiplexed LSI pins functions select" "AUDIO_CLKOUT,?..." textline " " bitfld.long 0x00 17. " IP7_17 ,Multiplexed LSI pins functions select" "SSI_SDATA4,?..." bitfld.long 0x00 16. " IP7_16 ,Multiplexed LSI pins functions select" "SSI_WS4,?..." bitfld.long 0x00 14.--15. " IP7_14_15 ,Multiplexed LSI pins functions select" "SSI_SCK4,TPU0TO3,?..." textline " " bitfld.long 0x00 12.--13. " IP7_12_13 ,Multiplexed LSI pins functions select" "SSI_SDATA3,TPU0TO2,?..." bitfld.long 0x00 10.--11. " IP7_10_11 ,Multiplexed LSI pins functions select" "SSI_WS34,TPU0TO1,?..." bitfld.long 0x00 8.--9. " IP7_8 ,Multiplexed LSI pins functions select" "SSI_SCK34,TPU0TO0,?..." textline " " bitfld.long 0x00 7. " IP7_7 ,Multiplexed LSI pins functions select" "PWM4,?..." bitfld.long 0x00 6. " IP7_6 ,Multiplexed LSI pins functions select" "PWM3,?..." bitfld.long 0x00 4.--5. " IP7_4_4 ,Multiplexed LSI pins functions select" "PWM2,TCLK3,FSO_TOE,?..." textline " " bitfld.long 0x00 2.--3. " IP7_2_3 ,Multiplexed LSI pins functions select" "PWM1,TCLK2,FSO_CFE_1,?..." bitfld.long 0x00 0.--1. " IP7_0_1 ,Multiplexed LSI pins functions select" "PWM0,TCLK1,FSO_CFE_0,?..." group.long 0x68++0x03 line.long 0x00 "ERR_SEL/IPSR10,GPIO10/Error Function Select Register 0" bitfld.long 0x00 31. " IP10_31 ,Multiplexed LSI pins functions select" "GPIO10[31],Error" bitfld.long 0x00 30. " IP10_30 ,Multiplexed LSI pins functions select" "GPIO10[30],Error" bitfld.long 0x00 29. " IP10_29 ,Multiplexed LSI pins functions select" "GPIO10[29],Error" textline " " bitfld.long 0x00 28. " IP10_28 ,Multiplexed LSI pins functions select" "GPIO10[28],Error" bitfld.long 0x00 27. " IP10_27 ,Multiplexed LSI pins functions select" "GPIO10[27],Error" bitfld.long 0x00 26. " IP10_26 ,Multiplexed LSI pins functions select" "GPIO10[26],Error" textline " " bitfld.long 0x00 25. " IP10_25 ,Multiplexed LSI pins functions select" "GPIO10[25],Error" bitfld.long 0x00 24. " IP10_24 ,Multiplexed LSI pins functions select" "GPIO10[24],Error" bitfld.long 0x00 23. " IP10_23 ,Multiplexed LSI pins functions select" "GPIO10[23],Error" textline " " bitfld.long 0x00 22. " IP10_22 ,Multiplexed LSI pins functions select" "GPIO10[22],Error" bitfld.long 0x00 21. " IP10_21 ,Multiplexed LSI pins functions select" "GPIO10[21],Error" bitfld.long 0x00 20. " IP10_20 ,Multiplexed LSI pins functions select" "GPIO10[20],Error" textline " " bitfld.long 0x00 19. " IP10_19 ,Multiplexed LSI pins functions select" "GPIO10[19],Error" bitfld.long 0x00 18. " IP10_18 ,Multiplexed LSI pins functions select" "GPIO10[18],Error" bitfld.long 0x00 17. " IP10_17 ,Multiplexed LSI pins functions select" "GPIO10[17],Error" textline " " bitfld.long 0x00 16. " IP10_16 ,Multiplexed LSI pins functions select" "GPIO10[16],Error" bitfld.long 0x00 15. " IP10_15 ,Multiplexed LSI pins functions select" "GPIO10[15],Error" bitfld.long 0x00 14. " IP10_14 ,Multiplexed LSI pins functions select" "GPIO10[14],Error" textline " " bitfld.long 0x00 13. " IP10_13 ,Multiplexed LSI pins functions select" "GPIO10[13],Error" bitfld.long 0x00 12. " IP10_12 ,Multiplexed LSI pins functions select" "GPIO10[12],Error" bitfld.long 0x00 11. " IP10_11 ,Multiplexed LSI pins functions select" "GPIO10[11],Error" textline " " bitfld.long 0x00 10. " IP10_10 ,Multiplexed LSI pins functions select" "GPIO10[10],Error" bitfld.long 0x00 9. " IP10_9 ,Multiplexed LSI pins functions select" "GPIO10[9],Error" bitfld.long 0x00 8. " IP10_8 ,Multiplexed LSI pins functions select" "GPIO10[8],Error" textline " " bitfld.long 0x00 7. " IP10_7 ,Multiplexed LSI pins functions select" "GPIO10[7],Error" bitfld.long 0x00 6. " IP10_6 ,Multiplexed LSI pins functions select" "GPIO10[6],Error" bitfld.long 0x00 5. " IP10_5 ,Multiplexed LSI pins functions select" "GPIO10[5],Error" textline " " bitfld.long 0x00 4. " IP10_4 ,Multiplexed LSI pins functions select" "GPIO10[4],Error" bitfld.long 0x00 3. " IP10_3 ,Multiplexed LSI pins functions select" "GPIO10[3],Error" bitfld.long 0x00 2. " IP10_2 ,Multiplexed LSI pins functions select" "GPIO10[2],Error" textline " " bitfld.long 0x00 1. " IP10_1 ,Multiplexed LSI pins functions select" "GPIO10[1],Error" bitfld.long 0x00 0. " IP10_0 ,Multiplexed LSI pins functions select" "GPIO10[0],Error" group.long 0xC0++0x03 line.long 0x00 "IOCTRL0,POC Control Register 0" bitfld.long 0x00 16. " IOCTRL0_16 ,IO voltage for the pin VI0_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL0_15 ,IO voltage for the pin VI0_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL0_14 ,IO voltage for the pin VI0_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL0_13 ,IO voltage for the pin VI0_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL0_12 ,IO voltage for the pin VI0_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL0_11 ,IO voltage for the pin VI0_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL0_10 ,IO voltage for the pin VI0_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL0_9 ,IO voltage for the pin VI0_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL0_8 ,IO voltage for the pin VI0_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL0_7 ,IO voltage for the pin VI0_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL0_6 ,IO voltage for the pin VI0_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL0_5 ,IO voltage for the pin VI0_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL0_4 ,IO voltage for the pin VI0_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL0_3 ,IO voltage for the pin VI0_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL0_2 ,IO voltage for the pin VI0_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL0_1 ,IO voltage for the pin VI0_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL0_0 ,IO voltage for the pin VI0_FIELD select" "3.3 V,1.8 V" group.long 0xC4++0x03 line.long 0x00 "IOCTRL1,POC Control Register 1" bitfld.long 0x00 16. " IOCTRL1_16 ,IO voltage for the pin VI1_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL1_15 ,IO voltage for the pin VI1_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL1_14 ,IO voltage for the pin VI1_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL1_13 ,IO voltage for the pin VI1_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL1_12 ,IO voltage for the pin VI1_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL1_11 ,IO voltage for the pin VI1_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL1_10 ,IO voltage for the pin VI1_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL1_9 ,IO voltage for the pin VI1_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL1_8 , IO voltage for the pin VI1_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL1_7 ,IO voltage for the pin VI1_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL1_6 ,IO voltage for the pin VI1_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL1_5 ,IO voltage for the pin VI1_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL1_4 ,IO voltage for the pin VI1_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL1_3 ,IO voltage for the pin VI1_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL1_2 ,IO voltage for the pin VI1_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL1_1 ,IO voltage for the pin VI1_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL1_0 ,IO voltage for the pin VI1_FIELD select" "3.3 V,1.8 V" group.long 0xC8++0x03 line.long 0x00 "IOCTRL2,POC Control Register 2" bitfld.long 0x00 16. " IOCTRL2_16 ,IO voltage for the pin VI2_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL2_15 ,IO voltage for the pin VI2_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL2_14 ,IO voltage for the pin VI2_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL2_13 ,IO voltage for the pin VI2_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL2_12 ,IO voltage for the pin VI2_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL2_11 ,IO voltage for the pin VI2_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL2_10 ,IO voltage for the pin VI2_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL2_9 ,IO voltage for the pin VI2_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL2_8 ,IO voltage for the pin VI2_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL2_7 ,IO voltage for the pin VI2_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL2_6 ,IO voltage for the pin VI2_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL2_5 ,IO voltage for the pin VI2_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL2_4 ,IO voltage for the pin VI2_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL2_3 ,IO voltage for the pin VI2_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL2_2 ,IO voltage for the pin VI2_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL2_1 ,IO voltage for the pin VI2_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL2_0 ,IO voltage for the pin VI2_FIELD select" "3.3 V,1.8 V" group.long 0xCC++0x03 line.long 0x00 "IOCTRL3,POC Control Register 3" bitfld.long 0x00 16. " IOCTRL3_16 ,IO voltage for the pin VI3_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL3_15 ,IO voltage for the pin VI3_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL3_14 ,IO voltage for the pin VI3_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL3_13 ,IO voltage for the pin VI3_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL3_12 ,IO voltage for the pin VI3_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL3_11 ,IO voltage for the pin VI3_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL3_10 ,IO voltage for the pin VI3_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL3_9 ,IO voltage for the pin VI3_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL3_8 ,IO voltage for the pin VI3_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL3_7 ,IO voltage for the pin VI3_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL3_6 ,IO voltage for the pin VI3_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL3_5 ,IO voltage for the pin VI3_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL3_4 ,IO voltage for the pin VI3_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL3_3 ,IO voltage for the pin VI3_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL3_2 ,IO voltage for the pin VI3_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL3_1 ,IO voltage for the pin VI3_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL3_0 ,IO voltage for the pin VI3_FIELD select" "3.3 V,1.8 V" group.long 0xD0++0x03 line.long 0x00 "IOCTRL4,POC Control Register 4" bitfld.long 0x00 16. " IOCTRL4_16 ,IO voltage for the pin VI4_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL4_15 ,IO voltage for the pin VI4_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL4_14 ,IO voltage for the pin VI4_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL4_13 ,IO voltage for the pin VI4_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL4_12 ,IO voltage for the pin VI4_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL4_11 ,IO voltage for the pin VI4_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL4_10 ,IO voltage for the pin VI4_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL4_9 ,IO voltage for the pin VI4_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL4_8 ,IO voltage for the pin VI4_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL4_7 ,IO voltage for the pin VI4_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL4_6 ,IO voltage for the pin VI4_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL4_5 ,IO voltage for the pin VI4_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL4_4 ,IO voltage for the pin VI4_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL4_3 ,IO voltage for the pin VI4_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL4_2 ,IO voltage for the pin VI4_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL4_1 ,IO voltage for the pin VI4_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL4_0 ,IO voltage for the pin VI4_FIELD select" "3.3 V,1.8 V" group.long 0xD4++0x03 line.long 0x00 "IOCTRL5,POC Control Register 5" bitfld.long 0x00 16. " IOCTRL5_16 ,IO voltage for the pin VI5_CLK select" "3.3 V,1.8 V" bitfld.long 0x00 15. " IOCTRL5_15 ,IO voltage for the pin VI5_CLKENB select" "3.3 V,1.8 V" bitfld.long 0x00 14. " IOCTRL5_14 ,IO voltage for the pin VI5_HSYNC# select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 13. " IOCTRL5_13 ,IO voltage for the pin VI5_VSYNC# select" "3.3 V,1.8 V" bitfld.long 0x00 12. " IOCTRL5_12 ,IO voltage for the pin VI5_D0_B0_C0 select" "3.3 V,1.8 V" bitfld.long 0x00 11. " IOCTRL5_11 ,IO voltage for the pin VI5_D1_B1_C1 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 10. " IOCTRL5_10 ,IO voltage for the pin VI5_D2_B2_C2 select" "3.3 V,1.8 V" bitfld.long 0x00 9. " IOCTRL5_9 ,IO voltage for the pin VI5_D3_B3_C3 select" "3.3 V,1.8 V" bitfld.long 0x00 8. " IOCTRL5_8 ,IO voltage for the pin VI5_D4_B4_C4 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 7. " IOCTRL5_7 ,IO voltage for the pin VI5_D5_B5_C5 select" "3.3 V,1.8 V" bitfld.long 0x00 6. " IOCTRL5_6 ,IO voltage for the pin VI5_D6_B6_C6 select" "3.3 V,1.8 V" bitfld.long 0x00 5. " IOCTRL5_5 ,IO voltage for the pin VI5_D7_B7_C7 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 4. " IOCTRL5_4 ,IO voltage for the pin VI5_D8_G0_Y0 select" "3.3 V,1.8 V" bitfld.long 0x00 3. " IOCTRL5_3 ,IO voltage for the pin VI5_D9_G1_Y1 select" "3.3 V,1.8 V" bitfld.long 0x00 2. " IOCTRL5_2 ,IO voltage for the pin VI5_D10_G2_Y2 select" "3.3 V,1.8 V" textline " " bitfld.long 0x00 1. " IOCTRL5_1 ,IO voltage for the pin VI5_D11_G3_Y3 select" "3.3 V,1.8 V" bitfld.long 0x00 0. " IOCTRL5_0 ,IO voltage for the pin VI5_FIELD select" "3.3 V,1.8 V" group.long 0xD8++0x03 line.long 0x00 "IOCTRL6,DRV/TDSEL Control Register" bitfld.long 0x00 6.--7. " SD0TDSEL ,SD0_CLK Setting" "00,?..." bitfld.long 0x00 4.--5. " HSCK1_TDSEL ,HSCK1 Setting" "00,?..." textline " " bitfld.long 0x00 2.--3. " HSCK0_TDSEL ,HSCK0 Setting" "00,?..." bitfld.long 0x00 0.--1. " DRV_VI3D2C2 ,VI3_D2_C2 Setting" ",,10,?..." group.long 0x100++0x03 line.long 0x00 "PUPR0,LSI Pin Pull-Up Control Register 0" bitfld.long 0x00 28. " PUPR0_28 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 27. " PUPR0_27 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 26. " PUPR0_26 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PUPR0_25 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 24. " PUPR0_24 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 23. " PUPR0_23 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PUPR0_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR0_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 20. " PUPR0_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PUPR0_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR0_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 17. " PUPR0_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PUPR0_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR0_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR0_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR0_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR0_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR0_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR0_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR0_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR0_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR0_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR0_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR0_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR0_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR0_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR0_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR0_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR0_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "PUPR1,LSI Pin Pull-Up Control Register 1" bitfld.long 0x00 22. " PUPR1_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR1_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 20. " PUPR1_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PUPR1_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR1_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 17. " PUPR1_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PUPR1_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR1_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR1_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR1_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR1_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR1_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR1_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR1_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR1_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR1_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR1_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR1_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR1_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR1_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR1_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR1_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR1_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x108++0x03 line.long 0x00 "PUPR2,LSI Pin Pull-Up Control Register 2" bitfld.long 0x00 31. " PUPR2_31 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 30. " PUPR2_30 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 29. " PUPR2_29 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PUPR2_28 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 27. " PUPR2_27 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 26. " PUPR2_26 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PUPR2_25 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 24. " PUPR2_24 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 23. " PUPR2_23 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PUPR2_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR2_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 20. " PUPR2_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PUPR2_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR2_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 17. " PUPR2_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PUPR2_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR2_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR2_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR2_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR2_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR2_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR2_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR2_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR2_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR2_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR2_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR2_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR2_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR2_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR2_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR2_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR2_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x10C++0x03 line.long 0x00 "PUPR3,LSI Pin Pull-Up Control Register 3" bitfld.long 0x00 27. " PUPR3_27 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 26. " PUPR3_26 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PUPR3_25 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 24. " PUPR3_24 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 23. " PUPR3_23 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PUPR3_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR3_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 20. " PUPR3_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PUPR3_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR3_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 17. " PUPR3_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PUPR3_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR3_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR3_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR3_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR3_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR3_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR3_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR3_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR3_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR3_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR3_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR3_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR3_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR3_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR3_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR3_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR3_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x110++0x03 line.long 0x00 "PUPR4,LSI Pin Pull-Up Control Register 4" bitfld.long 0x00 16. " PUPR4_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR4_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR4_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR4_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR4_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR4_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR4_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR4_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR4_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR4_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR4_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR4_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR4_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR4_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR4_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR4_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR4_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "PUPR5,LSI Pin Pull-Up Control Register 5" bitfld.long 0x00 16. " PUPR5_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR5_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR5_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR5_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR5_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR5_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR5_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR5_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR5_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR5_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR5_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR5_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR5_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR5_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR5_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR5_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR5_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x118++0x03 line.long 0x00 "PUPR6,LSI Pin Pull-Up Control Register 6" bitfld.long 0x00 16. " PUPR6_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR6_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR6_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR6_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR6_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR6_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR6_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR6_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR6_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR6_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR6_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR6_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR6_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR6_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR6_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR6_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR6_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x11C++0x03 line.long 0x00 "PUPR7,LSI Pin Pull-Up Control Register 7" bitfld.long 0x00 16. " PUPR7_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR7_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR7_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR7_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR7_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR7_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR7_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR7_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR7_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR7_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR7_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR7_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR7_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR7_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR7_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR7_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR7_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "PUPR8,LSI Pin Pull-Up Control Register 8" bitfld.long 0x00 16. " PUPR8_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR8_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR8_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR8_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR8_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR8_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR8_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR8_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR8_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR8_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR8_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR8_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR8_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR8_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR8_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR8_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR8_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "PUPR9,LSI Pin Pull-Up Control Register 9" bitfld.long 0x00 16. " PUPR9_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR9_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR9_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR9_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR9_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR9_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR9_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR9_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR9_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR9_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR9_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR9_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR9_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR9_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR9_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR9_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR9_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x128++0x03 line.long 0x00 "PUPR10,LSI Pin Pull-Up Control Register 10" bitfld.long 0x00 31. " PUPR10_31 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 30. " PUPR10_30 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 29. " PUPR10_29 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PUPR10_28 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 27. " PUPR10_27 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 26. " PUPR10_26 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PUPR10_25 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 24. " PUPR10_24 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 23. " PUPR10_23 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PUPR10_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR10_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 20. " PUPR10_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PUPR10_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR10_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 17. " PUPR10_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PUPR10_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR10_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 14. " PUPR10_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PUPR10_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR10_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 11. " PUPR10_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PUPR10_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR10_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 8. " PUPR10_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PUPR10_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR10_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 5. " PUPR10_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PUPR10_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR10_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 2. " PUPR10_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PUPR10_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR10_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x12C++0x03 line.long 0x00 "PUPR11,LSI Pin Pull-Up Control Register 11" bitfld.long 0x00 29. " PUPR11_29 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 28. " PUPR11_28 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 27. " PUPR11_27 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " PUPR11_26 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 25. " PUPR11_25 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 24. " PUPR11_24 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PUPR11_23 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 22. " PUPR11_22 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 21. " PUPR11_21 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " PUPR11_20 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 19. " PUPR11_19 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 18. " PUPR11_18 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " PUPR11_17 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 16. " PUPR11_16 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 15. " PUPR11_15 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " PUPR11_14 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 13. " PUPR11_13 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 12. " PUPR11_12 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " PUPR11_11 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 10. " PUPR11_10 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 9. " PUPR11_9 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PUPR11_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 7. " PUPR11_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR11_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " PUPR11_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 4. " PUPR11_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR11_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PUPR11_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 1. " PUPR11_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR11_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x130++0x03 line.long 0x00 "PUPR12,LSI Pin Pull-Up Control Register 12" bitfld.long 0x00 8. " PUPR12_8 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 7. " PUPR12_7 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 6. " PUPR12_6 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " PUPR12_5 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 4. " PUPR12_4 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 3. " PUPR12_3 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PUPR12_2 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 1. " PUPR12_1 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" bitfld.long 0x00 0. " PUPR12_0 ,Pull-up resistor in each signal pin of the LSI enable" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "MOD_SEL,Module Select Register" bitfld.long 0x00 0. " SEL_VI1 ,Multiple LSI pins with multiplexed pin functions group select" "0,1" width 0xb tree.end tree.open "GPIO (General-Purpose Input/Output Ports)" tree "GPIO0" base ad:0xE6050000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL0,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL0_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL0,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL0_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT0,General output register 0" bitfld.long 0x08 31. " OUTDT0_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT0,General input register 0" bitfld.long 0x00 31. " INDT0_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT0,Interrupt display register 0" bitfld.long 0x04 31. " INTDT0_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR0,Interrupt clear register 0" bitfld.long 0x00 31. " INTCLR0_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK0,Interrupt mask register 0" bitfld.long 0x04 31. " INTMSK0_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR0,Interrupt mask clear register 0" bitfld.long 0x08 31. " MSKCLR0_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG0,Positive/negative logic select register 0" bitfld.long 0x0C 31. " POSNEG0_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL0,Edge/level select register 0" bitfld.long 0x10 31. " EDGLEVEL0_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF0,Chattering prevention on/off register 0" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF0_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS0,Interrupt Sub Mask Register 0" bitfld.long 0x00 31. " INTMSKS0_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS0,Interrupt Sub Mask Clear Register 0" bitfld.long 0x04 31. " MSKCLRS0_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL0,Output Data Select Register 0" bitfld.long 0x08 31. " OUTDTSEL0_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH0,Output Data High Register 0" bitfld.long 0x0C 31. " OUTDTH0_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL0,Output Data Low Register 0" bitfld.long 0x10 31. " OUTDTL0_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE0,One Edge/Both Edge Select Register 0" bitfld.long 0x14 31. " BOTHEDGE0_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO1" base ad:0xE6051000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL1,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL1_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL1,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL1_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT1,General output register 0" bitfld.long 0x08 31. " OUTDT1_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT1,General input register 1" bitfld.long 0x00 31. " INDT1_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT1,Interrupt display register 1" bitfld.long 0x04 31. " INTDT1_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR1,Interrupt clear register 1" bitfld.long 0x00 31. " INTCLR1_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK1,Interrupt mask register 1" bitfld.long 0x04 31. " INTMSK1_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR1,Interrupt mask clear register 1" bitfld.long 0x08 31. " MSKCLR1_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG1,Positive/negative logic select register 1" bitfld.long 0x0C 31. " POSNEG1_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL1,Edge/level select register 1" bitfld.long 0x10 31. " EDGLEVEL1_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF1,Chattering prevention on/off register 1" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF1_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS1,Interrupt Sub Mask Register 1" bitfld.long 0x00 31. " INTMSKS1_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS1,Interrupt Sub Mask Clear Register 1" bitfld.long 0x04 31. " MSKCLRS1_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL1,Output Data Select Register 1" bitfld.long 0x08 31. " OUTDTSEL1_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH1,Output Data High Register 1" bitfld.long 0x0C 31. " OUTDTH1_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL1,Output Data Low Register 1" bitfld.long 0x10 31. " OUTDTL1_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE1,One Edge/Both Edge Select Register 1" bitfld.long 0x14 31. " BOTHEDGE1_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO2" base ad:0xE6052000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL2,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL2_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL2,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL2_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT2,General output register 0" bitfld.long 0x08 31. " OUTDT2_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT2,General input register 2" bitfld.long 0x00 31. " INDT2_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT2,Interrupt display register 2" bitfld.long 0x04 31. " INTDT2_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR2,Interrupt clear register 2" bitfld.long 0x00 31. " INTCLR2_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK2,Interrupt mask register 2" bitfld.long 0x04 31. " INTMSK2_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR2,Interrupt mask clear register 2" bitfld.long 0x08 31. " MSKCLR2_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG2,Positive/negative logic select register 2" bitfld.long 0x0C 31. " POSNEG2_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL2,Edge/level select register 2" bitfld.long 0x10 31. " EDGLEVEL2_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF2,Chattering prevention on/off register 2" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF2_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS2,Interrupt Sub Mask Register 2" bitfld.long 0x00 31. " INTMSKS2_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS2,Interrupt Sub Mask Clear Register 2" bitfld.long 0x04 31. " MSKCLRS2_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL2,Output Data Select Register 2" bitfld.long 0x08 31. " OUTDTSEL2_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH2,Output Data High Register 2" bitfld.long 0x0C 31. " OUTDTH2_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL2,Output Data Low Register 2" bitfld.long 0x10 31. " OUTDTL2_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE2,One Edge/Both Edge Select Register 2" bitfld.long 0x14 31. " BOTHEDGE2_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO3" base ad:0xE6053000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL3,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL3_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL3,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL3_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT3,General output register 0" bitfld.long 0x08 31. " OUTDT3_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT3,General input register 3" bitfld.long 0x00 31. " INDT3_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT3,Interrupt display register 3" bitfld.long 0x04 31. " INTDT3_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR3,Interrupt clear register 3" bitfld.long 0x00 31. " INTCLR3_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK3,Interrupt mask register 3" bitfld.long 0x04 31. " INTMSK3_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR3,Interrupt mask clear register 3" bitfld.long 0x08 31. " MSKCLR3_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG3,Positive/negative logic select register 3" bitfld.long 0x0C 31. " POSNEG3_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL3,Edge/level select register 3" bitfld.long 0x10 31. " EDGLEVEL3_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF3,Chattering prevention on/off register 3" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF3_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS3,Interrupt Sub Mask Register 3" bitfld.long 0x00 31. " INTMSKS3_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS3,Interrupt Sub Mask Clear Register 3" bitfld.long 0x04 31. " MSKCLRS3_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL3,Output Data Select Register 3" bitfld.long 0x08 31. " OUTDTSEL3_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH3,Output Data High Register 3" bitfld.long 0x0C 31. " OUTDTH3_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL3,Output Data Low Register 3" bitfld.long 0x10 31. " OUTDTL3_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE3,One Edge/Both Edge Select Register 3" bitfld.long 0x14 31. " BOTHEDGE3_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO4" base ad:0xE6054000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL4,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL4_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL4,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL4_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT4,General output register 0" bitfld.long 0x08 31. " OUTDT4_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT4,General input register 4" bitfld.long 0x00 31. " INDT4_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT4,Interrupt display register 4" bitfld.long 0x04 31. " INTDT4_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR4,Interrupt clear register 4" bitfld.long 0x00 31. " INTCLR4_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK4,Interrupt mask register 4" bitfld.long 0x04 31. " INTMSK4_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR4,Interrupt mask clear register 4" bitfld.long 0x08 31. " MSKCLR4_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG4,Positive/negative logic select register 4" bitfld.long 0x0C 31. " POSNEG4_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL4,Edge/level select register 4" bitfld.long 0x10 31. " EDGLEVEL4_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF4,Chattering prevention on/off register 4" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF4_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS4,Interrupt Sub Mask Register 4" bitfld.long 0x00 31. " INTMSKS4_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS4,Interrupt Sub Mask Clear Register 4" bitfld.long 0x04 31. " MSKCLRS4_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL4,Output Data Select Register 4" bitfld.long 0x08 31. " OUTDTSEL4_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH4,Output Data High Register 4" bitfld.long 0x0C 31. " OUTDTH4_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL4,Output Data Low Register 4" bitfld.long 0x10 31. " OUTDTL4_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE4,One Edge/Both Edge Select Register 4" bitfld.long 0x14 31. " BOTHEDGE4_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO5" base ad:0xE6055000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL5,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL5_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL5,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL5_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT5,General output register 0" bitfld.long 0x08 31. " OUTDT5_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT5,General input register 5" bitfld.long 0x00 31. " INDT5_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT5,Interrupt display register 5" bitfld.long 0x04 31. " INTDT5_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR5,Interrupt clear register 5" bitfld.long 0x00 31. " INTCLR5_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK5,Interrupt mask register 5" bitfld.long 0x04 31. " INTMSK5_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR5,Interrupt mask clear register 5" bitfld.long 0x08 31. " MSKCLR5_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG5,Positive/negative logic select register 5" bitfld.long 0x0C 31. " POSNEG5_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL5,Edge/level select register 5" bitfld.long 0x10 31. " EDGLEVEL5_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF5,Chattering prevention on/off register 5" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF5_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS5,Interrupt Sub Mask Register 5" bitfld.long 0x00 31. " INTMSKS5_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS5,Interrupt Sub Mask Clear Register 5" bitfld.long 0x04 31. " MSKCLRS5_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL5,Output Data Select Register 5" bitfld.long 0x08 31. " OUTDTSEL5_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH5,Output Data High Register 5" bitfld.long 0x0C 31. " OUTDTH5_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL5,Output Data Low Register 5" bitfld.long 0x10 31. " OUTDTL5_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE5,One Edge/Both Edge Select Register 5" bitfld.long 0x14 31. " BOTHEDGE5_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO6" base ad:0xE6055100 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL6,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL6_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL6,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL6_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT6,General output register 0" bitfld.long 0x08 31. " OUTDT6_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT6,General input register 6" bitfld.long 0x00 31. " INDT6_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT6,Interrupt display register 6" bitfld.long 0x04 31. " INTDT6_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR6,Interrupt clear register 6" bitfld.long 0x00 31. " INTCLR6_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK6,Interrupt mask register 6" bitfld.long 0x04 31. " INTMSK6_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR6,Interrupt mask clear register 6" bitfld.long 0x08 31. " MSKCLR6_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG6,Positive/negative logic select register 6" bitfld.long 0x0C 31. " POSNEG6_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL6,Edge/level select register 6" bitfld.long 0x10 31. " EDGLEVEL6_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF6,Chattering prevention on/off register 6" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF6_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS6,Interrupt Sub Mask Register 6" bitfld.long 0x00 31. " INTMSKS6_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS6,Interrupt Sub Mask Clear Register 6" bitfld.long 0x04 31. " MSKCLRS6_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL6,Output Data Select Register 6" bitfld.long 0x08 31. " OUTDTSEL6_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH6,Output Data High Register 6" bitfld.long 0x0C 31. " OUTDTH6_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL6,Output Data Low Register 6" bitfld.long 0x10 31. " OUTDTL6_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE6,One Edge/Both Edge Select Register 6" bitfld.long 0x14 31. " BOTHEDGE6_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO7" base ad:0xE6055200 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL7,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL7_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL7,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL7_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT7,General output register 0" bitfld.long 0x08 31. " OUTDT7_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT7,General input register 7" bitfld.long 0x00 31. " INDT7_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT7,Interrupt display register 7" bitfld.long 0x04 31. " INTDT7_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR7,Interrupt clear register 7" bitfld.long 0x00 31. " INTCLR7_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK7,Interrupt mask register 7" bitfld.long 0x04 31. " INTMSK7_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR7,Interrupt mask clear register 7" bitfld.long 0x08 31. " MSKCLR7_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG7,Positive/negative logic select register 7" bitfld.long 0x0C 31. " POSNEG7_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL7,Edge/level select register 7" bitfld.long 0x10 31. " EDGLEVEL7_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF7,Chattering prevention on/off register 7" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF7_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS7,Interrupt Sub Mask Register 7" bitfld.long 0x00 31. " INTMSKS7_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS7,Interrupt Sub Mask Clear Register 7" bitfld.long 0x04 31. " MSKCLRS7_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL7,Output Data Select Register 7" bitfld.long 0x08 31. " OUTDTSEL7_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH7,Output Data High Register 7" bitfld.long 0x0C 31. " OUTDTH7_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL7,Output Data Low Register 7" bitfld.long 0x10 31. " OUTDTL7_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE7,One Edge/Both Edge Select Register 7" bitfld.long 0x14 31. " BOTHEDGE7_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO8" base ad:0xE6055300 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL8,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL8_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL8,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL8_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT8,General output register 0" bitfld.long 0x08 31. " OUTDT8_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT8,General input register 8" bitfld.long 0x00 31. " INDT8_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT8,Interrupt display register 8" bitfld.long 0x04 31. " INTDT8_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR8,Interrupt clear register 8" bitfld.long 0x00 31. " INTCLR8_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK8,Interrupt mask register 8" bitfld.long 0x04 31. " INTMSK8_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR8,Interrupt mask clear register 8" bitfld.long 0x08 31. " MSKCLR8_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG8,Positive/negative logic select register 8" bitfld.long 0x0C 31. " POSNEG8_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL8,Edge/level select register 8" bitfld.long 0x10 31. " EDGLEVEL8_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF8,Chattering prevention on/off register 8" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF8_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS8,Interrupt Sub Mask Register 8" bitfld.long 0x00 31. " INTMSKS8_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS8,Interrupt Sub Mask Clear Register 8" bitfld.long 0x04 31. " MSKCLRS8_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL8,Output Data Select Register 8" bitfld.long 0x08 31. " OUTDTSEL8_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH8,Output Data High Register 8" bitfld.long 0x0C 31. " OUTDTH8_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL8,Output Data Low Register 8" bitfld.long 0x10 31. " OUTDTL8_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE8,One Edge/Both Edge Select Register 8" bitfld.long 0x14 31. " BOTHEDGE8_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO9" base ad:0xE6055400 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL9,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL9_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL9,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL9_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT9,General output register 0" bitfld.long 0x08 31. " OUTDT9_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT9,General input register 9" bitfld.long 0x00 31. " INDT9_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT9,Interrupt display register 9" bitfld.long 0x04 31. " INTDT9_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR9,Interrupt clear register 9" bitfld.long 0x00 31. " INTCLR9_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK9,Interrupt mask register 9" bitfld.long 0x04 31. " INTMSK9_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR9,Interrupt mask clear register 9" bitfld.long 0x08 31. " MSKCLR9_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG9,Positive/negative logic select register 9" bitfld.long 0x0C 31. " POSNEG9_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL9,Edge/level select register 9" bitfld.long 0x10 31. " EDGLEVEL9_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF9,Chattering prevention on/off register 9" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF9_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS9,Interrupt Sub Mask Register 9" bitfld.long 0x00 31. " INTMSKS9_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS9,Interrupt Sub Mask Clear Register 9" bitfld.long 0x04 31. " MSKCLRS9_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL9,Output Data Select Register 9" bitfld.long 0x08 31. " OUTDTSEL9_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH9,Output Data High Register 9" bitfld.long 0x0C 31. " OUTDTH9_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL9,Output Data Low Register 9" bitfld.long 0x10 31. " OUTDTL9_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE9,One Edge/Both Edge Select Register 9" bitfld.long 0x14 31. " BOTHEDGE9_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO10" base ad:0xE6055500 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL10,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL10_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL10,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL10_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT10,General output register 0" bitfld.long 0x08 31. " OUTDT10_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT10,General input register 10" bitfld.long 0x00 31. " INDT10_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT10,Interrupt display register 10" bitfld.long 0x04 31. " INTDT10_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR10,Interrupt clear register 10" bitfld.long 0x00 31. " INTCLR10_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK10,Interrupt mask register 10" bitfld.long 0x04 31. " INTMSK10_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR10,Interrupt mask clear register 10" bitfld.long 0x08 31. " MSKCLR10_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG10,Positive/negative logic select register 10" bitfld.long 0x0C 31. " POSNEG10_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL10,Edge/level select register 10" bitfld.long 0x10 31. " EDGLEVEL10_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF10,Chattering prevention on/off register 10" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF10_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS10,Interrupt Sub Mask Register 10" bitfld.long 0x00 31. " INTMSKS10_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS10,Interrupt Sub Mask Clear Register 10" bitfld.long 0x04 31. " MSKCLRS10_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL10,Output Data Select Register 10" bitfld.long 0x08 31. " OUTDTSEL10_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH10,Output Data High Register 10" bitfld.long 0x0C 31. " OUTDTH10_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL10,Output Data Low Register 10" bitfld.long 0x10 31. " OUTDTL10_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE10,One Edge/Both Edge Select Register 10" bitfld.long 0x14 31. " BOTHEDGE10_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree "GPIO11" base ad:0xE6055600 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL11,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL11_[31] ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " [30] ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " [29] ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " [28] ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" bitfld.long 0x00 27. " [27] ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " [26] ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" bitfld.long 0x00 25. " [25] ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " [24] ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " [22] ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" bitfld.long 0x00 21. " [21] ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " [20] ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " [19] ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " [18] ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" bitfld.long 0x00 17. " [17] ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " [16] ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " [14] ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" bitfld.long 0x00 13. " [13] ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " [12] ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " [11] ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " [10] ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" bitfld.long 0x00 9. " [9] ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " [8] ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " [6] ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" bitfld.long 0x00 5. " [5] ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " [4] ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " [3] ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " [2] ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" bitfld.long 0x00 1. " [1] ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " [0] ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL11,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL11_[31] ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " [30] ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " [29] ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " [28] ,General input or output mode select for channel 28" "Input,Output" bitfld.long 0x04 27. " [27] ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " [26] ,General input or output mode select for channel 26" "Input,Output" bitfld.long 0x04 25. " [25] ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " [24] ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " [22] ,General input or output mode select for channel 22" "Input,Output" bitfld.long 0x04 21. " [21] ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " [20] ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " [19] ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " [18] ,General input or output mode select for channel 18" "Input,Output" bitfld.long 0x04 17. " [17] ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " [16] ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " [14] ,General input or output mode select for channel 14" "Input,Output" bitfld.long 0x04 13. " [13] ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " [12] ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " [11] ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " [10] ,General input or output mode select for channel 10" "Input,Output" bitfld.long 0x04 9. " [9] ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " [8] ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " [6] ,General input or output mode select for channel 6" "Input,Output" bitfld.long 0x04 5. " [5] ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " [4] ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " [3] ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " [2] ,General input or output mode select for channel 2" "Input,Output" bitfld.long 0x04 1. " [1] ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " [0] ,General input or output mode select for channel 0" "Input,Output" textline "" line.long 0x08 "OUTDT11,General output register 0" bitfld.long 0x08 31. " OUTDT11_[31] ,Output value for channel 31" "Low,High" bitfld.long 0x08 30. " [30] ,Output value for channel 30" "Low,High" bitfld.long 0x08 29. " [29] ,Output value for channel 29" "Low,High" bitfld.long 0x08 28. " [28] ,Output value for channel 28" "Low,High" bitfld.long 0x08 27. " [27] ,Output value for channel 27" "Low,High" bitfld.long 0x08 26. " [26] ,Output value for channel 26" "Low,High" bitfld.long 0x08 25. " [25] ,Output value for channel 25" "Low,High" bitfld.long 0x08 24. " [24] ,Output value for channel 24" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Output value for channel 23" "Low,High" bitfld.long 0x08 22. " [22] ,Output value for channel 22" "Low,High" bitfld.long 0x08 21. " [21] ,Output value for channel 21" "Low,High" bitfld.long 0x08 20. " [20] ,Output value for channel 20" "Low,High" bitfld.long 0x08 19. " [19] ,Output value for channel 19" "Low,High" bitfld.long 0x08 18. " [18] ,Output value for channel 18" "Low,High" bitfld.long 0x08 17. " [17] ,Output value for channel 17" "Low,High" bitfld.long 0x08 16. " [16] ,Output value for channel 16" "Low,High" textline " " bitfld.long 0x08 15. " [15] ,Output value for channel 15" "Low,High" bitfld.long 0x08 14. " [14] ,Output value for channel 14" "Low,High" bitfld.long 0x08 13. " [13] ,Output value for channel 13" "Low,High" bitfld.long 0x08 12. " [12] ,Output value for channel 12" "Low,High" bitfld.long 0x08 11. " [11] ,Output value for channel 11" "Low,High" bitfld.long 0x08 10. " [10] ,Output value for channel 10" "Low,High" bitfld.long 0x08 9. " [9] ,Output value for channel 9" "Low,High" bitfld.long 0x08 8. " [8] ,Output value for channel 8" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Output value for channel 7" "Low,High" bitfld.long 0x08 6. " [6] ,Output value for channel 6" "Low,High" bitfld.long 0x08 5. " [5] ,Output value for channel 5" "Low,High" bitfld.long 0x08 4. " [4] ,Output value for channel 4" "Low,High" bitfld.long 0x08 3. " [3] ,Output value for channel 3" "Low,High" bitfld.long 0x08 2. " [2] ,Output value for channel 2" "Low,High" bitfld.long 0x08 1. " [1] ,Output value for channel 1" "Low,High" bitfld.long 0x08 0. " [0] ,Output value for channel 0" "Low,High" rgroup.long 0x0C++0x07 line.long 0x00 "INDT11,General input register 11" bitfld.long 0x00 31. " INDT11_[31] ,Value received through pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Value received through pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Value received through pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Value received through pin 28" "Low,High" bitfld.long 0x00 27. " [27] ,Value received through pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Value received through pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Value received through pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Value received through pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Value received through pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Value received through pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Value received through pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Value received through pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Value received through pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Value received through pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Value received through pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Value received through pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Value received through pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Value received through pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Value received through pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Value received through pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Value received through pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Value received through pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Value received through pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Value received through pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Value received through pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Value received through pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Value received through pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Value received through pin 4" "Low,High" bitfld.long 0x00 3. " [3] ,Value received through pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Value received through pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Value received through pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Value received through pin 0" "Low,High" textline "" line.long 0x04 "INTDT11,Interrupt display register 11" bitfld.long 0x04 31. " INTDT11_[31] ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" bitfld.long 0x04 27. " [27] ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " [24] ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " [23] ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " [15] ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " [10] ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR11,Interrupt clear register 11" bitfld.long 0x00 31. " INTCLR11_[31] ,Interrupt Display Register bit clear for pin 31" "No effect,Clear" bitfld.long 0x00 30. " [30] ,Interrupt Display Register bit clear for pin 30" "No effect,Clear" bitfld.long 0x00 29. " [29] ,Interrupt Display Register bit clear for pin 29" "No effect,Clear" bitfld.long 0x00 28. " [28] ,Interrupt Display Register bit clear for pin 28" "No effect,Clear" bitfld.long 0x00 27. " [27] ,Interrupt Display Register bit clear for pin 27" "No effect,Clear" bitfld.long 0x00 26. " [26] ,Interrupt Display Register bit clear for pin 26" "No effect,Clear" bitfld.long 0x00 25. " [25] ,Interrupt Display Register bit clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x00 24. " [24] ,Interrupt Display Register bit clear for pin 24" "No effect,Clear" bitfld.long 0x00 23. " [23] ,Interrupt Display Register bit clear for pin 23" "No effect,Clear" bitfld.long 0x00 22. " [22] ,Interrupt Display Register bit clear for pin 22" "No effect,Clear" bitfld.long 0x00 21. " [21] ,Interrupt Display Register bit clear for pin 21" "No effect,Clear" bitfld.long 0x00 20. " [20] ,Interrupt Display Register bit clear for pin 20" "No effect,Clear" bitfld.long 0x00 19. " [19] ,Interrupt Display Register bit clear for pin 19" "No effect,Clear" bitfld.long 0x00 18. " [18] ,Interrupt Display Register bit clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " [17] ,Interrupt Display Register bit clear for pin 17" "No effect,Clear" bitfld.long 0x00 16. " [16] ,Interrupt Display Register bit clear for pin 16" "No effect,Clear" bitfld.long 0x00 15. " [15] ,Interrupt Display Register bit clear for pin 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Interrupt Display Register bit clear for pin 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Interrupt Display Register bit clear for pin 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Interrupt Display Register bit clear for pin 12" "No effect,Clear" bitfld.long 0x00 11. " [11] ,Interrupt Display Register bit clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x00 10. " [10] ,Interrupt Display Register bit clear for pin 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Interrupt Display Register bit clear for pin 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Interrupt Display Register bit clear for pin 8" "No effect,Clear" bitfld.long 0x00 7. " [7] ,Interrupt Display Register bit clear for pin 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Interrupt Display Register bit clear for pin 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Interrupt Display Register bit clear for pin 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Interrupt Display Register bit clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Interrupt Display Register bit clear for pin 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Interrupt Display Register bit clear for pin 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Interrupt Display Register bit clear for pin 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Interrupt Display Register bit clear for pin 0" "No effect,Clear" line.long 0x04 "INTMSK11,Interrupt mask register 11" bitfld.long 0x04 31. " INTMSK11_[31] ,Interrupt request mask for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Interrupt request mask for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Interrupt request mask for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Interrupt request mask for pin 28" "Masked,Not masked" bitfld.long 0x04 27. " [27] ,Interrupt request mask for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Interrupt request mask for pin 26" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Interrupt request mask for pin 25" "Masked,Not masked" textline " " bitfld.long 0x04 24. " [24] ,Interrupt request mask for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " [23] ,Interrupt request mask for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Interrupt request mask for pin 22" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Interrupt request mask for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Interrupt request mask for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " [19] ,Interrupt request mask for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Interrupt request mask for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " [17] ,Interrupt request mask for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Interrupt request mask for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Interrupt request mask for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Interrupt request mask for pin 14" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Interrupt request mask for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Interrupt request mask for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Interrupt request mask for pin 11" "Masked,Not masked" textline " " bitfld.long 0x04 10. " [10] ,Interrupt request mask for pin 10" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Interrupt request mask for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Interrupt request mask for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Interrupt request mask for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Interrupt request mask for pin 6" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Interrupt request mask for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Interrupt request mask for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " [3] ,Interrupt request mask for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Interrupt request mask for pin 2" "Masked,Not masked" bitfld.long 0x04 1. " [1] ,Interrupt request mask for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Interrupt request mask for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR11,Interrupt mask clear register 11" bitfld.long 0x08 31. " MSKCLR11_[31] ,Interrupt mask clear for pin 31" "No effect,Clear" bitfld.long 0x08 30. " [30] ,Interrupt mask clear for pin 30" "No effect,Clear" bitfld.long 0x08 29. " [29] ,Interrupt mask clear for pin 29" "No effect,Clear" bitfld.long 0x08 28. " [28] ,Interrupt mask clear for pin 28" "No effect,Clear" bitfld.long 0x08 27. " [27] ,Interrupt mask clear for pin 27" "No effect,Clear" bitfld.long 0x08 26. " [26] ,Interrupt mask clear for pin 26" "No effect,Clear" bitfld.long 0x08 25. " [25] ,Interrupt mask clear for pin 25" "No effect,Clear" textline " " bitfld.long 0x08 24. " [24] ,Interrupt mask clear for pin 24" "No effect,Clear" bitfld.long 0x08 23. " [23] ,Interrupt mask clear for pin 23" "No effect,Clear" bitfld.long 0x08 22. " [22] ,Interrupt mask clear for pin 22" "No effect,Clear" bitfld.long 0x08 21. " [21] ,Interrupt mask clear for pin 21" "No effect,Clear" bitfld.long 0x08 20. " [20] ,Interrupt mask clear for pin 20" "No effect,Clear" bitfld.long 0x08 19. " [19] ,Interrupt mask clear for pin 19" "No effect,Clear" bitfld.long 0x08 18. " [18] ,Interrupt mask clear for pin 18" "No effect,Clear" textline " " bitfld.long 0x08 17. " [17] ,Interrupt mask clear for pin 17" "No effect,Clear" bitfld.long 0x08 16. " [16] ,Interrupt mask clear for pin 16" "No effect,Clear" bitfld.long 0x08 15. " [15] ,Interrupt mask clear for pin 15" "No effect,Clear" bitfld.long 0x08 14. " [14] ,Interrupt mask clear for pin 14" "No effect,Clear" bitfld.long 0x08 13. " [13] ,Interrupt mask clear for pin 13" "No effect,Clear" bitfld.long 0x08 12. " [12] ,Interrupt mask clear for pin 12" "No effect,Clear" bitfld.long 0x08 11. " [11] ,Interrupt mask clear for pin 11" "No effect,Clear" textline " " bitfld.long 0x08 10. " [10] ,Interrupt mask clear for pin 10" "No effect,Clear" bitfld.long 0x08 9. " [9] ,Interrupt mask clear for pin 9" "No effect,Clear" bitfld.long 0x08 8. " [8] ,Interrupt mask clear for pin 8" "No effect,Clear" bitfld.long 0x08 7. " [7] ,Interrupt mask clear for pin 7" "No effect,Clear" bitfld.long 0x08 6. " [6] ,Interrupt mask clear for pin 6" "No effect,Clear" bitfld.long 0x08 5. " [5] ,Interrupt mask clear for pin 5" "No effect,Clear" bitfld.long 0x08 4. " [4] ,Interrupt mask clear for pin 4" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,Interrupt mask clear for pin 3" "No effect,Clear" bitfld.long 0x08 2. " [2] ,Interrupt mask clear for pin 2" "No effect,Clear" bitfld.long 0x08 1. " [1] ,Interrupt mask clear for pin 1" "No effect,Clear" bitfld.long 0x08 0. " [0] ,Interrupt mask clear for pin 0" "No effect,Clear" line.long 0x0C "POSNEG11,Positive/negative logic select register 11" bitfld.long 0x0C 31. " POSNEG11_[31] ,Polarity select for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " [30] ,Polarity select for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " [29] ,Polarity select for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " [28] ,Polarity select for pin 28" "Positive,Negative" bitfld.long 0x0C 27. " [27] ,Polarity select for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " [26] ,Polarity select for pin 26" "Positive,Negative" bitfld.long 0x0C 25. " [25] ,Polarity select for pin 25" "Positive,Negative" textline " " bitfld.long 0x0C 24. " [24] ,Polarity select for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " [23] ,Polarity select for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " [22] ,Polarity select for pin 22" "Positive,Negative" bitfld.long 0x0C 21. " [21] ,Polarity select for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " [20] ,Polarity select for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " [19] ,Polarity select for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " [18] ,Polarity select for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " [17] ,Polarity select for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " [16] ,Polarity select for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " [15] ,Polarity select for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " [14] ,Polarity select for pin 14" "Positive,Negative" bitfld.long 0x0C 13. " [13] ,Polarity select for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " [12] ,Polarity select for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " [11] ,Polarity select for pin 11" "Positive,Negative" textline " " bitfld.long 0x0C 10. " [10] ,Polarity select for pin 10" "Positive,Negative" bitfld.long 0x0C 9. " [9] ,Polarity select for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " [8] ,Polarity select for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " [7] ,Polarity select for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " [6] ,Polarity select for pin 6" "Positive,Negative" bitfld.long 0x0C 5. " [5] ,Polarity select for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " [4] ,Polarity select for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " [3] ,Polarity select for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " [2] ,Polarity select for pin 2" "Positive,Negative" bitfld.long 0x0C 1. " [1] ,Polarity select for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " [0] ,Polarity select for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL11,Edge/level select register 11" bitfld.long 0x10 31. " EDGLEVEL11_[31] ,Interrupt input signal detection condition for pin 31" "Level,Edge" bitfld.long 0x10 30. " [30] ,Interrupt input signal detection condition for pin 30" "Level,Edge" bitfld.long 0x10 29. " [29] ,Interrupt input signal detection condition for pin 29" "Level,Edge" bitfld.long 0x10 28. " [28] ,Interrupt input signal detection condition for pin 28" "Level,Edge" bitfld.long 0x10 27. " [27] ,Interrupt input signal detection condition for pin 27" "Level,Edge" bitfld.long 0x10 26. " [26] ,Interrupt input signal detection condition for pin 26" "Level,Edge" bitfld.long 0x10 25. " [25] ,Interrupt input signal detection condition for pin 25" "Level,Edge" textline " " bitfld.long 0x10 24. " [24] ,Interrupt input signal detection condition for pin 24" "Level,Edge" bitfld.long 0x10 23. " [23] ,Interrupt input signal detection condition for pin 23" "Level,Edge" bitfld.long 0x10 22. " [22] ,Interrupt input signal detection condition for pin 22" "Level,Edge" bitfld.long 0x10 21. " [21] ,Interrupt input signal detection condition for pin 21" "Level,Edge" bitfld.long 0x10 20. " [20] ,Interrupt input signal detection condition for pin 20" "Level,Edge" bitfld.long 0x10 19. " [19] ,Interrupt input signal detection condition for pin 19" "Level,Edge" bitfld.long 0x10 18. " [18] ,Interrupt input signal detection condition for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " [17] ,Interrupt input signal detection condition for pin 17" "Level,Edge" bitfld.long 0x10 16. " [16] ,Interrupt input signal detection condition for pin 16" "Level,Edge" bitfld.long 0x10 15. " [15] ,Interrupt input signal detection condition for pin 15" "Level,Edge" bitfld.long 0x10 14. " [14] ,Interrupt input signal detection condition for pin 14" "Level,Edge" bitfld.long 0x10 13. " [13] ,Interrupt input signal detection condition for pin 13" "Level,Edge" bitfld.long 0x10 12. " [12] ,Interrupt input signal detection condition for pin 12" "Level,Edge" bitfld.long 0x10 11. " [11] ,Interrupt input signal detection condition for pin 11" "Level,Edge" textline " " bitfld.long 0x10 10. " [10] ,Interrupt input signal detection condition for pin 10" "Level,Edge" bitfld.long 0x10 9. " [9] ,Interrupt input signal detection condition for pin 9" "Level,Edge" bitfld.long 0x10 8. " [8] ,Interrupt input signal detection condition for pin 8" "Level,Edge" bitfld.long 0x10 7. " [7] ,Interrupt input signal detection condition for pin 7" "Level,Edge" bitfld.long 0x10 6. " [6] ,Interrupt input signal detection condition for pin 6" "Level,Edge" bitfld.long 0x10 5. " [5] ,Interrupt input signal detection condition for pin 5" "Level,Edge" bitfld.long 0x10 4. " [4] ,Interrupt input signal detection condition for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " [3] ,Interrupt input signal detection condition for pin 3" "Level,Edge" bitfld.long 0x10 2. " [2] ,Interrupt input signal detection condition for pin 2" "Level,Edge" bitfld.long 0x10 1. " [1] ,Interrupt input signal detection condition for pin 1" "Level,Edge" bitfld.long 0x10 0. " [0] ,Interrupt input signal detection condition for pin 0" "Level,Edge" textline "" line.long 0x14 "FILONOFF11,Chattering prevention on/off register 11" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" bitfld.long 0x14 3. " FILONOFF11_[3] ,Chattering prevention function enable 3" "Disabled,Enabled" bitfld.long 0x14 2. " [2] ,Chattering prevention function enable 2" "Disabled,Enabled" bitfld.long 0x14 1. " [1] ,Chattering prevention function enable 1" "Disabled,Enabled" bitfld.long 0x14 0. " [0] ,Chattering prevention function enable 0" "Disabled,Enabled" textline "" group.long 0x38++0x17 line.long 0x00 "INTMSKS11,Interrupt Sub Mask Register 11" bitfld.long 0x00 31. " INTMSKS11_[31] ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Interrupt Sub Mask 30" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Interrupt Sub Mask 28" "Masked,Not masked" bitfld.long 0x00 27. " [27] ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Interrupt Sub Mask 26" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Interrupt Sub Mask 22" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Interrupt Sub Mask 20" "Masked,Not masked" bitfld.long 0x00 19. " [19] ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Interrupt Sub Mask 18" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Interrupt Sub Mask 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Interrupt Sub Mask 12" "Masked,Not masked" bitfld.long 0x00 11. " [11] ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Interrupt Sub Mask 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Interrupt Sub Mask 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Interrupt Sub Mask 4" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Interrupt Sub Mask 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Interrupt Sub Mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS11,Interrupt Sub Mask Clear Register 11" bitfld.long 0x04 31. " MSKCLRS11_[31] ,Interrupt Sub Mask Clear 31" "No effect,Clear" bitfld.long 0x04 30. " [30] ,Interrupt Sub Mask Clear 30" "No effect,Clear" bitfld.long 0x04 29. " [29] ,Interrupt Sub Mask Clear 29" "No effect,Clear" bitfld.long 0x04 28. " [28] ,Interrupt Sub Mask Clear 28" "No effect,Clear" bitfld.long 0x04 27. " [27] ,Interrupt Sub Mask Clear 27" "No effect,Clear" bitfld.long 0x04 26. " [26] ,Interrupt Sub Mask Clear 26" "No effect,Clear" bitfld.long 0x04 25. " [25] ,Interrupt Sub Mask Clear 25" "No effect,Clear" bitfld.long 0x04 24. " [24] ,Interrupt Sub Mask Clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " [23] ,Interrupt Sub Mask Clear 23" "No effect,Clear" bitfld.long 0x04 22. " [22] ,Interrupt Sub Mask Clear 22" "No effect,Clear" bitfld.long 0x04 21. " [21] ,Interrupt Sub Mask Clear 21" "No effect,Clear" bitfld.long 0x04 20. " [20] ,Interrupt Sub Mask Clear 20" "No effect,Clear" bitfld.long 0x04 19. " [19] ,Interrupt Sub Mask Clear 19" "No effect,Clear" bitfld.long 0x04 18. " [18] ,Interrupt Sub Mask Clear 18" "No effect,Clear" bitfld.long 0x04 17. " [17] ,Interrupt Sub Mask Clear 17" "No effect,Clear" bitfld.long 0x04 16. " [16] ,Interrupt Sub Mask Clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " [15] ,Interrupt Sub Mask Clear 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Interrupt Sub Mask Clear 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Interrupt Sub Mask Clear 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Interrupt Sub Mask Clear 12" "No effect,Clear" bitfld.long 0x04 11. " [11] ,Interrupt Sub Mask Clear 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Interrupt Sub Mask Clear 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Interrupt Sub Mask Clear 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Interrupt Sub Mask Clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Interrupt Sub Mask Clear 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Interrupt Sub Mask Clear 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Interrupt Sub Mask Clear 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Interrupt Sub Mask Clear 4" "No effect,Clear" bitfld.long 0x04 3. " [3] ,Interrupt Sub Mask Clear 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Interrupt Sub Mask Clear 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Interrupt Sub Mask Clear 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Interrupt Sub Mask Clear 0" "No effect,Clear" textline "" line.long 0x08 "OUTDTSEL11,Output Data Select Register 11" bitfld.long 0x08 31. " OUTDTSEL11_[31] ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " [30] ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " [29] ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " [28] ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 27. " [27] ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " [26] ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " [25] ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " [24] ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " [23] ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " [22] ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 21. " [21] ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " [20] ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " [19] ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " [18] ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 17. " [17] ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " [16] ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " [15] ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " [14] ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " [13] ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " [12] ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " [11] ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " [10] ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 9. " [9] ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " [8] ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " [7] ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " [6] ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 5. " [5] ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " [4] ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " [3] ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " [2] ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " [1] ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " [0] ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline "" line.long 0x0C "OUTDTH11,Output Data High Register 11" bitfld.long 0x0C 31. " OUTDTH11_[31] ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " [30] ,Output Data High 30" "Not valid,Valid" bitfld.long 0x0C 29. " [29] ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " [28] ,Output Data High 28" "Not valid,Valid" bitfld.long 0x0C 27. " [27] ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " [26] ,Output Data High 26" "Not valid,Valid" bitfld.long 0x0C 25. " [25] ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " [24] ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " [23] ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " [22] ,Output Data High 22" "Not valid,Valid" bitfld.long 0x0C 21. " [21] ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " [20] ,Output Data High 20" "Not valid,Valid" bitfld.long 0x0C 19. " [19] ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " [18] ,Output Data High 18" "Not valid,Valid" bitfld.long 0x0C 17. " [17] ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " [16] ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " [15] ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " [14] ,Output Data High 14" "Not valid,Valid" bitfld.long 0x0C 13. " [13] ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " [12] ,Output Data High 12" "Not valid,Valid" bitfld.long 0x0C 11. " [11] ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " [10] ,Output Data High 10" "Not valid,Valid" bitfld.long 0x0C 9. " [9] ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " [8] ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " [7] ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " [6] ,Output Data High 6" "Not valid,Valid" bitfld.long 0x0C 5. " [5] ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " [4] ,Output Data High 4" "Not valid,Valid" bitfld.long 0x0C 3. " [3] ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " [2] ,Output Data High 2" "Not valid,Valid" bitfld.long 0x0C 1. " [1] ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " [0] ,Output Data High 0" "Not valid,Valid" line.long 0x10 "OUTDTL11,Output Data Low Register 11" bitfld.long 0x10 31. " OUTDTL11_[31] ,Output Data Low 31" "Valid,Not valid" bitfld.long 0x10 30. " [30] ,Output Data Low 30" "Valid,Not valid" bitfld.long 0x10 29. " [29] ,Output Data Low 29" "Valid,Not valid" bitfld.long 0x10 28. " [28] ,Output Data Low 28" "Valid,Not valid" bitfld.long 0x10 27. " [27] ,Output Data Low 27" "Valid,Not valid" bitfld.long 0x10 26. " [26] ,Output Data Low 26" "Valid,Not valid" bitfld.long 0x10 25. " [25] ,Output Data Low 25" "Valid,Not valid" bitfld.long 0x10 24. " [24] ,Output Data Low 24" "Valid,Not valid" textline " " bitfld.long 0x10 23. " [23] ,Output Data Low 23" "Valid,Not valid" bitfld.long 0x10 22. " [22] ,Output Data Low 22" "Valid,Not valid" bitfld.long 0x10 21. " [21] ,Output Data Low 21" "Valid,Not valid" bitfld.long 0x10 20. " [20] ,Output Data Low 20" "Valid,Not valid" bitfld.long 0x10 19. " [19] ,Output Data Low 19" "Valid,Not valid" bitfld.long 0x10 18. " [18] ,Output Data Low 18" "Valid,Not valid" bitfld.long 0x10 17. " [17] ,Output Data Low 17" "Valid,Not valid" bitfld.long 0x10 16. " [16] ,Output Data Low 16" "Valid,Not valid" textline " " bitfld.long 0x10 15. " [15] ,Output Data Low 15" "Valid,Not valid" bitfld.long 0x10 14. " [14] ,Output Data Low 14" "Valid,Not valid" bitfld.long 0x10 13. " [13] ,Output Data Low 13" "Valid,Not valid" bitfld.long 0x10 12. " [12] ,Output Data Low 12" "Valid,Not valid" bitfld.long 0x10 11. " [11] ,Output Data Low 11" "Valid,Not valid" bitfld.long 0x10 10. " [10] ,Output Data Low 10" "Valid,Not valid" bitfld.long 0x10 9. " [9] ,Output Data Low 9" "Valid,Not valid" bitfld.long 0x10 8. " [8] ,Output Data Low 8" "Valid,Not valid" textline " " bitfld.long 0x10 7. " [7] ,Output Data Low 7" "Valid,Not valid" bitfld.long 0x10 6. " [6] ,Output Data Low 6" "Valid,Not valid" bitfld.long 0x10 5. " [5] ,Output Data Low 5" "Valid,Not valid" bitfld.long 0x10 4. " [4] ,Output Data Low 4" "Valid,Not valid" bitfld.long 0x10 3. " [3] ,Output Data Low 3" "Valid,Not valid" bitfld.long 0x10 2. " [2] ,Output Data Low 2" "Valid,Not valid" bitfld.long 0x10 1. " [1] ,Output Data Low 1" "Valid,Not valid" bitfld.long 0x10 0. " [0] ,Output Data Low 0" "Valid,Not valid" line.long 0x14 "BOTHEDGE11,One Edge/Both Edge Select Register 11" bitfld.long 0x14 31. " BOTHEDGE11_[31] ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " [30] ,One Edge/Both Edge Select 30" "One,Both" bitfld.long 0x14 29. " [29] ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " [28] ,One Edge/Both Edge Select 28" "One,Both" bitfld.long 0x14 27. " [27] ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " [26] ,One Edge/Both Edge Select 26" "One,Both" bitfld.long 0x14 25. " [25] ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " [24] ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " [23] ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " [22] ,One Edge/Both Edge Select 22" "One,Both" bitfld.long 0x14 21. " [21] ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " [20] ,One Edge/Both Edge Select 20" "One,Both" bitfld.long 0x14 19. " [19] ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " [18] ,One Edge/Both Edge Select 18" "One,Both" bitfld.long 0x14 17. " [17] ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " [16] ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " [15] ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " [14] ,One Edge/Both Edge Select 14" "One,Both" bitfld.long 0x14 13. " [13] ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " [12] ,One Edge/Both Edge Select 12" "One,Both" bitfld.long 0x14 11. " [11] ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " [10] ,One Edge/Both Edge Select 10" "One,Both" bitfld.long 0x14 9. " [9] ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " [8] ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " [7] ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " [6] ,One Edge/Both Edge Select 6" "One,Both" bitfld.long 0x14 5. " [5] ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " [4] ,One Edge/Both Edge Select 4" "One,Both" bitfld.long 0x14 3. " [3] ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " [2] ,One Edge/Both Edge Select 2" "One,Both" bitfld.long 0x14 1. " [1] ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " [0] ,One Edge/Both Edge Select 0" "One,Both" width 0xB tree.end tree.end tree "CPG (Clock Pulse Generator)" base ad:0xE6150000 width 8. group.long 0x04++0x3 line.long 0x00 "FRQCRB,Frequency Control Register B" bitfld.long 0x00 31. " KICK ,KICK bit (FRQCRB and FRQCRC setting activation)" "No effect,Activate" bitfld.long 0x00 20.--23. " ZTRFC ,Debug Trace port Clock (ZTRfi) Frequency Division Ratio" ",,/4,/6,/8,/12,/16,/18,/24,,,,/5,?..." bitfld.long 0x00 16.--19. " ZTFC ,Debug Trace bus Clock (ZTfi) Frequency Division Ratio" ",,,/6,/8,/12,/16,/18,/24,,,,/5,?..." bitfld.long 0x00 0.--3. " ZTRD2FC ,Debug Clock (ZTRD2fi) Frequency Division Ratio" ",,,,,/12,/16,/18,/24,?..." width 0xB tree.end tree "MSSR (Module Standby and Software Reset)" base ad:0xE6150000 width 11. tree "Module Stop Status Registers" rgroup.long 0x30++0x3 line.long 0x00 "MSTPSR0,Module Stop Status Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Status" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Status" "Not stopped,Stopped" rgroup.long 0x38++0x3 line.long 0x00 "MSTPSR1,Module Stop Status Register 1" bitfld.long 0x00 31. " MSTPST131 ,VSP1 (SY) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 28. " MSTPST128 ,VSP1DU0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST127 ,VSP1DU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST125 ,TMU0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 24. " MSTPST124 ,CMT0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST122 ,TMU2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST121 ,TMU3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 19. " MSTPST119 ,ROT0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 18. " MSTPST118 ,ROT1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST117 ,ROT2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST116 ,ROT3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST115 ,ROT4 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST112 ,3DG Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST111 ,TMU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 6. " MSTPST106 ,JPU Stop Status" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST105 ,STBE Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST104 ,STB0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST103 ,STB1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST102 ,STB2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 1. " MSTPST101 ,STB3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " MSTPST100 ,STB4 Stop Status" "Not stopped,Stopped" rgroup.long 0x40++0x3 line.long 0x00 "MSTPSR2,Module Stop Status Register 2" bitfld.long 0x00 28. " MSTPST228 ,Crypt Engine (Secure) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST223 ,RDR Stop Status" "Not stopped,Stopped" bitfld.long 0x00 19. " MSTPST219 ,SYS-DMAC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST218 ,SYS-DMAC1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 15. " MSTPST215 ,DRC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST214 ,DRC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST213 ,MFIS Stop Status" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST208 ,MSIOF1 Stop Status" "Not stopped,Stopped" rgroup.long 0x48++0x7 line.long 0x00 "MSTPSR3,Module Stop Status Register 3" bitfld.long 0x00 29. " MSTPST329 ,CMT1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST314 ,SDHI0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST304 ,TPU0 Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR4,Module Stop Status Register 4" bitfld.long 0x04 31. " MSTPST431 ,Secure up-Time Clock Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST408 ,INTC-SYS Stop Status" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST407 ,IRQC Stop Status" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST402 ,RWDT Stop Status" "Not stopped,Stopped" rgroup.long 0x3C++0x3 line.long 0x00 "MSTPSR5,Module Stop Status Register 5" bitfld.long 0x00 30. " MSTPST530 ,Secure boot ROM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST526 ,Public boot ROM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST523 ,PWM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST522 ,Thermal Sensor Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MSTPST502 ,Audio-DMAC0 Stop Status" "Not stopped,Stopped" rgroup.long 0x1C4++0x3 line.long 0x00 "MSTPSR7,Module Stop Status Register 7" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST719 ,SCIF2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST718 ,SCIF3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Status" "Not stopped,Stopped" rgroup.long 0x9A0++0xF line.long 0x00 "MSTPSR8,Module Stop Status Register 8" bitfld.long 0x00 28. " MSTPST828 ,IMR-LSX3 2 Controller 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST827 ,IMR-LSX3 3 Controller 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST826 ,IMR-LSX3 4 Controller 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST825 ,IMR-LSX3 5 Controller 1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX3 0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX3 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IMR-LX3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST807 ,R-GP2D Stop Status" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST805 ,VIN4 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST804 ,VIN5 Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR9,Module Stop Status Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 27. " MSTPST927 ,I2C4 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Status" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST925 ,I2C5 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST921 ,GPIO8 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 19. " MSTPST919 ,GPIO9 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Status" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,CAN0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST915 ,CAN1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 14. " MSTPST914 ,GPIO10 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 13. " MSTPST913 ,GPIO11 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x4 5. " MSTPST905 ,GPIO6 Stop Status" "Not stopped,Stopped" bitfld.long 0x4 4. " MSTPST904 ,GPIO7 Stop Status" "Not stopped,Stopped" bitfld.long 0x4 1. " MSTPST901 ,Gyro ADC I/F Stop Status" "Not stopped,Stopped" line.long 0x08 "MSTPSR10,Module Stop Status Register 10" bitfld.long 0x08 12. " MSTPST1012 ,SSI3 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST1011 ,SSI4 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST1005 ,SSI (ALL) Stop Status" "Not stopped,Stopped" line.long 0x0C "MSTPSR11,Module Stop Status Register 11" bitfld.long 0x0C 3. " MSTPST1103 ,CRC Stop Status" "Not stopped,Stopped" tree.end tree "Realtime Module Stop Registers" group.long 0x110++0x17 line.long 0x00 "RMSTPCR0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 27. " MSTPST127 ,VSP1DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST125 ,TMU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST124 ,CMT0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST121 ,TMU3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 19. " MSTPST119 ,ROT0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST118 ,ROT1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST117 ,ROT2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST116 ,ROT3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST115 ,ROT4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST112 ,3DG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST106 ,JPU Stop Control" "Not stopped,Stopped" bitfld.long 0x04 5. " MSTPST105 ,STBE Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 4. " MSTPST104 ,STB0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST103 ,STB1 top Control" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST102 ,STB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST101 ,STB3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 0. " MSTPST100 ,STB4 Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR2,Realtime Module Stop Register 2" bitfld.long 0x08 28. " MSTPST228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST223 ,RDR Stop Control" "Not stopped,Stopped" bitfld.long 0x08 19. " MSTPST219 ,SYS-DMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST218 ,SYS-DMAC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST215 ,DRC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST214 ,DRC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST213 ,MFIS Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST208 ,MSIOF1 Stop Control" "Not stopped,Stopped" line.long 0x0C "RMSTPCR3,Realtime Module Stop Register 3" bitfld.long 0x0C 29. " MSTPST329 ,CMT1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 14. " MSTPST314 ,SDHI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST304 ,TPU0 Stop Control" "Not stopped,Stopped" line.long 0x10 "RMSTPCR4,Realtime Module Stop Register 4" bitfld.long 0x10 8. " MSTPST408 ,INTC-SY Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST407 ,IRQC Stop Control" "Not stopped,Stopped" bitfld.long 0x10 2. " MSTPST402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "RMSTPCR5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 26. " MSTPST526 ,Public boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST523 ,PWM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 22. " MSTPST522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 2. " MSTPST502 ,Audio-DMAC0 Stop Control" "Not stopped,Stopped" group.long 0x12C++0x3 line.long 0x00 "RMSTPCR7,Realtime Module Stop Register 7" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST719 ,SCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST718 ,SCIF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Control" "Not stopped,Stopped" group.long 0x980++0xF line.long 0x00 "RMSTPCR8,Realtime Module Stop Register 8" bitfld.long 0x00 28. " MSTPST828 ,IMR-LSX3 2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST827 ,IMR-LSX3 3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST826 ,IMR-LSX3 4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST825 ,IMR-LSX3 5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX3 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX3 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IIMR-LX3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST807 ,RGP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST805 ,VIN4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST804 ,VIN5 Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 27. " MSTPST927 ,I2C4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST925 ,I2C5 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST921 ,GPIO8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 19. " MSTPST919 ,GPIO9 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,CAN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST915 ,CAN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 14. " MSTPST914 ,GPIO10 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 13. " MSTPST913 ,GPIO11 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 5. " MSTPST905 ,GPIO6 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 4. " MSTPST904 ,GPIO7 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR10,Realtime Module Stop Register 10" bitfld.long 0x08 12. " MSTPST1012 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST1011 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST1005 ,SSI (ALL) Stop Control" "Not stopped,Stopped" line.long 0xC "RMSTPCR11,Realtime Module Stop Register 11" bitfld.long 0x0C 3. " MSTP1103 ,CRC Stop Control" "Not stopped,Stopped" tree.end tree "Realtime Module Stop Registers 2" group.long 0x130++0x17 line.long 0x00 "SMSTPCR0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 27. " MSTPST127 ,VSP1DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST125 ,TMU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST124 ,CMT0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST121 ,TMU3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 19. " MSTPST119 ,ROT0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST118 ,ROT1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST117 ,ROT2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST116 ,ROT3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST115 ,ROT4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST112 ,3DG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST106 ,JPU Stop Control" "Not stopped,Stopped" bitfld.long 0x04 5. " MSTPST105 ,STBE Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 4. " MSTPST104 ,STB0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST103 ,STB1 top Control" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST102 ,STB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST101 ,STB3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 0. " MSTPST100 ,STB4 Stop Control" "Not stopped,Stopped" line.long 0x08 "SMSTPCR2,Realtime Module Stop Register 2" bitfld.long 0x08 28. " MSTPST228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST223 ,RDR Stop Control" "Not stopped,Stopped" bitfld.long 0x08 19. " MSTPST219 ,SYS-DMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST218 ,SYS-DMAC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST215 ,DRC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST214 ,DRC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST213 ,MFIS Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST208 ,MSIOF1 Stop Control" "Not stopped,Stopped" line.long 0x0C "SMSTPCR3,Realtime Module Stop Register 3" bitfld.long 0x0C 29. " MSTPST329 ,CMT1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 14. " MSTPST314 ,SDHI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST304 ,TPU0 Stop Control" "Not stopped,Stopped" line.long 0x10 "SMSTPCR4,Realtime Module Stop Register 4" bitfld.long 0x10 31. " MSTPST431 ,Secure Up-Time Clock Stop Control" "Not stopped,Stopped" bitfld.long 0x10 8. " MSTPST408 ,INTC-SYS Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST407 ,IRQC Stop Control" "Not stopped,Stopped" bitfld.long 0x10 2. " MSTPST402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "SMSTPCR5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 26. " MSTPST526 ,Public boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST523 ,PWM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 22. " MSTPST522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 2. " MSTPST502 ,Audio-DMAC0 Stop Control" "Not stopped,Stopped" group.long 0x14C++0x3 line.long 0x00 "SMSTPCR7,Realtime Module Stop Register 7" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST719 ,SCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST718 ,SCIF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Control" "Not stopped,Stopped" group.long 0x990++0xF line.long 0x00 "SMSTPCR8,Realtime Module Stop Register 8" bitfld.long 0x00 28. " MSTPST828 ,IMR-LSX3 2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST827 ,IMR-LSX3 3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST826 ,IMR-LSX3 4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST825 ,IMR-LSX3 5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX3 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX3 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IIMR-LX3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST807 ,RGP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST805 ,VIN4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST804 ,VIN5 Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 27. " MSTPST927 ,I2C4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST925 ,I2C5 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST921 ,GPIO8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 19. " MSTPST919 ,GPIO9 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,CAN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST915 ,CAN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 14. " MSTPST914 ,GPIO10 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 13. " MSTPST913 ,GPIO11 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 5. " MSTPST905 ,GPIO6 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 4. " MSTPST904 ,GPIO7 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" line.long 0x08 "SMSTPCR10,Realtime Module Stop Register 10" bitfld.long 0x08 12. " MSTPST1012 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST1011 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST1005 ,SSI (ALL) Stop Control" "Not stopped,Stopped" line.long 0xC "SMSTPCR11,Realtime Module Stop Register 11" bitfld.long 0x0C 3. " MSTP1103 ,CRC Stop Control" "Not stopped,Stopped" tree.end tree "Software Reset and Clear Reset Registers" group.long 0xA0++0x3 line.long 0x00 "SRCR0,Software Reset Register 0" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST022_set/clr ,INTC-RT Software Reset" "No reset,Reset" setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST000_set/clr ,MSIOF0 Software Reset" "No reset,Reset" group.long 0xA8++0x3 line.long 0x00 "SRCR1,Software Reset Register 1" setclrfld.long 0x00 31. 0x00 31. 0x8A0 31. " SRTST131_set/clr ,VSP1 (SY) Software Reset" "No reset,Reset" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST128_set/clr ,VSP1DU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 27. 0x00 27. 0x8A0 27. " SRTST127_set/clr ,VSP1DU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 25. 0x00 25. 0x8A0 25. " SRTST125_set/clr ,TMU0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST124_set/clr ,CMT0 Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST122_set/clr ,TMU2 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST121_set/clr ,TMU3 Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST119_set/clr ,ROT0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST118_set/clr ,ROT1 Software Reset" "No reset,Reset" setclrfld.long 0x00 17. 0x00 17. 0x8A0 17. " SRTST117_set/clr ,ROT2 Software Reset" "No reset,Reset" setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST116_set/clr ,ROT3 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST115_set/clr ,ROT4 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 12. 0x00 12. 0x8A0 12. " SRTST112_set/clr ,3DG Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x8A0 11. " SRTST111_set/clr ,TMU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST106_set/clr ,JPU Software Reset" "No reset,Reset" setclrfld.long 0x00 5. 0x00 5. 0x8A0 5. " SRTST105_set/clr ,STBE Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST104_set/clr ,STB0 Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST103_set/clr ,STB1 top Control" "No reset,Reset" setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST102_set/clr ,STB2 Software Reset" "No reset,Reset" setclrfld.long 0x00 1. 0x00 1. 0x8A0 1. " SRTST101_set/clr ,STB3 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST100_set/clr ,STB4 Software Reset" "No reset,Reset" group.long 0xB0++0x3 line.long 0x00 "SRCR2,Software Reset Register 2" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST228_set/clr ,Crypto Engine (Secure) Software Reset" "No reset,Reset" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST223_set/clr ,RDR Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST219_set/clr ,SYS-DMAC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST218_set/clr ,SYS-DMAC1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST215_set/clr ,DRC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 14. 0x00 14. 0x8A0 14. " SRTST214_set/clr ,DRC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 13. 0x00 13. 0x8A0 13. " SRTST213_set/clr ,MFIS Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST208_set/clr ,MSIOF1 Software Reset" "No reset,Reset" group.long 0xB8++0x7 line.long 0x00 "SRCR3,Software Reset Register 3" setclrfld.long 0x00 29. 0x00 29. 0x8A0 29. " SRTST329_set/clr ,CMT1 Software Reset" "No reset,Reset" setclrfld.long 0x00 14. 0x00 14. 0x8A0 14. " SRTST314_set/clr ,SDHI0 Software Reset" "No reset,Reset" setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST304_set/clr ,TPU0 Software Reset" "No reset,Reset" line.long 0x04 "SRCR4,Software Reset Register 4" setclrfld.long 0x04 31. 0x04 31. 0x8A4 31. " SRTST431_set/clr ,Secure up-Time Clock Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x8A4 8. " SRTST408_set/clr ,INTC-SYS Software Reset" "No reset,Reset" setclrfld.long 0x04 7. 0x04 7. 0x8A4 7. " SRTST407_set/clr ,IRQC Software Reset" "No reset,Reset" setclrfld.long 0x04 2. 0x04 2. 0x8A4 2. " SRTST402_set/clr ,RWDT Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 1. 0x04 1. 0x8A4 1. " SRTST401_set/clr ,Secure WDT Software Reset" "No reset,Reset" setclrfld.long 0x04 0. 0x04 0. 0x8A4 0. " SRTST400_set/clr ,Secure Timer (SCMT) Software Reset" "No reset,Reset" group.long 0xC4++0x3 line.long 0x00 "SRCR5,Software Reset Register 5" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST523_set/clr ,PWM Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST522_set/clr ,Thermal Sensor Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST508_set/clr ,SCUW Software Reset" "No reset,Reset" setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST502_set/clr ,MPDMAC0 Software Reset" "No reset,Reset" group.long 0x1CC++0x3 line.long 0x00 "SRCR7,Software Reset Register 7" setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST724_set/clr ,DU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST723_set/clr ,DU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST721_set/clr ,SCIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 20. 0x00 20. 0x8A0 20. " SRTST720_set/clr ,SCIF1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST719_set/clr ,SCIF2 Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST718_set/clr ,SCIF3 Software Reset" "No reset,Reset" setclrfld.long 0x00 17. 0x00 17. 0x8A0 17. " SRTST717_set/clr ,HSCIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST716_set/clr ,HSCIF1 Software Reset" "No reset,Reset" group.long 0x920++0xF line.long 0x00 "SRCR8,Software Reset Register 8" setclrfld.long 0x00 30. 0x00 30. 0x40 30. " SRTST830_set/clr ,DCU Software Reset" "No reset,Reset" setclrfld.long 0x00 28. 0x00 28. 0x40 28. " SRTST828_set/clr ,IMR-LSX3 2 Software Reset" "No reset,Reset" setclrfld.long 0x00 27. 0x00 27. 0x40 27. " SRTST827_set/clr ,IMR-LSX3 3 Software Reset" "No reset,Reset" setclrfld.long 0x00 26. 0x00 26. 0x40 26. " SRTST826_set/clr ,IMR-LSX3 4 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 25. 0x00 25. 0x40 25. " SRTST825_set/clr ,IMR-LSX3 5 Software Reset" "No reset,Reset" setclrfld.long 0x00 24. 0x00 24. 0x40 24. " SRTST824_set/clr ,IMP-X4 Software Reset" "No reset,Reset" setclrfld.long 0x00 23. 0x00 23. 0x40 23. " SRTST823_set/clr ,IMR-LSX3 0 Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x40 22. " SRTST822_set/clr ,IMR-LSX3 1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 21. 0x00 21. 0x40 21. " SRTST821_set/clr ,IIMR-LX3 Software Reset" "No reset,Reset" setclrfld.long 0x00 12. 0x00 12. 0x40 12. " SRTST812_set/clr ,EtherAVB Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x40 11. " SRTST811_set/clr ,VIN0 Software Reset" "No reset,Reset" setclrfld.long 0x00 10. 0x00 10. 0x40 10. " SRTST810_set/clr ,VIN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 9. 0x00 9. 0x40 9. " SRTST809_set/clr ,VIN2 Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x40 8. " SRTST808_set/clr ,VIN3 Software Reset" "No reset,Reset" setclrfld.long 0x00 7. 0x00 7. 0x40 7. " SRTST807_set/clr ,RGP2 Software Reset" "No reset,Reset" setclrfld.long 0x00 5. 0x00 5. 0x40 5. " SRTST805_set/clr ,VIN4 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x40 4. " SRTST804_set/clr ,VIN5 Software Reset" "No reset,Reset" line.long 0x04 "SRCR9,Software Reset Register 9" setclrfld.long 0x04 31. 0x04 31. 0x44 31. " SRTST931_set/clr ,I2C0 Software Reset" "No reset,Reset" setclrfld.long 0x04 30. 0x04 30. 0x44 30. " SRTST930_set/clr ,I2C1 Software Reset" "No reset,Reset" setclrfld.long 0x04 29. 0x04 29. 0x44 29. " SRTST929_set/clr ,I2C2 Software Reset" "No reset,Reset" setclrfld.long 0x04 28. 0x04 28. 0x44 28. " SRTST928_set/clr ,I2C3 Software Reset" "No reset,Reset" setclrfld.long 0x04 27. 0x04 27. 0x44 27. " SRTST927_set/clr ,I2C4 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 26. 0x04 26. 0x44 26. " SRTST926_set/clr ,IICDVFS Software Reset" "No reset,Reset" setclrfld.long 0x04 25. 0x04 25. 0x44 25. " SRTST925_set/clr ,I2C5 Software Reset" "No reset,Reset" setclrfld.long 0x04 22. 0x04 22. 0x44 22. " SRTST922_set/clr ,ADG Software Reset" "No reset,Reset" setclrfld.long 0x04 21. 0x04 21. 0x44 21. " SRTST921_set/clr ,GPIO8 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 19. 0x04 19. 0x44 19. " SRTST919_set/clr ,GPIO9 Software Reset" "No reset,Reset" setclrfld.long 0x04 17. 0x04 17. 0x44 17. " SRTST917_set/clr ,QSPI Software Reset" "No reset,Reset" setclrfld.long 0x04 16. 0x04 16. 0x44 16. " SRTST916_set/clr ,CAN0 Software Reset" "No reset,Reset" setclrfld.long 0x04 15. 0x04 15. 0x44 15. " SRTST915_set/clr ,CAN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 14. 0x04 14. 0x44 14. " SRTST914_set/clr ,GPIO10 Software Reset" "No reset,Reset" setclrfld.long 0x04 13. 0x04 13. 0x44 13. " SRTST913_set/clr ,GPIO11 Software Reset" "No reset,Reset" setclrfld.long 0x04 12. 0x04 12. 0x44 12. " SRTST912_set/clr ,GPIO0 Software Reset" "No reset,Reset" setclrfld.long 0x04 11. 0x04 11. 0x44 11. " SRTST911_set/clr ,GPIO1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 10. 0x04 10. 0x44 10. " SRTST910_set/clr ,GPIO2 Software Reset" "No reset,Reset" setclrfld.long 0x04 9. 0x04 9. 0x44 9. " SRTST909_set/clr ,GPIO3 Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x44 8. " SRTST908_set/clr ,GPIO4 Software Reset" "No reset,Reset" setclrfld.long 0x04 7. 0x04 7. 0x44 7. " SRTST907_set/clr ,GPIO5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 5. 0x04 5. 0x44 5. " SRTST905_set/clr ,GPIO6 Software Reset" "No reset,Reset" setclrfld.long 0x04 4. 0x04 4. 0x44 4. " SRTST904_set/clr ,GPIO7 Software Reset" "No reset,Reset" setclrfld.long 0x04 1. 0x04 1. 0x44 1. " SRTST901_set/clr ,Gyro ADC IF Software Reset" "No reset,Reset" line.long 0x08 "SRCR10,Software Reset Register 10" setclrfld.long 0x08 12. 0x08 12. 0x48 12. " SRTST1012_set/clr ,SSI3 Software Reset" "No reset,Reset" setclrfld.long 0x08 11. 0x08 11. 0x48 11. " SRTST1011_set/clr ,SSI4 Software Reset" "No reset,Reset" setclrfld.long 0x08 5. 0x08 5. 0x48 5. " SRTST1005_set/clr ,SSI (ALL) Software Reset" "No reset,Reset" line.long 0x0C "SRCR11,Software Reset Register 11" setclrfld.long 0x0C 3. 0x08 3. 0x48 3. " SRTST1003_set/clr ,CRC Software Reset" "No reset,Reset" tree.end width 0xB tree.end tree "APMU (Advanced Power Management Unit for AP-System Core" base ad:0xE6152000 width 9. group.long 0x100++0x3 line.long 0x00 "CPU0CR,CPU0Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x110++0x3 line.long 0x00 "CPU1CR,CPU1Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x184++0x3 line.long 0x00 "CPUCMCR,Common Power Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "Normal,L2 shutdown" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2 shutdown," else bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "L2dormant,Normal" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2dormant," endif group.long 0x10++0x3 line.long 0x00 "WUPCR,CPU Wake Up Control Register" bitfld.long 0x00 1. " CPU1WUP ,CPU1 wake up bit" "No wake up,Wake up" bitfld.long 0x00 0. " CPU0WUP ,CPU0 wake up bit" "No wake up,Wake up" rgroup.long 0x40++0x3 line.long 0x00 "PSTR,Power Status Register" bitfld.long 0x00 4.--5. " CPU1ST ,CPU1 status bit" "Run,,,CoreStandby" bitfld.long 0x00 0.--1. " CPU0ST ,CPU0 status bit" "Run,,,CoreStandby" textline "" sif cpu()=="RCARM2" group.long 0x80++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" group.long 0x1E0++0x03 line.long 0x00 "RBCR,Runtime Test Control Register" bitfld.long 0x00 15. " SCUIMSK ,SCUIMSK" "0,1" bitfld.long 0x00 8. " CPURMSK ,CPURMSK" "0,1" bitfld.long 0x00 3. " CPU3IMSK ,CPU3IMSK" "0,1" textline " " bitfld.long 0x00 2. " CPU2IMSK ,CPU2IMSK" "0,1" bitfld.long 0x00 1. " CPU1IMSK ,CPU1IMSK" "0,1" bitfld.long 0x00 0. " CPU0IMSK ,CPU0IMSK" "0,1" endif width 0x0B tree.end tree "RST (Reset)" base ad:0xE6160010 width 12. rgroup.long 0x50++0x3 line.long 0x0 "MODEMR,Mode monitoring register" bitfld.long 0x0 30. " MDT1 ,The value of MDT1" "0,1" bitfld.long 0x0 29. " MDT0 ,The value of MDT0" "0,1" bitfld.long 0x0 21. " MD21 ,The value of MD21" "0,1" bitfld.long 0x0 20. " MD20 ,The value of MD20" "0,1" bitfld.long 0x0 19. " MD19 ,The value of MD19" "0,1" bitfld.long 0x0 16. " MD16 ,The value of MD16" "0,1" bitfld.long 0x0 14. " MD14 ,The value of MD14" "0,1" textline " " bitfld.long 0x0 13. " MD13 ,The value of MD13" "0,1" bitfld.long 0x0 12. " MD12 ,The value of MD12" "0,1" bitfld.long 0x0 11. " MD11 ,The value of MD11" "0,1" bitfld.long 0x0 10. " MD10 ,The value of MD10" "0,1" bitfld.long 0x0 9. " MD9 ,The value of MD9" "0,1" bitfld.long 0x0 8. " MD8 ,The value of MD8" "0,1" bitfld.long 0x0 7. " MD7 ,The value of MD7" "0,1" bitfld.long 0x0 6. " MD6 ,The value of MD6" "0,1" bitfld.long 0x0 5. " MD5 ,The value of MD5" "0,1" bitfld.long 0x0 4. " MD4 ,The value of MD4" "0,1" bitfld.long 0x0 3. " MD3 ,The value of MD3" "0,1" bitfld.long 0x0 2. " MD2 ,The value of MD2" "0,1" textline " " bitfld.long 0x0 1. " MD1 ,The value of MD1" "0,1" bitfld.long 0x0 0. " MD0 ,The value of MD0" "0,1" textline "" group.long 0x30++0x3 line.long 0x0 "CA15RESCNT,CA15 reset control register" hexmask.long.word 0x0 16.--31. 1. " CODEVAL ,Code value" bitfld.long 0x0 3. " CA15CPU0R ,Issue reset to CA15-CPU0" "No reset,Reset" bitfld.long 0x0 2. " CA15CPU1R ,Issue reset to CA15-CPU1" "No reset,Reset" group.long 0x44++0x7 line.long 0x0 "WDTRSTCR,Watchdog timer reset control register" hexmask.long.word 0x0 16.--31. 1. " CODEVAL ,Code value" bitfld.long 0x0 1. " SWDTRSTMSK ,Secure-WDT Reset Mask" "Not masked,Masked" bitfld.long 0x0 0. " RWDTRSTMSK ,RWDT Reset Mask" "Not masked,Masked" line.long 0x4 "RSTOUTCR,PRESETOUT control register" bitfld.long 0x4 0. " RESOUT ,PRESETOUT# control by software" "Asserted,Negated" group.long 0x0++0x7 line.long 0x0 "SBAR,SYS boot address register" line.long 0x4 "SBAR2,SYS boot address register 2" group.long 0x10++0x7 line.long 0x0 "CA15BAR,CA15 boot address register" hexmask.long.tbyte 0x0 10.--31. 0x4 " SBAR[39:18] ,System CPU (CA15) Boot Address" bitfld.long 0x0 4. " BAREN ,BAREN bit" "Not valid,Valid" bitfld.long 0x0 0.--1. " BTMD[1:0] ,Specifies the Boot area of System CPU" "SBAR[39:18],,Memory,?..." line.long 0x4 "CA15BAR2,CA15 boot address register 2" hexmask.long.tbyte 0x4 10.--31. 0x4 " SBAR1[39:18] ,System CPU (CA15) Boot Address 2" bitfld.long 0x4 4. " BAREN ,BAREN bit" "Not valid,Valid" bitfld.long 0x4 0. " VLD ,VALID bit" "SBAR,SBAR2" width 0x0b tree.end tree.open "INTC-SYS (Interrupt Controller for AP-System Core)" base ad:0xE61C0000 width 14. tree "IRQC Event Detector Register Configuration" rgroup.long 0x0++0x3 line.long 0x00 "INTREQ_STS0,Interrupt Request Status Register 0" bitfld.long 0x00 3. " INTREQ3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ0 ,Interrupt status 0" "Not requested,Requested" group.long (0x0+0x04)++0x3 line.long 0x00 "INTEN_STS0,Interrupt Enable Status Register 0" eventfld.long 0x00 3. " INTEN3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x0+0x08)++0x3 line.long 0x00 "INTEN_SET,0,Interrupt Enable Set Register 0" bitfld.long 0x00 3. " INTENS3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS0 ,Interrupt enable set 0" "No effect,Enabled" rgroup.long 0x10++0x3 line.long 0x00 "INTREQ_STS1,Interrupt Request Status Register 1" bitfld.long 0x00 3. " INTREQ3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ0 ,Interrupt status 0" "Not requested,Requested" group.long (0x10+0x04)++0x3 line.long 0x00 "INTEN_STS1,Interrupt Enable Status Register 1" eventfld.long 0x00 3. " INTEN3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x10+0x08)++0x3 line.long 0x00 "INTEN_SET,1,Interrupt Enable Set Register 1" bitfld.long 0x00 3. " INTENS3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS0 ,Interrupt enable set 0" "No effect,Enabled" rgroup.long 0x120++0x3 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 3. " CHTEN3 ,Noise reduction enable status 3" "Disabled,Enabled" bitfld.long 0x00 2. " CHTEN2 ,Noise reduction enable status 2" "Disabled,Enabled" bitfld.long 0x00 1. " CHTEN1 ,Noise reduction enable status 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CHTEN0 ,Noise reduction enable status 0" "Disabled,Enabled" textline "" sif cpu()=="R8A7792X" group.long 0x100++0x3 line.long 0x0 "DETECT_STATUS,IRQC Detect Status Register" eventfld.long 0x0 3. " IRQCDET[3] ,IRQC Event Detection Status bit 3" "Not occurred,Occurred" eventfld.long 0x0 2. " [2] ,IRQC Event Detection Status bit 2" "Not occurred,Occurred" eventfld.long 0x0 1. " [1] ,IRQC Event Detection Status bit 1" "Not occurred,Occurred" eventfld.long 0x0 0. " [0] ,IRQC Event Detection Status bit 0" "Not occurred,Occurred" rgroup.long 0x104++0x3 line.long 0x0 "MONITOR,IRQC Signal Level Monitor Register" bitfld.long 0x0 3. " IRQCMON[3] ,IRQC External Signal Level Monitor bit 3" "Low,High" bitfld.long 0x0 2. " [2] ,IRQC External Signal Level Monitor bit 2" "Low,High" bitfld.long 0x0 1. " [1] ,IRQC External Signal Level Monitor bit 1" "Low,High" bitfld.long 0x0 0. " [0] ,IRQC External Signal Level Monitor bit 0" "Low,High" endif textline "" rgroup.long 0x108++0x17 line.long 0x00 "HLVL_STS,IRQ High Level Detect Status Register" bitfld.long 0x00 3. " IRQHSTS3 ,IRQ High level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x00 2. " IRQHSTS2 ,IRQ High level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x00 1. " IRQHSTS1 ,IRQ High level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " IRQHSTS0 ,IRQ High level interrupt status 0" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,IRQ Low Level Detect Status Register" bitfld.long 0x04 3. " IRQLSTS3 ,IRQ Low level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x04 2. " IRQLSTS2 ,IRQ Low level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x04 1. " IRQLSTS1 ,IRQ Low level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " IRQLSTS0 ,IRQ Low level interrupt status 0" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,IRQ Sync Rising Edge Detect Status Register" bitfld.long 0x08 3. " IRQSRSTS3 ,IRQ Synchronous Rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x08 2. " IRQSRSTS2 ,IRQ Synchronous Rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x08 1. " IRQSRSTS1 ,IRQ Synchronous Rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x08 0. " IRQSRSTS0 ,IRQ Synchronous Rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,IRQ Sync Falling Edge Detect Status Register" bitfld.long 0x0C 3. " IRQSFSTS3 ,IRQ Synchronous Fall edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x0C 2. " IRQSFSTS2 ,IRQ Synchronous Fall edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x0C 1. " IRQSFSTS1 ,IRQ Synchronous Fall edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x0C 0. " IRQSFSTS0 ,IRQ Synchronous Fall edge interrupt status 0" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,IRQ Async Rising Edge DetectStatus Register" bitfld.long 0x10 3. " IRQARSTS3 ,IRQ Asynchronous Rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x10 2. " IRQARSTS2 ,IRQ Asynchronous Rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x10 1. " IRQARSTS1 ,IRQ Asynchronous Rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x10 0. " IRQARSTS0 ,IRQ Asynchronous Rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,IRQ AsyncFallingEdge Detect Status Register" bitfld.long 0x14 3. " IRQAFSTS3 ,IRQ AsyncFallingEdge DetectStatus Register 3" "Not occurred,Occurred" bitfld.long 0x14 2. " IRQAFSTS2 ,IRQ AsyncFallingEdge DetectStatus Register 2" "Not occurred,Occurred" bitfld.long 0x14 1. " IRQAFSTS1 ,IRQ AsyncFallingEdge DetectStatus Register 1" "Not occurred,Occurred" textline " " bitfld.long 0x14 0. " IRQAFSTS0 ,IRQ AsyncFallingEdge DetectStatus Register 0" "Not occurred,Occurred" sif cpuis("R8A77940") group.long 0x180++0x03 line.long 0x00 "CONFIG_00,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x180++0x03 line.long 0x00 "CONFIG_00,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif sif cpuis("R8A77940") group.long 0x184++0x03 line.long 0x00 "CONFIG_01,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x184++0x03 line.long 0x00 "CONFIG_01,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif tree.end tree "NMI Event Detector Register Configuration" sif cpuis("R8A77940")||cpuis("R8A7792X") rgroup.long 0x400++0x3 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long 0x404++0x3 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x408++0x3 line.long 0x00 "NMIEN_SET0,NMI Enable Set Register 0" bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" rgroup.long 0x410++0x3 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long 0x414++0x3 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x418++0x3 line.long 0x00 "NMIEN_SET1,NMI Enable Set Register 1" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" else rgroup.long 0x400++0x3 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 7. " C7STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long (0x400+0x04)++0x3 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 7. " C7IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x400+0x08)++0x3 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU0) Register 0" bitfld.long 0x00 7. " C7SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" rgroup.long 0x410++0x3 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 7. " C7STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long (0x410+0x04)++0x3 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 7. " C7IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x410+0x08)++0x3 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU1) Register 1" bitfld.long 0x00 7. " C7SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" endif rgroup.long 0x520++0x3 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 0. " CHTEN ,Noise reduction enable status" "Disabled,Enabled" group.long 0x540++0x3 line.long 0x00 "DEB_SET,NMI Debounce Setting Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,NMI scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,NMI chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" sif cpuis("R8A77940")||cpuis("R8A77940")||cpuis("R8A7792X") rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" bitfld.long 0x00 8. " NMI8HSTS ,NMI8 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1HSTS ,NMI1 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0HSTS ,NMI0 High level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" bitfld.long 0x04 8. " NMI8LSTS ,NMI8 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1LSTS ,NMI1 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0LSTS ,NMI0 Low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" bitfld.long 0x08 8. " NMI8SRSTS ,NMI8 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1SRSTS ,NMI1 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0SRSTS ,NMI0 Synchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" bitfld.long 0x0C 8. " NMI8SFSTS ,NMI8 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1SFSTS ,NMI1 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0SFSTS ,NMI0 Synchronous Fall edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" bitfld.long 0x10 8. " NMI8ARSTS ,NMI8 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1ARSTS ,NMI1 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0ARSTS ,NMI0 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" bitfld.long 0x14 8. " NMI8AFSTS ,NMI8 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1AFSTS ,NMI1 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0AFSTS ,NMI0 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" else rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" bitfld.long 0x00 8. " NMI8HSTS ,NMI8 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 7. " NMI7HSTS ,NMI7 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 6. " NMI6HSTS ,NMI6 High level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " NMI5HSTS ,NMI5 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 4. " NMI4HSTS ,NMI4 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 3. " NMI3HSTS ,NMI3 High level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " NMI2HSTS ,NMI2 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1HSTS ,NMI1 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0HSTS ,NMI0 High level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" bitfld.long 0x04 8. " NMI8LSTS ,NMI8 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 7. " NMI7LSTS ,NMI7 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 6. " NMI6LSTS ,NMI6 Low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 5. " NMI5LSTS ,NMI5 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 4. " NMI4LSTS ,NMI4 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 3. " NMI3LSTS ,NMI3 Low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 2. " NMI2LSTS ,NMI2 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1LSTS ,NMI1 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0LSTS ,NMI0 Low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" bitfld.long 0x08 8. " NMI8SRSTS ,NMI8 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 7. " NMI7SRSTS ,NMI7 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 6. " NMI6SRSTS ,NMI6 Synchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 5. " NMI5SRSTS ,NMI5 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 4. " NMI4SRSTS ,NMI4 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 3. " NMI3SRSTS ,NMI3 Synchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 2. " NMI2SRSTS ,NMI2 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1SRSTS ,NMI1 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0SRSTS ,NMI0 Synchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" bitfld.long 0x0C 8. " NMI8SFSTS ,NMI8 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 7. " NMI7SFSTS ,NMI7 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 6. " NMI6SFSTS ,NMI6 Synchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 5. " NMI5SFSTS ,NMI5 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 4. " NMI4SFSTS ,NMI4 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 3. " NMI3SFSTS ,NMI3 Synchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 2. " NMI2SFSTS ,NMI2 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1SFSTS ,NMI1 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0SFSTS ,NMI0 Synchronous Fall edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" bitfld.long 0x10 8. " NMI8ARSTS ,NMI8 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 7. " NMI7ARSTS ,NMI7 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 6. " NMI6ARSTS ,NMI6 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 5. " NMI5ARSTS ,NMI5 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 4. " NMI4ARSTS ,NMI4 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 3. " NMI3ARSTS ,NMI3 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 2. " NMI2ARSTS ,NMI2 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1ARSTS ,NMI1 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0ARSTS ,NMI0 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" bitfld.long 0x14 8. " NMI8AFSTS ,NMI8 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 7. " NMI7AFSTS ,NMI7 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 6. " NMI6AFSTS ,NMI6 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 5. " NMI5AFSTS ,NMI5 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 4. " NMI4AFSTS ,NMI4 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 3. " NMI3AFSTS ,NMI3 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 2. " NMI2AFSTS ,NMI2 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1AFSTS ,NMI1 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0AFSTS ,NMI0 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" endif sif cpuis("R8A77940")||cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x580++0x07 line.long 0x00 "CONFIG0_NMI,NMI Configuration 0 Register" bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x04 "CONFIG1_NMI,NMI Configuration 1 Register" bitfld.long 0x04 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." group.long 0x5A0++0x03 line.long 0x00 "CONFIG8_NMI,NMI Configuration 8 Register" bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." else group.long 0x400++0x23 line.long 0x0 "CONFIG0_NMI,NMI Configuration 0 Register" bitfld.long 0x0 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x4 "CONFIG1_NMI,NMI Configuration 1 Register" bitfld.long 0x4 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x8 "CONFIG2_NMI,NMI Configuration 2 Register" bitfld.long 0x8 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0xC "CONFIG3_NMI,NMI Configuration 3 Register" bitfld.long 0xC 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x10 "CONFIG4_NMI,NMI Configuration 4 Register" bitfld.long 0x10 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x14 "CONFIG5_NMI,NMI Configuration 5 Register" bitfld.long 0x14 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x18 "CONFIG6_NMI,NMI Configuration 6 Register" bitfld.long 0x18 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x1C "CONFIG7_NMI,NMI Configuration 7 Register" bitfld.long 0x1C 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x20 "CONFIG8_NMI,NMI Configuration 8 Register" bitfld.long 0x20 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." endif tree.end tree "NMI Lock Register Configuration" group.long 0xA00++0xB line.long 0x00 "NMI_LCK,NMI Mask Lock Set Register" line.long 0x04 "NMI_LCKCODE,NMI Lock Code Register" line.long 0x08 "NMI_DBG,NMI Debug Control Enable Register" bitfld.long 0x08 0. " DBGEN ,NMI mask lock feature debug enable" "Disabled,Enabled" group.long 0xB08++0x3 line.long 0x00 "NMI_DBGCODE,NMI Debug Code Register" tree.end width 0xB tree.end tree "MFIS (Multifunctional Interface)" base ad:0xE6260000 width 16. group.long 0xC0++0x7 line.long 0x00 "MFISLCKR0,MFIS Lock Register 0" bitfld.long 0x00 0. " LCK ,Mutex Control (Shared Resource State)" "Not acquired/Release,Acquired" line.long 0x04 "MFISLCKR1,MFIS Lock Register 1" bitfld.long 0x04 0. " LCK ,Mutex Control" "Not acquired/Release,Acquired" textline "" group.long 0x220++0x7 line.long 0x0 "DBSERRMSKR,DRAM Error Enable Register" hexmask.long.word 0x0 16.--31. 1. " KEYCODE ,Key Code" bitfld.long 0x0 0. " EN ,Error Detection Enable" "Disabled,Enabled" line.long 0x4 "DBSERRSTSR,DRAM Error Status Register" eventfld.long 0x4 2. " FSTS ,DRAM Fatal Error Detection Status" "No error,Error" eventfld.long 0x4 1. " NFSTS ,DRAM Non-fatal Detection Status" "No error,Error" eventfld.long 0x4 0. " STS ,DRAM Parity Error Detection Status" "No error,Error" group.long 0x240++0x7 line.long 0x0 "BUSPERRMSKR,Bus Parity Error Enable Register" hexmask.long.word 0x0 0.--15. 1. " KEYCODE ,Key Code" bitfld.long 0x0 0. " EN ,Error Detection Enable" "Disabled,Enabled" line.long 0x4 "BUSPERRSTSR,Bus Parity Error Status Register" eventfld.long 0x4 0. " STS ,Error Detection Status" "No error,Error" textline "" group.long 0x280++0x7 line.long 0x0 "ARML1ERRMSKR,ARM L1 RAM Error Enable Register" hexmask.long.word 0x0 16.--31. 1. " KEYCODE ,Key Code" textline " " bitfld.long 0x0 13. " ENCPU1[5] ,Error Detection Enable (L1I-tag)" "Disabled,Enabled" bitfld.long 0x0 12. " [4] ,Error Detection Enable (L1I-data)" "Disabled,Enabled" bitfld.long 0x0 11. " [3] ,Error Detection Enable (L1I-BTB)" "Disabled,Enabled" bitfld.long 0x0 10. " [2] ,Error Detection Enable (L1D-tag)" "Disabled,Enabled" bitfld.long 0x0 9. " [1] ,Error Detection Enable (L1D-data)" "Disabled,Enabled" bitfld.long 0x0 8. " [0] ,Error Detection Enable (L2 TLB)" "Disabled,Enabled" textline " " bitfld.long 0x0 5. " ENCPU0[5] ,Error Detection Enable (L1I-tag)" "Disabled,Enabled" bitfld.long 0x0 4. " [4] ,Error Detection Enable (L1I-data)" "Disabled,Enabled" bitfld.long 0x0 3. " [3] ,Error Detection Enable (L1I-BTB)" "Disabled,Enabled" bitfld.long 0x0 2. " [2] ,Error Detection Enable (L1D-tag)" "Disabled,Enabled" bitfld.long 0x0 1. " [1] ,Error Detection Enable (L1D-data)" "Disabled,Enabled" bitfld.long 0x0 0. " [0] ,Error Detection Enable (L2 TLB)" "Disabled,Enabled" line.long 0x4 "ARML1ERRSTSR,ARM L1 RAM Error Status Register" eventfld.long 0x4 13. " STSPU1[5] ,Error Detection Status (L1I-tag)" "Disabled,Enabled" eventfld.long 0x4 12. " [4] ,Error Detection Status (L1I-data)" "Not detected,Detected" eventfld.long 0x4 11. " [3] ,Error Detection Status (L1I-BTB)" "Not detected,Detected" eventfld.long 0x4 10. " [2] ,Error Detection Status (L1D-tag)" "Not detected,Detected" eventfld.long 0x4 9. " [1] ,Error Detection Status (L1D-data)" "Not detected,Detected" eventfld.long 0x4 8. " [0] ,Error Detection Status (L2 TLB)" "Not detected,Detected" textline " " eventfld.long 0x4 5. " STSPU0[5] ,Error Detection Status (L1I-tag)" "Not detected,Detected" eventfld.long 0x4 4. " [4] ,Error Detection Status (L1I-data)" "Not detected,Detected" eventfld.long 0x4 3. " [3] ,Error Detection Status (L1I-BTB)" "Not detected,Detected" eventfld.long 0x4 2. " [2] ,Error Detection Status (L1D-tag)" "Not detected,Detected" eventfld.long 0x4 1. " [1] ,Error Detection Status (L1D-data)" "Not detected,Detected" eventfld.long 0x4 0. " [0] ,Error Detection Status (L2 TLB)" "Not detected,Detected" textline "" group.long 0x290++0x3 line.long 0x0 "ARML1ERRINF00R,ARM L1 RAM Error Information 0 Register" bitfld.long 0x0 31. " VALID ,Error Valid" "Not valid,Valid" hexmask.long.byte 0x0 24.--30. 1. " RAMID ,Set Error RAMID" bitfld.long 0x0 18.--22. " BANK/WAY ,Set L1 RAM Error Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x0 0.--17. 1. " INDEX ,Set L1 RAM Error Index" group.long (0x290+0x4)++0x3 line.long 0x0 "ARML1ERRINF00R,ARM L1 RAM Error Information 1 Register" bitfld.long 0x0 31. " FATAL ,Fatal Error Detect" "Not detected,Detected" hexmask.long.byte 0x0 8.--15. 1. " OERRCNT ,Other Error Count" hexmask.long.byte 0x0 0.--7. 1. " RPTERRCNT ,Repeat Error Count" group.long 0x298++0x3 line.long 0x0 "ARML1ERRINF01R,ARM L1 RAM Error Information 0 Register" bitfld.long 0x0 31. " VALID ,Error Valid" "Not valid,Valid" hexmask.long.byte 0x0 24.--30. 1. " RAMID ,Set Error RAMID" bitfld.long 0x0 18.--22. " BANK/WAY ,Set L1 RAM Error Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x0 0.--17. 1. " INDEX ,Set L1 RAM Error Index" group.long (0x298+0x4)++0x3 line.long 0x0 "ARML1ERRINF01R,ARM L1 RAM Error Information 1 Register" bitfld.long 0x0 31. " FATAL ,Fatal Error Detect" "Not detected,Detected" hexmask.long.byte 0x0 8.--15. 1. " OERRCNT ,Other Error Count" hexmask.long.byte 0x0 0.--7. 1. " RPTERRCNT ,Repeat Error Count" textline "" group.long 0x2A0++0x7 line.long 0x0 "ARML2ERRMSKR,ARM L2 RAM Error Enable Register" hexmask.long.word 0x0 16.--31. 1. " KEYCODE ,Key Code" textline " " bitfld.long 0x0 11. " ENCPU1[3] ,Error Detection Enable (L2-tag)" "Disabled,Enabled" bitfld.long 0x0 10. " [2] ,Error Detection Enable (L2-data)" "Disabled,Enabled" bitfld.long 0x0 9. " [1] ,Error Detection Enable (L2-snoop)" "Disabled,Enabled" bitfld.long 0x0 9. " [0] ,Error Detection Enable (L2-dirty)" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " ENCPU0[3] ,Error Detection Enable (L2-tag)" "Disabled,Enabled" bitfld.long 0x0 2. " [2] ,Error Detection Enable (L2-data)" "Disabled,Enabled" bitfld.long 0x0 1. " [1] ,Error Detection Enable (L2-snoop)" "Disabled,Enabled" bitfld.long 0x0 0. " [0] ,Error Detection Enable (L2-dirty)" "Disabled,Enabled" line.long 0x4 "ARML2ERRSTSR,ARM L2 RAM Error Status Register" bitfld.long 0x4 11. " STSPU1[3] ,Error Detection Status (L2-tag)" "Not detected,Detected" bitfld.long 0x4 10. " [2] ,Error Detection Status (L2-data)" "Not detected,Detected" bitfld.long 0x4 9. " [1] ,Error Detection Status (L2-snoop)" "Not detected,Detected" bitfld.long 0x4 9. " [0] ,Error Detection Status (L2-dirty)" "Not detected,Detected" textline " " bitfld.long 0x4 3. " STSPU0[3] ,Error Detection Status (L2-tag)" "Not detected,Detected" bitfld.long 0x4 2. " [2] ,Error Detection Status (L2-data)" "Not detected,Detected" bitfld.long 0x4 1. " [1] ,Error Detection Status (L2-snoop)" "Not detected,Detected" bitfld.long 0x4 0. " [0] ,Error Detection Status (L2-dirty)" "Not detected,Detected" textline "" group.long 0x2B0++0x3 line.long 0x0 "ARML2ERRINF00R,ARM L2 RAM Error Information 0 Register" bitfld.long 0x0 31. " VALID ,Error Valid" "Not valid,Valid" hexmask.long.byte 0x0 24.--30. 1. " RAMID ,Set Error RAMID" bitfld.long 0x0 18.--21. " BANK/WAY ,Set L1 RAM Error Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x0 0.--17. 1. " INDEX ,Set L1 RAM Error Index" group.long (0x2B0-0x4)++0x3 line.long 0x0 "ARML2ERRINF10R,ARM L2 RAM Error Information 1 Register" bitfld.long 0x0 31. " FATAL ,Fatal Error Detect" "Not detected,Detected" hexmask.long.byte 0x0 8.--15. 1. " OERRCNT ,Other Error Count" hexmask.long.byte 0x0 0.--7. 1. " RPTERRCNT ,Repeat Error Count" group.long 0x2A8++0x3 line.long 0x0 "ARML2ERRINF01R,ARM L2 RAM Error Information 0 Register" bitfld.long 0x0 31. " VALID ,Error Valid" "Not valid,Valid" hexmask.long.byte 0x0 24.--30. 1. " RAMID ,Set Error RAMID" bitfld.long 0x0 18.--21. " BANK/WAY ,Set L1 RAM Error Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x0 0.--17. 1. " INDEX ,Set L1 RAM Error Index" group.long (0x2A8-0x4)++0x3 line.long 0x0 "ARML2ERRINF11R,ARM L2 RAM Error Information 1 Register" bitfld.long 0x0 31. " FATAL ,Fatal Error Detect" "Not detected,Detected" hexmask.long.byte 0x0 8.--15. 1. " OERRCNT ,Other Error Count" hexmask.long.byte 0x0 0.--7. 1. " RPTERRCNT ,Repeat Error Count" group.long 0x2c0++0x7 line.long 0x0 "ARML2FATALMSKR,ARM L2 RAM Fatal Error Enable Register" hexmask.long.word 0x0 16.--31. 1. " KEYCODE ,Key Code" bitfld.long 0x0 0. " EN ,Error Detection Enable" "Disabled,Enabled" textline "" line.long 0x4 "ARML2FATALSTSR,ARM L2 RAM Fatal Error Status Register" eventfld.long 0x4 0. " STS ,Error Detection Status" "Not detected,Detected" group.long 0x300++0x7 line.long 0x0 "DBGGPRR,Debug GPR Register" wgroup.long 0x304++0x7 line.long 0x0 "DBGSTERRENR,Debug Set Error Insertion Enable Register" bitfld.long 0x0 0. " SET ,Enable Error Insertion Set" "No effect,Enable" line.long 0x4 "DBGCLERRENR,Debug Clear Error Insertion Enable Register" bitfld.long 0x4 0. " CLR ,Enable Error Insertion Set" "No effect,Disable" group.long 0x30C++0x3 line.long 0x0 "DBGSTSR,Debug Error Insertion Status Register" bitfld.long 0x0 0. " STS ,Error Insertion Enable Status" "No effect,During insertion enable" width 0xB tree.end tree "AXI-BUS" base ad:0xFE960000 width 11. group.long 0x0++0x7 line.long 0x0 "MXSAAR0,MXI SDRAM Address Allocation Register 0" hexmask.long.word 0x0 16.--31. 1. " SADD0 ,Start Address 0 [39:24]" hexmask.long.word 0x0 0.--15. 1. " EADD0 ,End Address 0 [39:24]" line.long 0x4 "MXSAAR1,MXI SDRAM Address Allocation Register 1" hexmask.long.word 0x4 16.--31. 1. " SADD1 ,Start Address 1 [39:24]" hexmask.long.word 0x4 0.--15. 1. " EADD1 ,End Address 1 [39:24]" group.long 0x48++0x3 line.long 0x0 "MXAXIRTCR,AXI Read Transaction Control Register" bitfld.long 0x0 8.--9. " QPUSH ,These bits should be set to 11" ",,,3" group.long 0x50++0x3 line.long 0x0 "MXS3CRTCR,S3C Read Transaction Control Register" bitfld.long 0x0 8.--9. " QPUSH ,These bits should be set to 11" ",,,3" group.long 0x4C++0x3 line.long 0x0 "MXAXIWTCR,AXI Write Transaction Control Register" bitfld.long 0x0 28.--31. " QNUM3 ,hold queue length which the write transactions at QOS level 3 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 24.--27. " QNUM2 ,hold queue length which the write transactions at QOS level 2 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 20.--23. " QNUM1 ,hold queue length which the write transactions at QOS level 1 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 16.--19. " QNUM0 ,hold queue length which the write transactions at QOS level 0 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 8.--9. " QPUSH ,These bits should be set to 11" ",,,3" group.long 0x54++0x3 line.long 0x0 "MXS3CWTCR,S3C Write Transaction Control Register" bitfld.long 0x0 28.--31. " QNUM3 ,hold queue length which the write transactions at QOS level 3 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 24.--27. " QNUM2 ,hold queue length which the write transactions at QOS level 2 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 20.--23. " QNUM1 ,hold queue length which the write transactions at QOS level 1 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 16.--19. " QNUM0 ,hold queue length which the write transactions at QOS level 0 can fill" "1,2,3,4,5,6,7,8,,,,,,,,No limit" bitfld.long 0x0 8.--9. " QPUSH ,These bits should be set to 11" ",,,3" width 0x0b tree.end tree.open "IPMMU" tree "IPMMU-SY0" base ad:0xE6280000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6280000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6280000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6280000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6280000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6280000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6280000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6280000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-SY1" base ad:0xE6290000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6290000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6290000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6290000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6290000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6290000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6290000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6290000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-DS" base ad:0xE6740000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6740000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6740000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6740000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6740000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6740000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6740000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6740000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-MX" base ad:0xFE951000 width 11. tree "MMU Registers" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xFE951000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xFE951000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xFE951000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xFE951000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xFE951000+0x580)&0x1))==0x1) if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xFE951000+0x580)&0x1))==0x1) if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xFE951000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-GP" base ad:0xE62A0000 width 11. tree "MMU Registers" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE62A0000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE62A0000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE62A0000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE62A0000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE62A0000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE62A0000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE62A0000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE62A0000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE62A0000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE62A0000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE62A0000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE62A0000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE62A0000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE62A0000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE62A0000+0x580)&0x1))==0x1) if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE62A0000+0x580)&0x1))==0x1) if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE62A0000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree.end tree "LBSC within Bus Bridge" base ad:0xFEC00200 width 12. group.long 0x200++0x07 line.long 0x00 "CS0CTRL,Area 0 Control Register" sif ((cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77420")||(cpu()=="R8A77470")||(cpu()=="R8A77440")) rbitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " elif (cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*"))||(cpuis("R8A77960*"))||(cpuis("R8A77990*")) rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " else bitfld.long 0x00 15. " ENDIAN ,Endian indication" "Big,Little" bitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" bitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " endif bitfld.long 0x00 0.--1. " CS0IF ,Area 0 interface select" "Standard,Burst ROM,?..." line.long 0x04 "CS1CTRL,Area 1 Control Register" bitfld.long 0x04 4.--5. " CS1SZ ,Area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x04 2. " CS1BRM ,Area 1 byte-control SRAM mode selection" "/CS,/RD" textline " " sif ((cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||cpuis("R8A77960*")||cpuis("R8A77990*")||(cpu()=="R8A77470")) bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") if (((per.l(ad:0xFEC00200+0x200+0x8))&0x3)==0x01) group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS0BRM ,Expansion area 0 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0xC))&0x3)==0x01) group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS1BRM ,Expansion area 1 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x10))&0x3)==0x01) group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS2BRM ,Expansion area 2 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x14))&0x3)==0x01) group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS3BRM ,Expansion area 3 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x18))&0x3)==0x01) group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS4BRM ,Expansion area 4 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x1C))&0x3)==0x01) group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS5BRM ,Expansion area 5 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif endif sif ((cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(cpu()!="R8A77940")&&(cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&(cpu()!="R8A77440")) group.long 0x220++0x03 line.long 0x00 "CS0CTRL2,Area 0 Control 2 Register" hexmask.long.byte 0x00 8.--14. 1. " CS0CP ,Area 0 capacity setting" endif textline " " group.long 0x230++0x07 line.long 0x00 "CSWCR0,Area 0 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x04 "CSWCR1,Area 1 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x04 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") group.long 0x238++0x03 line.long 0x00 "ECSWCR0,Expansion Area 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x23C++0x03 line.long 0x00 "ECSWCR1,Expansion Area 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x240++0x03 line.long 0x00 "ECSWCR2,Expansion Area 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x244++0x03 line.long 0x00 "ECSWCR3,Expansion Area 3 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x248++0x03 line.long 0x00 "ECSWCR4,Expansion Area 4 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x24C++0x03 line.long 0x00 "ECSWCR5,Expansion Area 5 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x0)++0x03 line.long 0x00 "EXDMAWCR0,LBSC-DMAC Channel 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x4)++0x03 line.long 0x00 "EXDMAWCR1,LBSC-DMAC Channel 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x8)++0x03 line.long 0x00 "EXDMAWCR2,LBSC-DMAC Channel 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif textline " " group.long 0x280++0x7 line.long 0x00 "CSPWCR0,Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external Wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2 ,Area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif line.long 0x04 "CSPWCR1,Area 1 External Wait Control Register" bitfld.long 0x04 5. " V ,Area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x04 2. " EXWT2 ,Area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")) group.long (0x288+0x0)++0x03 line.long 0x00 "ECSPWCR0,Expansion Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x4)++0x03 line.long 0x00 "ECSPWCR1,Expansion Area 1 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x8)++0x03 line.long 0x00 "ECSPWCR2,Expansion Area 2 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 2 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 2 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 2 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0xC)++0x03 line.long 0x00 "ECSPWCR3,Expansion Area 3 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 3 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 3 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 3 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x10)++0x03 line.long 0x00 "ECSPWCR4,Expansion Area 4 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 4 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 4 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 4 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x14)++0x03 line.long 0x00 "ECSPWCR5,Expansion Area 5 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 5 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 5 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 5 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif endif group.long 0x2A0++0x03 line.long 0x00 "EXWTSYNC,External Wait Input Control Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")&&(!cpuis("R8A77970*")))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWTSYNC2 ,EX_WAIT[2] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" textline " " bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " endif if (((per.l(ad:0xFEC00200+0x200))&0x03)==0x01) group.long 0x2B0++0x03 line.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" bitfld.long 0x00 11.--13. " A0BST ,Area 0 burst length for burst ROM interface" "No transfer,4,8,16,32,No transfer,No transfer,No transfer" else hgroup.long 0x2B0++0x03 hide.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" endif textline " " group.long 0x2B4++0x03 line.long 0x00 "CS0BTPH,Area 0 Burst Pitch Set Register" bitfld.long 0x00 8. " A0H ,/CS and address hold cycles with respect to the /RD signal for area 0" "0,1" bitfld.long 0x00 4.--7. " A0W ,Burst pitch after the first burst cycle for area 0" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " A0B ,Burst pitch after the second burst cycle for area 0" ",1,2,3,4,5,6,7" group.long 0x2C0++0x3 line.long 0x00 "CS1GDST,Area 1 Guard Set Register" bitfld.long 0x00 4. " CS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Area 1 guard interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))) sif (cpu()!="R8A77470") group.long 0x2C4++0x03 line.long 0x00 "ECS0GDST,Expansion Area 0 Guard Set Register" bitfld.long 0x00 4. " ECS0GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 0 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2C8++0x03 line.long 0x00 "ECS1GDST,Expansion Area 1 Guard Set Register" bitfld.long 0x00 4. " ECS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 1 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2CC++0x03 line.long 0x00 "ECS2GDST,Expansion Area 2 Guard Set Register" bitfld.long 0x00 4. " ECS2GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 2 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D0++0x03 line.long 0x00 "ECS3GDST,Expansion Area 3 Guard Set Register" bitfld.long 0x00 4. " ECS3GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 3 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D4++0x03 line.long 0x00 "ECS4GDST,Expansion Area 4 Guard Set Register" bitfld.long 0x00 4. " ECS4GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 4 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D8++0x03 line.long 0x00 "ECS5GDST,Expansion Area 5 Guard Set Register" bitfld.long 0x00 4. " ECS5GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 5 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x2F0+0x0)++0x03 line.long 0x00 "EXDMASET0,LBSC-DMAC Channel 0 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 0 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 0 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 0 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 0 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 0 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 0 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 0 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 0 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x4)++0x03 line.long 0x00 "EXDMASET1,LBSC-DMAC Channel 1 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 1 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 1 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 1 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 1 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 1 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 1 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 1 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 1 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x8)++0x03 line.long 0x00 "EXDMASET2,LBSC-DMAC Channel 2 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 2 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 2 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 2 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 2 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 2 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 2 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 2 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 2 to area 0 assign" "Not assigned,Assigned" textline " " group.long (0x310+0x0)++0x03 line.long 0x00 "EXDMCR0,LBSC-DMAC Channel 0 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[0] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[0] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[0] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[0] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 0 is assigned" "/CS & DACK[0],/CS,DACK[0],/CS & DACK[0]" group.long (0x310+0x4)++0x03 line.long 0x00 "EXDMCR1,LBSC-DMAC Channel 1 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[1] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[1] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[1] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[1] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 1 is assigned" "/CS & DACK[1],/CS,DACK[1],/CS & DACK[1]" group.long (0x310+0x8)++0x03 line.long 0x00 "EXDMCR2,LBSC-DMAC Channel 2 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[2] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[2] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[2] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[2] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 2 is assigned" "/CS & DACK[2],/CS,DACK[2],/CS & DACK[2]" endif rgroup.long 0x330++0x03 line.long 0x00 "BCINTSR,BSC Interrupt Source Status Register" bitfld.long 0x00 1. " EXWTE ,EX-BUS wait timeout error status" "No error,Error" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTE ,ATA wait timeout error status" "No error,Error" endif wgroup.long 0x334++0x03 line.long 0x00 "BCINTCR,BSC Interrupt Source Clear Register" bitfld.long 0x00 1. " EXWTEC ,EX-BUS wait timeout error status clear" "No effect,Clear" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77440") bitfld.long 0x00 0. " ATTEC ,ATA wait timeout error status clear" "No effect,Clear" endif group.long 0x338++0x03 line.long 0x00 "BCINTMR,BSC Interrupt Enable Register" bitfld.long 0x00 1. " EXWTEM ,EX-BUS wait timeout error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTEM ,ATA wait timeout error interrupt enable" "Disabled,Enabled" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*")) group.long 0x340++0x03 line.long 0x00 "EXBATLV,EX_BUS Priority Level Set Register" bitfld.long 0x00 0. " EX-BLV ,Priority level setting for EX_BUS arbitration (higher/lower)" "PIO/LBSC-DMAC,LBSC-DMAC/PIO" endif textline " " rgroup.long 0x344++0x03 line.long 0x00 "EXWTSTS,External Wait Status Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2STS ,Indicates the EX_WAIT2 pin state" "Low,High" bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " else bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) group.long 0x380++0x03 line.long 0x00 "ATACSCTRL,ATACS Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 6. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 5. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 3. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 2. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 0. " ATACS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" textline " " else bitfld.long 0x00 5. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 3. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 2. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 0. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" endif endif group.long 0x3C0++0x07 line.long 0x00 "EXBCT,EX-BUS Wait Timeout Detection Base Counter Register" hexmask.long.byte 0x00 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection base counter register write key" hexmask.long.tbyte 0x00 0.--19. 1. " EXW_TOBCNT ,EX-BUS wait timeout counter setting" line.long 0x04 "EXTCT,EX-BUS Wait Timeout Detection Counter Register" hexmask.long.byte 0x04 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection counter register write key" bitfld.long 0x04 16. " EXW_TOEN ,EX-BUS wait timeout enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " EXW_TOCNT ,EX-BUS wait timeout counter setting" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from superHyway" "No timeout,Timeout" eventfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" eventfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " eventfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" elif cpuis("R8J7795*")||cpuis("R8A7795*")||cpu()==("R8A77970")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" else group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" bitfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" bitfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" bitfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" endif width 0x0B tree.end tree "DBSC3 (External Bus Controller for DDR3-SDRAM)" base ad:0xE6790000 width 13. group.long 0x10++0x07 line.long 0x00 "DBACEN,SDRAM access enable register" bitfld.long 0x00 0. " ACCEN ,SDRAM Access Enable" "Disabled,Enabled" line.long 0x04 "DBRFEN,Auto-refresh enable register" bitfld.long 0x04 0. " ARFEN ,Auto-Refresh Enable" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "DBCMD,Manual command-issuing register" bitfld.long 0x00 24.--29. " OPC ,Operation Code" "Device Deselected,,ZQ Calibration Short,ZQ Calibration Long,,,,,,,,Precharge All,Refresh,,,,Power Down Entry,Power Down Exit,,,,,,,Self-Refresh Entry,Self-Refresh Exit,,,,,,,Set Reset Pins to Low,Set Reset Pins to High,,,,,,,ModeRegisterSet 0,ModeRegisterSet 1,ModeRegisterSet 2,ModeRegisterSet 3,?..." hexmask.long.word 0x00 0.--15. 1. " ARG ,Parameter Bits" rgroup.long 0x1C++0x03 line.long 0x00 "DBWAIT,Operation completion waiting register" bitfld.long 0x00 0. " WAIT ,Operation Completion Waiting" "Low," if ((((per.l(ad:0xE6790000+0x10))&0x1)==0x0)&&(((per.l(ad:0xE6790000+0x14))&0x1)==0x0)) group.long 0x20++0x07 line.long 0x00 "DBKIND,SDRAM type setting register" bitfld.long 0x00 0.--2. " DDCG ,SDRAM Kind" ",,,,,,,DDR3-SDRAM" line.long 0x04 "DBCONF0,SDRAM configuration setting register 0" bitfld.long 0x04 24.--28. " AWRW0 ,Row Address Bit Width Setting" ",,,,,,,,,,,,12 bits,13 bits,14 bits,15 bits,16 bits,?..." bitfld.long 0x04 20. " AWRK0 ,Number of Ranks Setting" "One rank,?..." textline " " bitfld.long 0x04 16.--17. " AWBK0 ,Number of Banks Setting" ",,,Eight banks" bitfld.long 0x04 8.--11. " AWCL0 ,Column Address Bit Width Setting" ",,,,,,,,,9 bits,10 bits,?..." textline " " bitfld.long 0x04 0.--1. " DW0 ,External Data Bus Width Setting" ",16 bits,32 bits,?..." group.long 0x30++0x3 line.long 0x00 "DBPHYTYPE,PHY Type Setting Register" bitfld.long 0x00 0.--1. " PHYTYPE ,PHY Type Setting Bits" ",DFI,?..." textline "" group.long 0x40++0x0B line.long 0x00 "DBTR0,SDRAM Timing Register 0" bitfld.long 0x00 0.--3. " CL ,CAS Latency Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x04 "DBTR1,SDRAM Timing Register 1" bitfld.long 0x04 0.--3. " CWL ,CAS Write Latency Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,?..." line.long 0x08 "DBTR2,SDRAM Timing Register 2" bitfld.long 0x08 0.--3. " AL ,Additive Latency Setting" "0 cycles,?..." group.long 0x50++0x43 line.long 0x00 "DBTR3,SDRAM Timing Register 3" bitfld.long 0x00 0.--4. " TRCD ,ACT to READ/ACT to WRITE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x04 "DBTR4,SDRAM Timing Register 4" bitfld.long 0x04 16.--20. " TRPA ,PREA Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.long 0x04 0.--4. " TRP ,PRE Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x08 "DBTR5,SDRAM Timing Register 5" bitfld.long 0x08 0.--5. " TRC ,ACT to ACT/ACT to REF Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" line.long 0x0C "DBTR6,SDRAM Timing Register 6" bitfld.long 0x0C 0.--5. " TRAS ,ACT to PRE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,?..." line.long 0x10 "DBTR7,SDRAM Timing Register 7" bitfld.long 0x10 0.--3. " TRRD ,ACT(A) to ACT(B) Interval Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x14 "DBTR8,SDRAM Timing Register 8" hexmask.long.byte 0x14 0.--7. 1. " TFAW ,Four Activate Window Length Setting" line.long 0x18 "DBTR9,SDRAM Timing Register 9" bitfld.long 0x18 0.--3. " TRDPR ,READ-PRE Interval Setting" ",,,,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x1C "DBTR10,SDRAM Timing Register 10" bitfld.long 0x1C 0.--3. " TWR ,Write-Recovery Period Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x20 "DBTR11,SDRAM Timing Register 11" bitfld.long 0x20 0.--5. " TRDWR ,READ to WRITE Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,?..." line.long 0x24 "DBTR12,SDRAM Timing Register 12" bitfld.long 0x24 0.--5. " TWRRD ,WRITE to READ Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,?..." line.long 0x28 "DBTR13,SDRAM Timing Register 13" hexmask.long.word 0x28 0.--11. 1. " TRFC ,REF to ACT/ACT to REF Interval Setting" line.long 0x2C "DBTR14,SDRAM Timing Register 14" hexmask.long.byte 0x2C 16.--23. 1. " TCKEHDLL ,CKEH (DLL-LOCK) Period Setting" hexmask.long.byte 0x2C 0.--7. 1. " TCKEH ,CKEH Period Setting" line.long 0x30 "DBTR15,SDRAM Timing Register 15" bitfld.long 0x30 16.--19. " TCKESR ,CKESR Period Setting Bits" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.long 0x30 0.--3. " TCKEL ,CKEL Period Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " line.long 0x34 "DBTR16,SDRAM Timing Register 16" bitfld.long 0x34 28.--31. " DQIENLTNCY ,Dienltncy Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." bitfld.long 0x34 16.--21. " DQL ,Dqltncy Setting" ",,,,,,,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" textline " " bitfld.long 0x34 12.--15. " DQENLTNCY ,Dqenltncy Setting" "0 cycles,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,?..." bitfld.long 0x34 0.--3. " WDQL ,Wdqltncy Setting" ",1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x38 "DBTR17,SDRAM Timing Register 17" bitfld.long 0x38 16.--21. " TMOD ,MRS Time Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,14 cycles,15 cycles,?..." line.long 0x3C "DBTR18,SDRAM Timing Register 18" bitfld.long 0x3C 24.--26. " RODTL ,ODT Assert Period Setting at Read" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 16.--18. " RODTA ,ODT Assert Start Timing Setting Bits Read" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." textline " " bitfld.long 0x3C 8.--10. " WODTL ,ODT Assert Period Setting at Write" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 0.--2. " WODTA ,ODT Assert Start Timing Setting at Write" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." line.long 0x40 "DBTR19,SDRAM Timing Register 19" hexmask.long.byte 0x40 0.--7. 1. " TZQCS ,Calibration Period Setting" else rgroup.long 0x20++0x07 line.long 0x00 "DBKIND,SDRAM type setting register" bitfld.long 0x00 0.--2. " DDCG ,SDRAM Kind" ",,,,,,,DDR3-SDRAM" line.long 0x04 "DBCONF0,SDRAM configuration setting register 0" bitfld.long 0x04 24.--28. " AWRW0 ,Row Address Bit Width Setting" ",,,,,,,,,,,,12 bits,13 bits,14 bits,15 bits,16 bits,?..." bitfld.long 0x04 20. " AWRK0 ,Number of Ranks Setting" "One rank,?..." textline " " bitfld.long 0x04 16.--17. " AWBK0 ,Number of Banks Setting" ",,,Eight banks" bitfld.long 0x04 8.--11. " AWCL0 ,Column Address Bit Width Setting" ",,,,,,,,,9 bits,10 bits,?..." textline " " bitfld.long 0x04 0.--1. " DW0 ,External Data Bus Width Setting" ",16 bits,32 bits,?..." rgroup.long 0x30++0x3 line.long 0x00 "DBPHYTYPE,PHY Type Setting Register" bitfld.long 0x00 0.--1. " PHYTYPE ,PHY Type Setting Bits" ",DFI,?..." textline "" rgroup.long 0x40++0x0B line.long 0x00 "DBTR0,SDRAM Timing Register 0" bitfld.long 0x00 0.--3. " CL ,CAS Latency Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x04 "DBTR1,SDRAM Timing Register 1" bitfld.long 0x04 0.--3. " CWL ,CAS Write Latency Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,?..." line.long 0x08 "DBTR2,SDRAM Timing Register 2" bitfld.long 0x08 0.--3. " AL ,Additive Latency Setting" "0 cycles,?..." rgroup.long 0x50++0x43 line.long 0x00 "DBTR3,SDRAM Timing Register 3" bitfld.long 0x00 0.--4. " TRCD ,ACT to READ/ACT to WRITE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x04 "DBTR4,SDRAM Timing Register 4" bitfld.long 0x04 16.--20. " TRPA ,PREA Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.long 0x04 0.--4. " TRP ,PRE Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x08 "DBTR5,SDRAM Timing Register 5" bitfld.long 0x08 0.--5. " TRC ,ACT to ACT/ACT to REF Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" line.long 0x0C "DBTR6,SDRAM Timing Register 6" bitfld.long 0x0C 0.--5. " TRAS ,ACT to PRE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,?..." line.long 0x10 "DBTR7,SDRAM Timing Register 7" bitfld.long 0x10 0.--3. " TRRD ,ACT(A) to ACT(B) Interval Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x14 "DBTR8,SDRAM Timing Register 8" hexmask.long.byte 0x14 0.--7. 1. " TFAW ,Four Activate Window Length Setting" line.long 0x18 "DBTR9,SDRAM Timing Register 9" bitfld.long 0x18 0.--3. " TRDPR ,READ-PRE Interval Setting" ",,,,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x1C "DBTR10,SDRAM Timing Register 10" bitfld.long 0x1C 0.--3. " TWR ,Write-Recovery Period Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x20 "DBTR11,SDRAM Timing Register 11" bitfld.long 0x20 0.--5. " TRDWR ,READ to WRITE Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,?..." line.long 0x24 "DBTR12,SDRAM Timing Register 12" bitfld.long 0x24 0.--5. " TWRRD ,WRITE to READ Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,?..." line.long 0x28 "DBTR13,SDRAM Timing Register 13" hexmask.long.word 0x28 0.--11. 1. " TRFC ,REF to ACT/ACT to REF Interval Setting" line.long 0x2C "DBTR14,SDRAM Timing Register 14" hexmask.long.byte 0x2C 16.--23. 1. " TCKEHDLL ,CKEH (DLL-LOCK) Period Setting" hexmask.long.byte 0x2C 0.--7. 1. " TCKEH ,CKEH Period Setting" line.long 0x30 "DBTR15,SDRAM Timing Register 15" bitfld.long 0x30 16.--19. " TCKESR ,CKESR Period Setting Bits" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.long 0x30 0.--3. " TCKEL ,CKEL Period Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " line.long 0x34 "DBTR16,SDRAM Timing Register 16" bitfld.long 0x34 28.--31. " DQIENLTNCY ,Dqienltncy Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." bitfld.long 0x34 16.--21. " DQL ,Dqltncy Setting" ",,,,,,,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" textline " " bitfld.long 0x34 12.--15. " DQENLTNCY ,Dqenltncy Setting" "0 cycles,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,?..." bitfld.long 0x34 0.--3. " WDQL ,Wdqltncy Setting" ",1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x38 "DBTR17,SDRAM Timing Register 17" bitfld.long 0x38 16.--21. " TMOD ,MRS Time Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,14 cycles,15 cycles,?..." line.long 0x3C "DBTR18,SDRAM Timing Register 18" bitfld.long 0x3C 24.--26. " RODTL ,ODT Assert Period Setting at Read" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 16.--18. " RODTA ,ODT Assert Start Timing Setting Bits Read" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." textline " " bitfld.long 0x3C 8.--10. " WODTL ,ODT Assert Period Setting at Write" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 0.--2. " WODTA ,ODT Assert Start Timing Setting at Write" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." line.long 0x40 "DBTR19,SDRAM Timing Register 19" hexmask.long.byte 0x40 0.--7. 1. " TZQCS ,Calibration Period Setting" endif textline "" if ((((per.l(ad:0xE6790000+0x10))&0x1)==0x0)&&(((per.l(ad:0xE6790000+0x14))&0x1)==0x0)) group.long 0xB0++0x3 line.long 0x00 "DBBL,SDRAM operation setting register" bitfld.long 0x00 0.--1. " BL ,Burst Length Setting" "Fixed to 8,?..." else rgroup.long 0xB0++0x3 line.long 0x00 "DBBL,SDRAM operation setting register" bitfld.long 0x00 0.--1. " BL ,Burst Length Setting" "Fixed to 8,?..." endif if (((per.l(ad:0xE6790000+0x10))&0x1)==0x0) group.long 0xC0++0x3 line.long 0x00 "DBADJ0,DBSC3 operation adjustment register 0" bitfld.long 0x00 16.--17. " FREQRATIO ,PHY Frequency Ratio Setting Bits" ",,1:4,?..." bitfld.long 0x00 0. " CAMODE ,Command/Address Output Mode Setting" ",1 command output in 2 clock cycle" else rgroup.long 0xC0++0x3 line.long 0x00 "DBADJ0,DBSC3 operation adjustment register 0" bitfld.long 0x00 16.--17. " FREQRATIO ,PHY Frequency Ratio Setting Bits" ",,1:4,?..." bitfld.long 0x00 0. " CAMODE ,Command/Address Output Mode Setting" ",1 command output in 2 clock cycle" endif if (((per.l(ad:0xE6790000+0x10))&0x1)==0x0) group.long 0xC8++0x3 line.long 0x00 "DBADJ2,DBSC3 operation adjustment register 2" hexmask.long.byte 0x00 24.--31. 1. " ACAPC1 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 16.--19. " ACAPX1 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,4 transactions,,,,8 transactions,?..." hexmask.long.byte 0x00 8.--15. 1. " ACAPC0 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" textline " " bitfld.long 0x00 0.--3. " ACAPX0 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,4 transactions,,,,8 transactions,?..." else rgroup.long 0xC8++0x3 line.long 0x00 "DBADJ2,DBSC3 operation adjustment register 2" hexmask.long.byte 0x00 24.--31. 1. " ACAPC1 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 16.--19. " ACAPX1 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,4 transactions,,,,8 transactions,?..." hexmask.long.byte 0x00 8.--15. 1. " ACAPC0 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" textline " " bitfld.long 0x00 0.--3. " ACAPX0 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,4 transactions,,,,8 transactions,?..." endif group.long 0xE0++0xB line.long 0x00 "DBRFCNF0,Refresh configuration register 0" hexmask.long.word 0x00 0.--11. 1. " REFTHF ,Forcible Auto-Refresh Threshold Setting" line.long 0x04 "DBRFCNF1,Refresh configuration register 1" bitfld.long 0x04 16.--31. " REFPMAX ,Maximum Post Number of Refresh Commands Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." hexmask.long.word 0x04 0.--15. 1. " REFINT ,Average Refresh Interval Setting" line.long 0x08 "DBRFCNF2,Refresh configuration register 2" bitfld.long 0x08 16.--19. " REFPMIN ,Minimum Post Number of Refresh Commands Setting Bits" ",1,?..." bitfld.long 0x08 0. " REFINTS ,Average Refresh Interval Adjustment" "REFINT,1/2 REFINT" group.long 0xF4++0x3 line.long 0x00 "DBCALCNF,DDR3-SDRAM calibration configuration register" bitfld.long 0x00 24. " CALEN ,DDR3-SDRAM Calibration Enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " CALINT ,DDR3-SDRAM Calibration Frequency Setting Bits" if ((((per.l(ad:0xE6790000+0x10))&0x1)==0x0)&&(((per.l(ad:0xE6790000+0x14))&0x1)==0x0)) group.long 0xF8++0x3 line.long 0x00 "DBCALTR,DDR3-SDRAM calibration timing register" hexmask.long.word 0x00 16.--27. 1. " TCALRZ ,DDR3-SDRAM Calibration Timing Setting (REF to ZQCS Interval)" hexmask.long.word 0x00 0.--11. 1. " TCALZR ,DDR3-SDRAM Calibration Timing Setting (ZQCS to REF Interval)" group.long 0x100++0x03 line.long 0x00 "DBRNK0,ODT operation setting register" bitfld.long 0x00 16. " RODTOUT0 ,Bit for ODT Output Level Setting at Read" "Set to 0,Set to 1" bitfld.long 0x00 0. " WODTOUT0 ,Bit for ODT Output Level Setting at Write" "Set to 0,Set to 1" group.long 0x180++0x03 line.long 0x00 "DBPDNCNF,Power-down configuration register" hexmask.long.byte 0x00 8.--15. 1. " PDWAIT ,Power-Down Wait" bitfld.long 0x00 4. " PDDLL ,Power-Down DLL Control" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PDMODE ,Power-Down Mode" "Disabled,Power-down,?..." else rgroup.long 0xF8++0x3 line.long 0x00 "DBCALTR,DDR3-SDRAM calibration timing register" hexmask.long.word 0x00 16.--27. 1. " TCALRZ ,DDR3-SDRAM Calibration Timing Setting (REF to ZQCS Interval)" hexmask.long.word 0x00 0.--11. 1. " TCALZR ,DDR3-SDRAM Calibration Timing Setting (ZQCS to REF Interval)" rgroup.long 0x100++0x03 line.long 0x00 "DBRNK0,ODT operation setting register" bitfld.long 0x00 16. " RODTOUT0 ,Bit for ODT Output Level Setting at Read" "Set to 0,Set to 1" bitfld.long 0x00 0. " WODTOUT0 ,Bit for ODT Output Level Setting at Write" "Set to 0,Set to 1" rgroup.long 0x180++0x03 line.long 0x00 "DBPDNCNF,Power-down configuration register" hexmask.long.byte 0x00 8.--15. 1. " PDWAIT ,Power-Down Wait" bitfld.long 0x00 4. " PDDLL ,Power-Down DLL Control" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PDMODE ,Power-Down Mode" "Disabled,Power-down,?..." endif rgroup.long 0x240++0x3 line.long 0x00 "DBDFISTAT,DFI Status IF Input Register" bitfld.long 0x00 0. " INITCOMPL ,INITCOMPL" "0,1" group.long 0x244++0x3 line.long 0x00 "DBDFICNT,DFI Status IF Output Register" bitfld.long 0x00 4.--5. " FREQRATIO ,Frequence ratio" ",CLK freqratio,?..." bitfld.long 0x00 0. " INITSTART ,Init start" "0,1" group.long 0x280++0x3 line.long 0x00 "DBPDLCK,PHY Unit Lock Register" hexmask.long.word 0x00 0.--15. 1. " PLOCK ,PHY Unit Access Lock Setting" group.long 0x290++0x3 line.long 0x00 "DBPDRGA,PHY Unit Address Register" hexmask.long.word 0x00 0.--15. 1. " PRA ,PHY Unit Address Register" group.long 0x2A0++0x3 line.long 0x00 "DBPDRGD,PHY Unit Access Register" if (((per.l(ad:0xE6790000+0x10))&0x1)==0x0) group.long 0x304++0x3 line.long 0x00 "DBBS0CNT1,Bus control unit 0 control register 1" bitfld.long 0x00 0.--1. " BKADM ,Bank Assignment Setting" "One block,Two blocks,Three blocks,Four blocks" else rgroup.long 0x304++0x3 line.long 0x00 "DBBS0CNT1,Bus control unit 0 control register 1" bitfld.long 0x00 0.--1. " BKADM ,Bank Assignment Setting" "One block,Two blocks,Three blocks,Four blocks" endif group.long 0x380++0x3 line.long 0x00 "DBWT0CNF0,AXI Port Setting Register 0" bitfld.long 0x00 16.--18. " WASYN ,WASYN" ",,2,?..." bitfld.long 0x00 0.--2. " WCN ,AXI Clock to Memory Clock Ratio Setting Bits" "0.5 MCLKCH1>...>CH14,,,Round-robin" bitfld.long 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register for Low channel" bitfld.long 0x00 14. " CLR14 ,Channel 14 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR13 ,Channel 13 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR12 ,Channel 12 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR11 ,Channel 11 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR10 ,Channel 10 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR9 ,Channel 9 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR8 ,Channel 8 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR7 ,Channel 7 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR6 ,Channel 6 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR5 ,Channel 5 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR3 ,Channel 3 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR2 ,Channel 2 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 registers clear" "No clear,Clear" group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Low channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 0" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B_0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_0,DMA Transfer Count Register 0" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" endif if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Register 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_0,DMA Extended Resource Selector 0" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Register 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 1" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B_1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_1,DMA Transfer Count Register 1" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" endif if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Register 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_1,DMA Extended Resource Selector 1" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Register 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 2" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_2,DMA Transfer Count Registers B_2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_2,DMA Transfer Count Register 2" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" endif if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_2,DMA Buffer Control Register 2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_2,DMA Extended Resource Selector 2" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_2,DMA Descriptor Base Address Register 2" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 3" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_3,DMA Transfer Count Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_3,DMA Transfer Count Registers B_3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_3,DMA Transfer Count Register 3" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" endif if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_3,DMA Channel Control Register B_3" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_3,DMA Buffer Control Register 3" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_3,DMA Extended Resource Selector 3" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_3,DMA Descriptor Base Address Register 3" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_3,DMA Descriptor Control Register 3" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_3,DMA Fixed Source Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_3,DMA Fixed Destination Address Register 3" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_3,DMA Fixed Descriptor Base Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 4" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_4,DMA Transfer Count Register 4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_4,DMA Transfer Count Registers B_4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_4,DMA Transfer Count Register 4" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" endif if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_4,DMA Channel Control Register B_4" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_4,DMA Buffer Control Register 4" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_4,DMA Extended Resource Selector 4" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_4,DMA Descriptor Base Address Register 4" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_4,DMA Descriptor Control Register 4" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_4,DMA Fixed Source Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_4,DMA Fixed Destination Address Register 4" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_4,DMA Fixed Descriptor Base Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 5" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_5,DMA Transfer Count Register 5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_5,DMA Transfer Count Registers B_5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_5,DMA Transfer Count Register 5" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" endif if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_5,DMA Channel Control Register B_5" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_5,DMA Buffer Control Register 5" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_5,DMA Extended Resource Selector 5" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_5,DMA Descriptor Base Address Register 5" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_5,DMA Descriptor Control Register 5" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_5,DMA Fixed Source Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_5,DMA Fixed Destination Address Register 5" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_5,DMA Fixed Descriptor Base Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 6" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_6,DMA Transfer Count Register 6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_6,DMA Transfer Count Registers B_6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_6,DMA Transfer Count Register 6" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" endif if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_6,DMA Channel Control Register B_6" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_6,DMA Buffer Control Register 6" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_6,DMA Extended Resource Selector 6" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_6,DMA Descriptor Base Address Register 6" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_6,DMA Descriptor Control Register 6" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_6,DMA Fixed Source Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_6,DMA Fixed Destination Address Register 6" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_6,DMA Fixed Descriptor Base Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 7" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_7,DMA Transfer Count Register 7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_7,DMA Transfer Count Registers B_7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_7,DMA Transfer Count Register 7" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" endif if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_7,DMA Channel Control Register B_7" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_7,DMA Buffer Control Register 7" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_7,DMA Extended Resource Selector 7" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_7,DMA Descriptor Base Address Register 7" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_7,DMA Descriptor Control Register 7" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_7,DMA Fixed Source Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_7,DMA Fixed Destination Address Register 7" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_7,DMA Fixed Descriptor Base Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 8" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_8,DMA Transfer Count Register 8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_8,DMA Transfer Count Registers B_8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_8,DMA Transfer Count Register 8" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" endif if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_8,DMA Channel Control Register B_8" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_8,DMA Buffer Control Register 8" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_8,DMA Extended Resource Selector 8" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_8,DMA Descriptor Base Address Register 8" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_8,DMA Descriptor Control Register 8" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_8,DMA Fixed Source Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_8,DMA Fixed Destination Address Register 8" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_8,DMA Fixed Descriptor Base Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 9" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_9,DMA Transfer Count Register 9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_9,DMA Transfer Count Registers B_9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_9,DMA Transfer Count Register 9" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" endif if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_9,DMA Channel Control Register B_9" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_9,DMA Buffer Control Register 9" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_9,DMA Extended Resource Selector 9" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_9,DMA Descriptor Base Address Register 9" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_9,DMA Descriptor Control Register 9" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_9,DMA Fixed Source Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_9,DMA Fixed Destination Address Register 9" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_9,DMA Fixed Descriptor Base Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 10" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_10,DMA Transfer Count Register 10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_10,DMA Transfer Count Registers B_10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_10,DMA Transfer Count Register 10" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" endif if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_10,DMA Channel Control Register B_10" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_10,DMA Buffer Control Register 10" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_10,DMA Extended Resource Selector 10" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_10,DMA Descriptor Base Address Register 10" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_10,DMA Descriptor Control Register 10" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_10,DMA Fixed Source Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_10,DMA Fixed Destination Address Register 10" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_10,DMA Fixed Descriptor Base Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 11" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_11,DMA Transfer Count Register 11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_11,DMA Transfer Count Registers B_11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_11,DMA Transfer Count Register 11" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" endif if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_11,DMA Channel Control Register B_11" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_11,DMA Buffer Control Register 11" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_11,DMA Extended Resource Selector 11" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_11,DMA Descriptor Base Address Register 11" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_11,DMA Descriptor Control Register 11" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_11,DMA Fixed Source Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_11,DMA Fixed Destination Address Register 11" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_11,DMA Fixed Descriptor Base Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 12" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_12,DMA Transfer Count Register 12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_12,DMA Transfer Count Registers B_12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_12,DMA Transfer Count Register 12" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" endif if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_12,DMA Channel Control Register B_12" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_12,DMA Buffer Control Register 12" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_12,DMA Extended Resource Selector 12" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_12,DMA Descriptor Base Address Register 12" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_12,DMA Descriptor Control Register 12" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_12,DMA Fixed Source Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_12,DMA Fixed Destination Address Register 12" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_12,DMA Fixed Descriptor Base Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 13" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" else group.long 0x8680++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" endif group.long (0x8680+0x08)++0x3 line.long 0x00 "DMATCR_13,DMA Transfer Count Register 13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8680+0x18)++0x3 line.long 0x00 "DMATCRB_13,DMA Transfer Count Registers B_13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x3 line.long 0x00 "DMATSR_13,DMA Transfer Count Register 13" group.long (0x8680+0x38)++0x3 line.long 0x00 "DMATSRB_13,DMA Transfer Size Register 13" endif if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8680+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8680+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8680+0x1C)++0x3 line.long 0x00 "DMACHCRB_13,DMA Channel Control Register B_13" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x3 line.long 0x00 "DMABUFCR_13,DMA Buffer Control Register 13" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x1 line.word 0x00 "DMARS_13,DMA Extended Resource Selector 13" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x7 line.long 0x00 "DMADPBASE_13,DMA Descriptor Base Address Register 13" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_13,DMA Descriptor Control Register 13" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x7 line.long 0x00 "DMAFIXSAR_13,DMA Fixed Source Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_13,DMA Fixed Destination Address Register 13" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_13,DMA Fixed Descriptor Base Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 14" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" else group.long 0x8700++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" endif group.long (0x8700+0x08)++0x3 line.long 0x00 "DMATCR_14,DMA Transfer Count Register 14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8700+0x18)++0x3 line.long 0x00 "DMATCRB_14,DMA Transfer Count Registers B_14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x3 line.long 0x00 "DMATSR_14,DMA Transfer Count Register 14" group.long (0x8700+0x38)++0x3 line.long 0x00 "DMATSRB_14,DMA Transfer Size Register 14" endif if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8700+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8700+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8700+0x1C)++0x3 line.long 0x00 "DMACHCRB_14,DMA Channel Control Register B_14" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x3 line.long 0x00 "DMABUFCR_14,DMA Buffer Control Register 14" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x1 line.word 0x00 "DMARS_14,DMA Extended Resource Selector 14" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x7 line.long 0x00 "DMADPBASE_14,DMA Descriptor Base Address Register 14" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_14,DMA Descriptor Control Register 14" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x7 line.long 0x00 "DMAFIXSAR_14,DMA Fixed Source Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_14,DMA Fixed Destination Address Register 14" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_14,DMA Fixed Descriptor Base Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xE6700000+0xA000)--(ad:0xE6700000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_L,Secure function Secure Status register for Low channels" bitfld.long 0x00 0. " ERROR ,Error status of Low channels" "No error,Error" line.long 0x04 "DMASEDDR_L,Secure function Salve Error Address register for Low channels" line.long 0x08 "DMASEMID_L,Secure function Error Master ID register for Low channels" width 0xB tree.end tree "Upper channels" base ad:0xE6720000 width 19. rgroup.long 0x20++0x3 line.long 0x00 "DMAISTA_U,DMA Interrupt Status Register for Upper channel" bitfld.long 0x00 14. " I29 ,Channel 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I28 ,Channel 28 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " I27 ,Channel 27 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " I26 ,Channel 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I25 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " I24 ,Channel 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " I23 ,Channel 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I22 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I21 ,Channel 21 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " I20 ,Channel 20 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I19 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " I18 ,Channel 18 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I17 ,Channel 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I16 ,Channel 16 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x3 line.long 0x00 "DMASEC_U,DMA Secure Control Register for Upper channel" bitfld.long 0x00 14. " S29 ,Channel 29 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S28 ,Channel 28 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 12. " S27 ,Channel 27 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 11. " S26 ,Channel 26 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S25 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 9. " S24 ,Channel 24 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 8. " S23 ,Channel 23 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S22 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S21 ,Channel 21 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 5. " S20 ,Channel 20 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S19 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 3. " S18 ,Channel 18 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S17 ,Channel 17 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S16 ,Channel 16 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" group.long 0x60++0x3 line.long 0x00 "DMAOR_U,DMA Operation Register for Upper channel" bitfld.long 0x00 8.--9. " PR ,Priority Mode" "CH15>CH16>...>CH29,,,Round-robin" bitfld.long 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_U,DMA Channel Clear Register for Upper channel" bitfld.long 0x00 14. " CLR29 ,Channel 29 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR28 ,Channel 28 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR27 ,Channel 27 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR26 ,Channel 26 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR25 ,Channel 25 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR24 ,Channel 24 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR23 ,Channel 23 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR22 ,Channel 22 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR21 ,Channel 21 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR20 ,Channel 20 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR19 ,Channel 19 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR18 ,Channel 18 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR17 ,Channel 17 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR16 ,Channel 16 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR15 ,Channel 15 registers clear" "No clear,Clear" group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_U,DPRAM Secure Control Register for Upper channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 15" if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_15,DMA Transfer Count Register 15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_15,DMA Transfer Count Registers B_15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_15,DMA Transfer Count Register 15" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_15,DMA Transfer Size Register 15" endif if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_15,DMA Channel Control Register B_15" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_15,DMA Buffer Control Register 15" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_15,DMA Extended Resource Selector 15" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_15,DMA Descriptor Base Address Register 15" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_15,DMA Descriptor Control Register 15" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_15,DMA Fixed Source Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_15,DMA Fixed Destination Address Register 15" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_15,DMA Fixed Descriptor Base Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 16" if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_16,DMA Transfer Count Registers B_16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_16,DMA Transfer Count Register 16" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_16,DMA Transfer Size Register 16" endif if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_16,DMA Buffer Control Register 16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_16,DMA Extended Resource Selector 16" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_16,DMA Descriptor Base Address Register 16" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 17" if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_17,DMA Transfer Count Registers B_17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_17,DMA Transfer Count Register 17" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_17,DMA Transfer Size Register 17" endif if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_17,DMA Buffer Control Register 17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_17,DMA Extended Resource Selector 17" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_17,DMA Descriptor Base Address Register 17" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 18" if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_18,DMA Transfer Count Registers B_18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_18,DMA Transfer Count Register 18" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_18,DMA Transfer Size Register 18" endif if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_18,DMA Buffer Control Register 18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_18,DMA Extended Resource Selector 18" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_18,DMA Descriptor Base Address Register 18" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 19" if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_19,DMA Transfer Count Register 19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_19,DMA Transfer Count Registers B_19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_19,DMA Transfer Count Register 19" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_19,DMA Transfer Size Register 19" endif if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_19,DMA Channel Control Register B_19" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_19,DMA Buffer Control Register 19" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_19,DMA Extended Resource Selector 19" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_19,DMA Descriptor Base Address Register 19" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_19,DMA Descriptor Control Register 19" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_19,DMA Fixed Source Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_19,DMA Fixed Destination Address Register 19" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_19,DMA Fixed Descriptor Base Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 20" if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_20,DMA Transfer Count Register 20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_20,DMA Transfer Count Registers B_20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_20,DMA Transfer Count Register 20" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_20,DMA Transfer Size Register 20" endif if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_20,DMA Channel Control Register B_20" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_20,DMA Buffer Control Register 20" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_20,DMA Extended Resource Selector 20" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_20,DMA Descriptor Base Address Register 20" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_20,DMA Descriptor Control Register 20" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_20,DMA Fixed Source Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_20,DMA Fixed Destination Address Register 20" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_20,DMA Fixed Descriptor Base Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 21" if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_21,DMA Transfer Count Register 21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_21,DMA Transfer Count Registers B_21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_21,DMA Transfer Count Register 21" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_21,DMA Transfer Size Register 21" endif if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_21,DMA Channel Control Register B_21" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_21,DMA Buffer Control Register 21" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_21,DMA Extended Resource Selector 21" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_21,DMA Descriptor Base Address Register 21" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_21,DMA Descriptor Control Register 21" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_21,DMA Fixed Source Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_21,DMA Fixed Destination Address Register 21" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_21,DMA Fixed Descriptor Base Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 22" if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_22,DMA Transfer Count Register 22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_22,DMA Transfer Count Registers B_22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_22,DMA Transfer Count Register 22" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_22,DMA Transfer Size Register 22" endif if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_22,DMA Channel Control Register B_22" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_22,DMA Buffer Control Register 22" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_22,DMA Extended Resource Selector 22" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_22,DMA Descriptor Base Address Register 22" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_22,DMA Descriptor Control Register 22" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_22,DMA Fixed Source Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_22,DMA Fixed Destination Address Register 22" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_22,DMA Fixed Descriptor Base Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 23" if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_23,DMA Transfer Count Register 23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_23,DMA Transfer Count Registers B_23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_23,DMA Transfer Count Register 23" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_23,DMA Transfer Size Register 23" endif if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_23,DMA Channel Control Register B_23" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_23,DMA Buffer Control Register 23" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_23,DMA Extended Resource Selector 23" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_23,DMA Descriptor Base Address Register 23" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_23,DMA Descriptor Control Register 23" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_23,DMA Fixed Source Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_23,DMA Fixed Destination Address Register 23" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_23,DMA Fixed Descriptor Base Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 24" if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_24,DMA Transfer Count Register 24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_24,DMA Transfer Count Registers B_24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_24,DMA Transfer Count Register 24" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_24,DMA Transfer Size Register 24" endif if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_24,DMA Channel Control Register B_24" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_24,DMA Buffer Control Register 24" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_24,DMA Extended Resource Selector 24" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_24,DMA Descriptor Base Address Register 24" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_24,DMA Descriptor Control Register 24" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_24,DMA Fixed Source Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_24,DMA Fixed Destination Address Register 24" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_24,DMA Fixed Descriptor Base Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 25" if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_25,DMA Transfer Count Register 25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_25,DMA Transfer Count Registers B_25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_25,DMA Transfer Count Register 25" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_25,DMA Transfer Size Register 25" endif if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_25,DMA Channel Control Register B_25" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_25,DMA Buffer Control Register 25" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_25,DMA Extended Resource Selector 25" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_25,DMA Descriptor Base Address Register 25" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_25,DMA Descriptor Control Register 25" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_25,DMA Fixed Source Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_25,DMA Fixed Destination Address Register 25" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_25,DMA Fixed Descriptor Base Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 26" if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_26,DMA Transfer Count Register 26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_26,DMA Transfer Count Registers B_26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_26,DMA Transfer Count Register 26" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_26,DMA Transfer Size Register 26" endif if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_26,DMA Channel Control Register B_26" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_26,DMA Buffer Control Register 26" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_26,DMA Extended Resource Selector 26" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_26,DMA Descriptor Base Address Register 26" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_26,DMA Descriptor Control Register 26" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_26,DMA Fixed Source Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_26,DMA Fixed Destination Address Register 26" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_26,DMA Fixed Descriptor Base Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 27" if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_27,DMA Transfer Count Register 27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_27,DMA Transfer Count Registers B_27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_27,DMA Transfer Count Register 27" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_27,DMA Transfer Size Register 27" endif if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_27,DMA Channel Control Register B_27" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_27,DMA Buffer Control Register 27" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_27,DMA Extended Resource Selector 27" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_27,DMA Descriptor Base Address Register 27" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_27,DMA Descriptor Control Register 27" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_27,DMA Fixed Source Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_27,DMA Fixed Destination Address Register 27" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_27,DMA Fixed Descriptor Base Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 28" if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x7 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" else group.long 0x8680++0x7 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" endif group.long (0x8680+0x08)++0x3 line.long 0x00 "DMATCR_28,DMA Transfer Count Register 28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8680+0x18)++0x3 line.long 0x00 "DMATCRB_28,DMA Transfer Count Registers B_28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x3 line.long 0x00 "DMATSR_28,DMA Transfer Count Register 28" group.long (0x8680+0x38)++0x3 line.long 0x00 "DMATSRB_28,DMA Transfer Size Register 28" endif if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8680+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8680+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8680+0x1C)++0x3 line.long 0x00 "DMACHCRB_28,DMA Channel Control Register B_28" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x3 line.long 0x00 "DMABUFCR_28,DMA Buffer Control Register 28" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x1 line.word 0x00 "DMARS_28,DMA Extended Resource Selector 28" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x7 line.long 0x00 "DMADPBASE_28,DMA Descriptor Base Address Register 28" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_28,DMA Descriptor Control Register 28" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x7 line.long 0x00 "DMAFIXSAR_28,DMA Fixed Source Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_28,DMA Fixed Destination Address Register 28" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_28,DMA Fixed Descriptor Base Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 29" if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x7 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" else group.long 0x8700++0x7 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" endif group.long (0x8700+0x08)++0x3 line.long 0x00 "DMATCR_29,DMA Transfer Count Register 29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8700+0x18)++0x3 line.long 0x00 "DMATCRB_29,DMA Transfer Count Registers B_29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x3 line.long 0x00 "DMATSR_29,DMA Transfer Count Register 29" group.long (0x8700+0x38)++0x3 line.long 0x00 "DMATSRB_29,DMA Transfer Size Register 29" endif if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6720000+0x8700+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6720000+0x8700+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8700+0x1C)++0x3 line.long 0x00 "DMACHCRB_29,DMA Channel Control Register B_29" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x3 line.long 0x00 "DMABUFCR_29,DMA Buffer Control Register 29" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x1 line.word 0x00 "DMARS_29,DMA Extended Resource Selector 29" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x7 line.long 0x00 "DMADPBASE_29,DMA Descriptor Base Address Register 29" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_29,DMA Descriptor Control Register 29" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x7 line.long 0x00 "DMAFIXSAR_29,DMA Fixed Source Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_29,DMA Fixed Destination Address Register 29" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_29,DMA Fixed Descriptor Base Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xE6720000+0xA000)--(ad:0xE6720000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_U,Secure function Secure Status register for Upper channels" bitfld.long 0x00 0. " ERROR ,Error status of Upper channels" "No error,Error" line.long 0x04 "DMASEDDR_U,Secure function Salve Error Address register for Upper channels" line.long 0x08 "DMASEMID_U,Secure function Error Master ID register for Upper channels" width 0xB tree.end tree.end tree "LBSC-DMAC" tree "LBSC Common Registers" base ad:0xFEC01000 width 13. group.long 0x00++0x03 line.long 0x00 "DTIMR,DMA Timer Control Register" hexmask.long.word 0x00 0.--15. 1. " DTIM ,DMAC Internal Timer Cycle Set" group.long 0x04++0x03 line.long 0x00 "DRMSKR,DMA Request Mask Control Register" bitfld.long 0x00 8.--11. " DRMSK2 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DRMSK1 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DRMSK0 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x0c++0x03 line.long 0x00 "DMLVLR,DMA Memory Access Priority Level Control Register" bitfld.long 0x00 2. " DMLV2 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 1. " DMLV1 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 0. " DMLV0 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" rgroup.long 0x10++0x03 line.long 0x00 "DINTSR,DMA Transfer End Interrupt Register" bitfld.long 0x00 2. " DTE2 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " DTE1 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE0 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" wgroup.long 0x14++0x03 line.long 0x00 "DINTCR,DMA Transfer End Interrupt Status Clear Register" bitfld.long 0x00 2. " DTEC2 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" bitfld.long 0x00 1. " DTEC1 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" bitfld.long 0x00 0. " DTEC0 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" group.long 0x18++0x03 line.long 0x00 "DINTMR,DMA Transfer End Interrupt Enable Register" bitfld.long 0x00 2. " DTEM2 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" bitfld.long 0x00 1. " DTEM1 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" bitfld.long 0x00 0. " DTEM0 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "DACTSR,DMA Activation Status Register" bitfld.long 0x00 2. " DS2 ,DMA Channel 2 Status" "Idle,Active" bitfld.long 0x00 1. " DS1 ,DMA Channel 1 Status" "Idle,Active" bitfld.long 0x00 0. " DS0 ,DMA Channel 0 Status" "Idle,Active" group.long 0x24++0x0b line.long 0x0 "LSRSTR0,Software-Reset Register 0" eventfld.long 0x0 0. " SRST ,Software Reset" "No reset,Reset" line.long 0x4 "LSRSTR1,Software-Reset Register 1" eventfld.long 0x4 0. " SRST ,Software Reset" "No reset,Reset" line.long 0x8 "LSRSTR2,Software-Reset Register 2" eventfld.long 0x8 0. " SRST ,Software Reset" "No reset,Reset" group.long 0x80++0x03 line.long 0x00 "DMALGR,External DMA Data Alignment Control Register" bitfld.long 0x00 11. " DMLG2[EXBWE] ,EX-BUS data alignment conversion for DMAC channel 2" "Fixed,Variable" bitfld.long 0x00 10. " DMLG2[EXAC] ,Endian setting channel 2" "Big,Little" bitfld.long 0x00 8.--9. " DMLG2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 7. " DMLG1[EXBWE] ,EXBUS data alignment conversion for DMAC channel 1" "Fixed,Variable" bitfld.long 0x00 6. " DMLG1[EXAC] ,Endian setting channel 1" "Big,Little" bitfld.long 0x00 4.--5. " DMLG2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 3. " DMLG0[EXBWE] ,EXBUS data alignment conversion for DMAC channel 0" "Fixed,Variable" bitfld.long 0x00 2. " DMLG0[EXAC] ,Endian setting channel 0" "Big,Little" bitfld.long 0x00 0.--1. " DMLG0[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" sif cpu()=="RCARM2"||cpu()=="RCARV2H" group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA AXI Priority Control Register" bitfld.long 0x00 8.--11. " SPRR2 ,AXI bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR1 ,AXI bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR0 ,AXI bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" else group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA SHwy Priority Control Register" bitfld.long 0x00 8.--11. " SPRR2 ,SHwy bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR1 ,SHwy bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR0 ,SHwy bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" endif sif (!cpuis("RCARV2H")) group.long 0xC0++0x07 line.long 0x00 "UATMR,Ultra ATA DMA Mode Register" bitfld.long 0x00 24.--25. " UTDR1 ,Select the external pin for the DREQ in the Ultra ATA 1" "No external pin,DREQ0,DREQ1,No external pin" bitfld.long 0x00 21. " UTWE1 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 20. " UTRE1 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 1" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--18. " UTSL1 ,Select the external pin for the IORDY in the Ultra ATA 1" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" bitfld.long 0x00 16. " UATM1 ,Specifies the Ultra ATA 1 operating mode" "Normal DMA mode,Ultra ATA DMA mode" bitfld.long 0x00 8.--9. " UTDR0 ,Select the external pin for the DREQ signal in the Ultra ATA 0" "No external pin,DREQ0,DREQ1,No external pin" textline " " bitfld.long 0x00 5. " UTWE0 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 4. " UTRE0 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 1.--2. " UTSL0 ,Select the external pin for the IORDY in the Ultra ATA 0" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" textline " " bitfld.long 0x00 0. " UATM0 ,Specifies the Ultra ATA 0 operating mode" "Normal DMA mode,Ultra ATA DMA mode" line.long 0x04 "UATWCR,Ultra ATA Write Cycle Setting Register" bitfld.long 0x04 16.--18. " UATWCYC1 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 1 [Setup/Hold]]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" bitfld.long 0x04 0.--2. " UATWCYC0 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 0 [Setup/Hold]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" group.long 0xC8++0x07 line.long 0x00 "UATTSR0,Ultra ATA Timeout Period Setting Register 0" line.long 0x04 "UATTSR1,Ultra ATA Timeout Period Setting Register 1" group.long 0xCC++0x07 line.long 0x00 "UATTER,Ultra ATA Error Indication Register" bitfld.long 0x00 16. " DER1 ,Timeout occurs due to a temporary communication stop in Ultra ATA 1" "No timeout,Timeout" bitfld.long 0x00 1. " PER ,PIO access is executed" "No access,Access" bitfld.long 0x00 0. " DER0 ,Timeout occurs due to a temporary communication stop in Ultra ATA 0" "No timeout,Timeout" line.long 0x04 "UATIER,Ultra ATA Error Interrupt Enable Register" bitfld.long 0x04 16. " DERE1 ,DER1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " PERE ,PER interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " DERE0 ,DER0 interrupt" "No interrupt,Interrupt" rgroup.long 0xD4++0x03 line.long 0x00 "UATCRCR,Ultra ATA CRC Code Indication Register" hexmask.long.word 0x00 16.--31. 1. " CRC1 ,CRC code created from the transfer data in Ultra ATA 1" hexmask.long.word 0x00 0.--15. 1. " CRC0 ,CRC code created from the transfer data in Ultra ATA 0" base ad:0xFEC01400 group.long 0x00++0x03 line.long 0x00 "UATTMR,Ultra ATA Transfer Mode Register" bitfld.long 0x00 9. " DTCD1 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 8. " DTCD0 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 0. " DBG0 ,Test Bit" "0,1" endif width 0x0b tree.end tree "Channel 0" base ad:0xFEC01000 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long 0x08 0.--25. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Normal,Burst" textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 1" base ad:0xFEC01040 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Normal,Burst" textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 2" base ad:0xFEC01080 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 3" base ad:0xFEC010C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 4" base ad:0xFEC01100 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 5" base ad:0xFEC01140 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 6" base ad:0xFEC01180 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 7" base ad:0xFEC011C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 8" base ad:0xFEC01200 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 9" base ad:0xFEC01240 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 10" base ad:0xFEC01280 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 11" base ad:0xFEC012C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 12" base ad:0xFEC01300 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 13" base ad:0xFEC01340 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 14" base ad:0xFEC01380 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "USBF0,USBF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "USBF0,USBF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 15" base ad:0xFEC013C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "USBF0,USBF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "USBF0,USBF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 16" base ad:0xFEC01400 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 17" base ad:0xFEC01440 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 18" base ad:0xFEC01480 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 19" base ad:0xFEC014C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 20" base ad:0xFEC01500 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,,,,,SDHI1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,,,,,SDHI1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 21" base ad:0xFEC01540 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 22" base ad:0xFEC01580 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 23" base ad:0xFEC015C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 24" base ad:0xFEC01600 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",MMC0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "MMC0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 25" base ad:0xFEC01640 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 26" base ad:0xFEC01680 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 27" base ad:0xFEC016C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 28" base ad:0xFEC01700 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 29" base ad:0xFEC01740 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 30" base ad:0xFEC01780 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 31" base ad:0xFEC017C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 32" base ad:0xFEC01800 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 33" base ad:0xFEC01840 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 34" base ad:0xFEC01880 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 35" base ad:0xFEC018C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 36" base ad:0xFEC01900 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 37" base ad:0xFEC01940 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 38" base ad:0xFEC01980 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 39" base ad:0xFEC019C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 40" base ad:0xFEC01A00 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 41" base ad:0xFEC01A40 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 42" base ad:0xFEC01A80 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree.end tree "R-GP2D (2D graphics rendering module)" base ad:0xE6EC0000 width 11. tree "System Control Register" group.long 0x00++0x3 line.long 0x00 "SCLR,System Control Register" bitfld.long 0x00 31. " SRES ,Software Reset" "No reset,Reset" bitfld.long 0x00 3. " RBRK ,Rendering Break" "Not broke,Broke" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x04++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 28.--31. " VER ,Version Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " BRK ,Rendering Break Flag" "Not broke,Broke" bitfld.long 0x00 2. " CER ,Command Error Flag" "No error,Error" textline " " bitfld.long 0x00 1. " INT ,Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " TRA ,Trap Flag - end of command execution" "Not ended,Ended" wgroup.long 0x08++0x03 line.long 0x00 "SRCR,Status Register Clear Register" bitfld.long 0x00 3. " BRCL ,Rendering Break Flag Clear" "No effect,Clear" bitfld.long 0x00 2. " CECL ,Command Error Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " INCL ,Interrupt Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRCL ,Trap Flag Clear" "No effect,Clear" group.long 0x0C++0x03 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 3. " BRE ,Rendering Break Flag Enable" "Disabled,Enabled" bitfld.long 0x00 2. " CEE ,Command Error Flag Enable" "Disabled,Enabled" bitfld.long 0x00 1. " INE ,Interrupt Flag Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRE ,Trap Flag Enable" "Disabled,Enabled" rgroup.long 0x10++0x03 line.long 0x00 "ICIDR,Interrupt Command ID Register" hexmask.long.byte 0x00 0.--7. 1. " ICID ,Interrupt Command ID" tree.end tree "Memory Control Register" group.long 0x40++0x2F line.long 0x00 "RTN0R,Return Address Register 0" hexmask.long 0x00 2.--28. 0x4 " RTN0 ,Return Address 0" line.long 0x04 "RTN1R,Return Address Register 1" hexmask.long 0x04 2.--28. 0x4 " RTN1 ,Return Address 1" line.long 0x08 "DLSAR,Display List Start Address Register" hexmask.long 0x08 4.--28. 0x10 " DLSA ,Display List Start Address" line.long 0x0c "SSAR,2-Dimensional Source Area Start Address Register" hexmask.long 0x0c 4.--28. 0x10 " SSA ,2-Dimensional Source Area Start Address" line.long 0x10 "RSAR,Rendering Start Address Register" hexmask.long 0x10 4.--28. 0x10 " RSA ,Rendering Start Address" line.long 0x14 "WSAR,Work Area Start Address Register" hexmask.long 0x14 4.--28. 0x10 " WSA ,Work Area Start Address" line.long 0x18 "SSTRR,Source Stride Register" hexmask.long.word 0x18 3.--12. 1. " SSTR ,Source Stride" line.long 0x1c "DSTRR,Destination Stride Register" hexmask.long.word 0x1c 4.--12. 1. " DSTR ,Destination Stride" line.long 0x20 "ENDCVR,Endian Conversion Control Register" bitfld.long 0x20 3. " LWSWAP ,Longword Swap" "Not swapped,Swapped" bitfld.long 0x20 2. " WSWAP ,Word Swap" "Not swapped,Swapped" bitfld.long 0x20 1. " BYTESWAP ,Byte Swap" "Not swapped,Swapped" textline " " bitfld.long 0x20 0. " BITSWAP ,Bit Swap" "Not swapped,Swapped" line.long 0x24 "ASAR,Alfa-Map Area Start Address Register" hexmask.long 0x24 4.--28. 0x10 " ASA ,Alfa-Map Area Start Address" line.long 0x28 "ASTRR,Alfa-Map Stride Register" hexmask.long.word 0x28 3.--12. 1. " ASTR ,Alfa-Map Stride" line.long 0x2c "ADREXTR,Address Extension Register" bitfld.long 0x2c 29.--31. " ADREXT ,Address Extension" "0,1,2,3,4,5,6,7" rgroup.long 0x74++0x03 line.long 0x00 "RTNSTKR,Return Address STK Register" hexmask.long 0x00 2.--28. 0x4 " RTNSTK ,Return Address STK" tree.end tree "Color Control Register" group.long 0x80++0xF line.long 0x00 "STCR,Source Transparent Color Register" bitfld.long 0x00 24. " STC1 ,[1-bit/pixel] Source Transparent Color" "Low,High" hexmask.long.byte 0x00 16.--23. 1. " [STC8/STC32] ,[8-bit/pixel]|[32-bit/pixel R] Source Transparent Color" hexmask.long.word 0x00 0.--15. 1. " [STC16/STC32] ,[16-bit/pixel]|[32-bit/pixel G and B] Source Transparent Color" line.long 0x04 "DTCR,Destination Transparent Color Register" hexmask.long.byte 0x04 16.--23. 1. " [DTC8/DTC32] ,[8-bit/pixel]|[32-bit/pixel] R Destination Transparent Color" hexmask.long.word 0x04 0.--15. 1. " [DTC16/DTC32] ,[16-bit/pixel]|[32-bit/pixel G and B] Destination Transparent Color 16" line.long 0x08 "ALPHR,Alpha Value Register" hexmask.long.byte 0x08 0.--7. 1. " ALPH ,Alpha Value" line.long 0x0C "COFSR,Color Offset Register" hexmask.long.byte 0x0C 16.--23. 1. " COR ,Color Offset R" hexmask.long.byte 0x0C 8.--15. 1. " COG ,Color Offset G" hexmask.long.byte 0x0C 0.--7. 1. " COB ,Color Offset B" group.long 0x98++0x03 line.long 0x00 "AVALUE8R,A Value 8 Register" hexmask.long.byte 0x00 0.--7. 1. " AVALUE8 ,A Value 8" group.long 0x9C++0x03 line.long 0x00 "ATCLR,Alpha Test Control Register" bitfld.long 0x00 28.--30. " SATSEL ,Source Alpha Test Mode Select" "ALWAYS,NEVER,LESS,LEQUAL,EQUAL,GEQUAL,GREATER,NEQUAL" hexmask.long.byte 0x00 16.--23. 1. " SATRV ,Source Alpha Test Reference Value " bitfld.long 0x00 12.--14. " DATSEL ,Destination Alpha Test Mode Select" "ALWAYS,NEVER,LESS,LEQUAL,EQUAL,GEQUAL,GREATER,NEQUAL" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATRV ,Destination Alpha Test Reference Value" tree.end tree "Rendering Control Register" if (((per.l(ad:0xE6EC0000+0xC0))&0x40000)==0x00000) if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB," bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB," bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE,Value A" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" else group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB," bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB," bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE8R,Cmd parameters" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" endif else if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB,ARGB" bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB,ARGB" bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE,Value A" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" else group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB,ARGB" bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB,ARGB" bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE8R,Cmd parameters" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" endif endif rgroup.long 0xC4++0x1F line.long 0x00 "CSTR,Command Status Register" hexmask.long 0x00 2.--28. 0x4 " CST ,Command Status" line.long 0x04 "CURR,Current Pointer Register" hexmask.long.word 0x04 16.--31. 1. " XC ,Current Pointer X" hexmask.long.word 0x04 0.--15. 1. " YC ,Current Pointer Y" line.long 0x08 "LCOR,Local Offset Register" hexmask.long.word 0x08 16.--31. 1. " XO ,Local Offset X" hexmask.long.word 0x08 0.--15. 1. " YO ,Local Offset Y" line.long 0x0c "SCLMAR,System Clipping Area MAX Register" hexmask.long.word 0x0C 16.--27. 1. " SXMAX ,System Clipping XMAX" hexmask.long.word 0x0C 0.--11. 1. " SYMAX ,System Clipping YMAX" line.long 0x10 "UCLMIR,User Clipping Area MIN Register" hexmask.long.word 0x10 16.--27. 1. " UXMIN ,User Clipping XMIN" hexmask.long.word 0x10 0.--11. 1. " UYMIN ,User Clipping YMIN" line.long 0x14 "UCLMAR,User Clipping Area MAX Register" hexmask.long.word 0x14 16.--27. 1. " UXMAX ,User Clipping XMAX" hexmask.long.word 0x14 0.--11. 1. " UYMAX ,User Clipping YMAX" line.long 0x18 "RUCLMIR,Relative User Clipping Area MIN Register" hexmask.long.word 0x18 16.--27. 1. " RUXMIN ,Relative User Clipping XMIN" hexmask.long.word 0x18 0.--11. 1. " RUYMIN ,Relative User Clipping YMIN" line.long 0x1C "RUCLMAR,Relative User Clipping Area MAX Register" hexmask.long.word 0x1C 16.--27. 1. " RUXMAX ,Relative User Clipping XMAX" hexmask.long.word 0x1C 0.--11. 1. " RUYMAX ,Relative User Clipping YMAX" if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xF0++0x03 line.long 0x00 "RCL2R,Rendering Control 2 Register" bitfld.long 0x00 21. " DAE ,Destination Alpha Enable" "Regardless of value A,Value A" bitfld.long 0x00 20. " PSTYLE ,Pattern Style Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " PXSIZE ,Pattern X Size" "8 pixels,16 pixels,32 pixels,64 pixels" textline " " bitfld.long 0x00 16.--17. " PYSIZE ,Pattern Y Size" "8 pixels,16 pixels,32 pixels,64 pixels" else group.long 0xF0++0x03 line.long 0x00 "RCL2R,Rendering Control 2 Register" bitfld.long 0x00 21. " DAE ,Destination Alpha Enable" "Regardless of value A,Test passed" bitfld.long 0x00 20. " PSTYLE ,Pattern Style Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " PXSIZE ,Pattern X Size" "8 pixels,16 pixels,32 pixels,64 pixels" textline " " bitfld.long 0x00 16.--17. " PYSIZE ,Pattern Y Size" "8 pixels,16 pixels,32 pixels,64 pixels" endif group.long 0xF8++0x03 line.long 0x00 "POFSR,Pattern Offset Register" hexmask.long.word 0x00 16.--27. 1. " POFSX ,Pattern Offset X" hexmask.long.word 0x00 0.--11. 1. " POFSY ,Pattern Offset Y" tree.end tree "Coordinate Transformation Control Register" group.long 0x100++0x3B line.long 0x00 "GTRCR,Coordinate Transformation Control Register" bitfld.long 0x00 31. " GTE ,Coordinate Transformation Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AFE ,Affine Transformation Enable" "Disabled,Enabled" line.long 0x04 "MTRAR,Matrix Parameter A Register" line.long 0x08 "MTRBR,Matrix Parameter B Register" line.long 0x0c "MTRCR,Matrix Parameter C Register" line.long 0x10 "MTRDR,Matrix Parameter D Register" line.long 0x14 "MTRER,Matrix Parameter E Register" line.long 0x18 "MTRFR,Matrix Parameter F Register" line.long 0x1c "MTRGR,Matrix Parameter G Register" line.long 0x20 "MTRHR,Matrix Parameter H Register" line.long 0x24 "MTRIR,Matrix Parameter I Register" line.long 0x28 "GTROFSXR,Coordinate Transformation Offset X Register" hexmask.long.word 0x28 0.--15. 1. " GTROFSX ,Coordinate Transformation Offset X" line.long 0x2c "GTROFSYR,Coordinate Transformation Offset Y Register" hexmask.long.word 0x2C 0.--15. 1. " GTROFSY ,Coordinate Transformation Offset Y" line.long 0x30 "ZCLPMINR,Z Clipping Area MIN Register" line.long 0x34 "ZCLPMAXR,Z Clipping Area MAX Register" line.long 0x38 "ZSATVMINR,Z Saturation Value MIN Register" group.long 0x160++0x3 line.long 0x00 "2DVCEXTR,2-Dimensional Vertex Clip Extension Width Register" bitfld.long 0x00 0.--5. " 2DVCEXT ,2-Dimensional Vertex Clip Extension Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "Mode Control Register" group.long 0x1FC++0x3 line.long 0x00 "MD0R,Mode 0 Register" bitfld.long 0x00 24. " GBM2 ,Graphic Bit Mode" "In accord with GBM,ARGB8888 format" textline " " bitfld.long 0x00 8. " ACDE ,Anti-aliasing Coverage Drawing Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DITHERENB ,Dither Enable" "Disabled,Enabled" tree.end width 11. tree.end tree.open "DU (Display Unit)" tree "DU 0" base ad:0xFEB00000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" textline " " bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM1 ,Scan Mode 1" "Non-interlaced mode,,Interlace sync mode,Interlace and video mode" else group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" textline " " bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM1 ,Scan Mode 1" "Non-interlaced mode,,Interlace sync mode,Interlace and video mode" endif textline " " group.long 0x04++0x03 line.long 0x00 "DSMR_0,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC Pin Mode" "VSYNC signal,CSYNC signal" bitfld.long 0x00 27. " ODPM ,ODDF Pin Mode" "ODDF signal,CLAMP signal" bitfld.long 0x00 25.--26. " DIPM ,DISP Pin Mode" "DISP signal,CSYNC signal,,DE signal" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC Pin Mode" "CSYNC signal,HSYNC signal" bitfld.long 0x00 19. " DIL ,DISP Polarity Selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC Polarity Selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC Polarity Selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP Output Disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE Polarity Selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE Output Mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE Disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD Signal Polarity Selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC Mode" "Mode 0,,Mode 2,Mode 3" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) rgroup.long 0x08++0x03 line.long 0x00 "DSSR_0,Display Status Register" bitfld.long 0x00 30.--31. " VC_1_FB ,Video Capture Frame 1 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 28.--29. " VC_0_FB ,Video Capture Frame 0 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 26.--27. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 25. " DFB10 ,Display Frame Buffer 10 Flag" "AP_2_DSA_0_R,AP_2_DSA_1_R" bitfld.long 0x00 24. " DFB_9 ,Display Frame Buffer 9 Flag" "AP_1_DSA_0_R,AP_1_DSA_1_R" bitfld.long 0x00 23. " DFB_8 ,Display Frame Buffer 8 Flag" "P8DSA_0_R,P8DSA_1_R" textline " " bitfld.long 0x00 22. " DFB_7 ,Display Frame Buffer 7 Flag" "AP_7_DSA_0_R,AP_7_DSA_1_R" bitfld.long 0x00 21. " DFB_6 ,Display Frame Buffer 6 Flag" "AP_6_DSA_0_R,AP_6_DSA_1_R" bitfld.long 0x00 22. " DFB_5 ,Display Frame Buffer 5 Flag" "AP_5_DSA_0_R,AP_5_DSA_1_R" textline " " bitfld.long 0x00 19. " DFB_4 ,Display Frame Buffer 4 Flag" "P4DSA_0_R,P4DSA_1_R" bitfld.long 0x00 18. " DFB_3 ,Display Frame Buffer 3 Flag" "P3DSA_0_R,P3DSA_1_R" bitfld.long 0x00 17. " DFB_2 ,Display Frame Buffer 2 Flag" "P2DSA_0_R,P2DSA_1_R" textline " " bitfld.long 0x00 16. " DFB_1 ,Display Frame Buffer 1 Flag" "P1DSA_0_R,P1DSA_1_R" textline " " bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" else rgroup.long 0x08++0x03 line.long 0x00 "DSSR_0,Display Status Register" bitfld.long 0x00 28.--29. " VC_0_FB ,Video Capture Frame 0 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 25. " DFB10 ,Display Frame Buffer 10 Flag" "AP_2_DSA_0_R,AP_2_DSA_1_R" bitfld.long 0x00 24. " DFB_9 ,Display Frame Buffer 9 Flag" "AP_1_DSA_0_R,AP_1_DSA_1_R" bitfld.long 0x00 23. " DFB_8 ,Display Frame Buffer 8 Flag" "P8DSA_0_R,P8DSA_1_R" textline " " bitfld.long 0x00 22. " DFB_7 ,Display Frame Buffer 7 Flag" "AP_7_DSA_0_R,AP_7_DSA_1_R" bitfld.long 0x00 21. " DFB_6 ,Display Frame Buffer 6 Flag" "AP_6_DSA_0_R,AP_6_DSA_1_R" bitfld.long 0x00 22. " DFB_5 ,Display Frame Buffer 5 Flag" "AP_5_DSA_0_R,AP_5_DSA_1_R" textline " " bitfld.long 0x00 19. " DFB_4 ,Display Frame Buffer 4 Flag" "P4DSA_0_R,P4DSA_1_R" bitfld.long 0x00 18. " DFB_3 ,Display Frame Buffer 3 Flag" "P3DSA_0_R,P3DSA_1_R" bitfld.long 0x00 17. " DFB_2 ,Display Frame Buffer 2 Flag" "P2DSA_0_R,P2DSA_1_R" textline " " bitfld.long 0x00 16. " DFB_1 ,Display Frame Buffer 1 Flag" "P1DSA_0_R,P1DSA_1_R" textline " " bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" endif wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_0,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto Rendering Display Change Flag Clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto Rendering Display Change Flag Clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto Rendering Display Change Flag Clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto Rendering Display Change Flag Clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto Rendering Display Change Flag Clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto Rendering Display Change Flag Clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto Rendering Display Change Flag Clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto Rendering Display Change Flag Clear 1" "No effect,Clear" group.long 0x10++0x0b line.long 0x00 "DIER_0,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto Rendering Display Change Flag 8 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto Rendering Display Change Flag 7 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto Rendering Display Change Flag 6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto Rendering Display Change Flag 5 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto Rendering Display Change Flag 4 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto Rendering Display Change Flag 3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto Rendering Display Change Flag 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto Rendering Display Change Flag 1 Interrupt Enable" "Disabled,Enabled" line.long 0x04 "CPCR_0,Color Palette Control Register" bitfld.long 0x04 19. " CP_4_CE ,Color Palette 4 Change Enable" "Disabled,Enabled" bitfld.long 0x04 18. " CP_3_CE ,Color Palette 3 Change Enable" "Disabled,Enabled" bitfld.long 0x04 17. " CP_2_CE ,Color Palette 2 Change Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CP_1_CE ,Color Palette 1 Change Enable" "Disabled,Enabled" line.long 0x08 "DPPR_0,Display Plane Priority Register" bitfld.long 0x08 31. " DPE_8 ,Display Plane Priority 8 Enable" "Disabled,Enabled" bitfld.long 0x08 28.--30. " DPS_8 ,Display Plane Priority 8 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 27. " DPE_7 ,Display Plane Priority 7 Enable" "Disabled,Enabled" bitfld.long 0x08 24.--26. " DPS_7 ,Display Plane Priority 7 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 23. " DPE_6 ,Display Plane Priority 6 Enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " DPS_6 ,Display Plane Priority 6 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 19. " DPE_5 ,Display Plane Priority 5 Enable" "Disabled,Enabled" bitfld.long 0x08 16.--18. " DPS_5 ,Display Plane Priority 5 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 15. " DPE_4 ,Display Plane Priority 4 Enable" "Disabled,Enabled" bitfld.long 0x08 12.--14. " DPS_4 ,Display Plane Priority 4 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 11. " DPE_3 ,Display Plane Priority 3 Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " DPS_3 ,Display Plane Priority 3 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 7. " DPE_2 ,Display Plane Priority 2 Enable" "Disabled,Enabled" bitfld.long 0x08 4.--6. " DPS_2 ,Display Plane Priority 2 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 3. " DPE_1 ,Display Plane Priority 1 Enable" "Disabled,Enabled" bitfld.long 0x08 0.--2. " DPS_1 ,Display Plane Priority 1 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" group.long 0x20++0x03 line.long 0x00 "DEFR_0,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR Enabling Code [0x7773]" bitfld.long 0x00 12. " EXSL ,External Sync Signal Select" "Post-divison clocks,Pre-divison clocks" bitfld.long 0x00 11. " EXVL ,External Vsync Latch Select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 8.--9. " DODF ,Display Output Data Format" "RGB,,Non-multiplexed YC,Multiplexed YC" bitfld.long 0x00 5. " EXUP ,External Updating Mode" "Internal,External" textline " " bitfld.long 0x00 4. " VCUP ,Vertical Cycle Register Update Timing Select" "Falling VSYNC,Rising VSYNC" bitfld.long 0x00 0. " DEFE ,Display Unit Extensional Function Enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "DAPCR_0,Display Alpha Ratio Plane Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code To make DAPCR accessible [0x7773]" bitfld.long 0x00 8. " AP3E ,Alpha Ratio Plane 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AP_2_E ,Alpha Ratio Plane 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AP_1_E ,Alpha Ratio Plane 1 Enable" "Disabled,Enabled" if ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)&&(((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "DEFR20,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7775]" bitfld.long 0x00 0. " DEFE_2_G ,Display Unit Extensional Function Enable SHNavi_2_G" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "DEFR30,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7776]" bitfld.long 0x00 0. " DEFE_3 ,Display Unit Extensional Function Enable from SH-Navi3" "Disabled,Enabled" group.long 0x3c++0x03 line.long 0x00 "DEFR40,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7777]" bitfld.long 0x00 5. " LRUO ,LRU Function Off" "No,Yes" rgroup.long 0x60++0x03 line.long 0x00 "DVCSR_0,Display Unit Video Capture Status Register" bitfld.long 0x00 24.--25. " VC_4_FB_1 ,Video Capture 4 Frame Buffer Flag 1" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 22.--23. " VC_3_FB_2 ,Video Capture 3 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 20.--21. " VC_2_FB_2 ,Video Capture 2 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 18.--19. " VC_1_FB_2 ,Video Capture 1 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 16.--17. " VC_0_FB_2 ,Video Capture 0 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 8.--9. " VC_4_FB ,Video Capture 4 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 6.--7. " VC_3_FB ,Video Capture 3 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 4.--5. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 2.--3. " VC_1_FB ,Video Capture 1 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 0.--1. " VC_0_FB ,Video Capture 0 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" group.long 0xE0++0x03 line.long 0x00 "DEFR50,Display Unit Extensional Function Enable Register 5" hexmask.long.byte 0x00 24.--31. 1. " CODE ,DEFR_5 Enabling Code [0x66]" bitfld.long 0x00 17. " DICE1 ,DISCOM1 Enable" "Disabled,Enabled" bitfld.long 0x00 16. " DICE0 ,DISCOM0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " YCRGB_2 ,YC-RGB Select 2" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 12.--13. " YCRGB_1 ,YC-RGB Select 1" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 10.--11. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" textline " " bitfld.long 0x00 8.--9. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 4.--5. " RGBYC0 ,RGB-YC Converted Output 0" "RGB,RGB-YC multiplexed YC,RGB-YC non-multiplexed YC,?..." bitfld.long 0x00 0. " DEFE_5 ,Display Unit Extensional Function Enable 5" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "DDLTR_0,Display Data Latency Adjustment Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DDLTR Enabling Code [0x7766]" bitfld.long 0x00 6. " DLAR_1 ,Display Data Latency Adjustment RGBYC2" "No delay,Delay" bitfld.long 0x00 5. " DLAY_1 ,Display Data Latency Adjustment YCRGB2" "No delay,Delay" textline " " bitfld.long 0x00 4. " DLAD_1 ,Display Data Latency Adjustment DRC1" "No delay,Delay" bitfld.long 0x00 1. " DLAY_0 ,Display Data Latency Adjustment YCRGB0" "No delay,Delay" bitfld.long 0x00 0. " DLAD_0 ,Display Data Latency Adjustment DRC0" "No delay,Delay" group.long 0xE8++0x03 line.long 0x00 "DEFR60,Display Unit Extensional Function Enable Register 6" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR_6 Enabling Code [0x7778]" bitfld.long 0x00 10.--11. " ODPM12 ,ODDF Pin Mode 12" "ODMP2,,DISP,CDE" bitfld.long 0x00 8.--9. " ODPM02 ,ODDF Pin Mode 02" "ODMP2,,DISP,CDE" base ad:0xFEB20000 rgroup.long 0x08++0x3 line.long 0x00 "DD_1_SSR_0,Display Unit Domain 1 Status Register 0" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame Flag" "Not occurred,Occurred" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Not occurred,Occurred" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" wgroup.long 0x0C++0x3 line.long 0x00 "DD_1_SRCR_0,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto Rendering Display Change Flag Clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto Rendering Display Change Flag Clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto Rendering Display Change Flag Clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto Rendering Display Change Flag Clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto Rendering Display Change Flag Clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto Rendering Display Change Flag Clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto Rendering Display Change Flag Clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto Rendering Display Change Flag Clear 1" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_0,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto Rendering Display Change Flag 8 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto Rendering Display Change Flag 7 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto Rendering Display Change Flag 6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto Rendering Display Change Flag 5 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto Rendering Display Change Flag 4 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto Rendering Display Change Flag 3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto Rendering Display Change Flag 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto Rendering Display Change Flag 1 Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x7 line.long 0x00 "DEF_8_R0,Display Unit Extensional FunctionControl 8 Register 0" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF_8_Rm Enabling Code" bitfld.long 0x00 1. " YCOD ,YC Off mode Output Data" "H'00,H'80" bitfld.long 0x00 0. " DEFE_8 ,Display Unit Extensional Function Enable 8" "Disabled,Enabled" line.long 0x04 "DOFLR_0,Display Unit Output Signal Fixed Level Register 0" hexmask.long.word 0x04 16.--31. 1. " CODE ,DOFLR_0 Enabling Code" bitfld.long 0x04 13. " HSYCFL_1 ,HSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 12. " VSYCFL_1 ,VSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 11. " ODDFL_1 ,ODDF (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 10. " DISPFL_1 ,DISP (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 9. " CDEFL_1 ,CDE (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 8. " RGBFL_1 ,RGB (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 5. " HSYCFL_0 ,HSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 4. " VSYCFL_0 ,VSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 3. " ODDFL_0 ,ODDF (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 2. " DISPFL_0 ,DISP (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 1. " CDEFL_0 ,CDE (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 0. " RGBFL_0 ,RGB (DU0) Signal Fixed Low Level" "Normal,Fixed low" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR Enabling Code" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 Pad Dot Clock Select" "DU1_DOTCLKIN,DU0_DOTCLKIN,DU1_DOTCLKIN,?..." textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 Pad Dot Clock Select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU0_DOTCLKIN,?..." if (((per.l(ad:0xFEB20000+0x2C))&0x02)==0x02) group.long 0x2C++0x03 line.long 0x00 "DEF9R,Display Unit Extensional Function Control 9 Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF9R Enabling Code" bitfld.long 0x00 4.--5. " DRCCS ,DRC Channel Select" "Proc0. -> DRC0/Proc1. -> DRC1,Proc0. -> DRC0/DRC1,Proc1. -> DRC0/DRC1,?..." bitfld.long 0x00 1. " DRCPS ,DRC/YCRGB Priority Mode" "DEF5R,DYCRGBCR" else group.long 0x2C++0x03 line.long 0x00 "DEF9R,Display Unit Extensional Function Control 9 Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF9R Enabling Code" bitfld.long 0x00 1. " DRCPS ,DRC/YCRGB Priority Mode" "DEF5R,DYCRGBCR" endif group.long 0x30++0x03 line.long 0x00 "DDRCCR,Display Unit DRC Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DDRCCR Enabling Code" bitfld.long 0x00 12.--14. " DRC11 ,DRC Select 11 (Superposition processor 1)" "No DRC processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 8.--10. " DRC10 ,DRC Select 10 (Superposition processor 1)" "No DRC processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." textline " " bitfld.long 0x00 4.--6. " DRC01 ,DRC Select 01 (Superposition processor 0)" "No DRC processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 0.--2. " DRC00 ,DRC Select 00 (Superposition processor 0)" "No DRC processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." group.long 0x34++0x03 line.long 0x00 "DYCRGBCR,Display Unit YCRGB Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DYCRGBCR Enabling Code" bitfld.long 0x00 12.--14. " YCRGB11 ,YCRGB Select 11 (Superposition processor 1)" "No YCRGB processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 8.--10. " YCRGB10 ,YCRGB Select 10 (Superposition processor 1)" "No YCRGB processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." textline " " bitfld.long 0x00 4.--6. " YCRGB01 ,YCRGB Select 01 (Superposition processor 0)" "No YCRGB processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 0.--2. " YCRGB00 ,YCRGB Select 00 (Superposition processor 0)" "No YCRGB processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." tree.end base ad:0xFEB00000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_0,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal Display Start" line.long 0x04 "HDER_0,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal Display End" line.long 0x08 "VDSR_0,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical Display Start" line.long 0x0c "VDER_0,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical Display End" line.long 0x10 "HCR_0,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal Cycle" line.long 0x14 "HSWR_0,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal Sync Width" line.long 0x18 "VCR_0,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical Cycle" line.long 0x1c "VSPR_0,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical Sync Point" if (((per.l(ad:0xFEB00000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_0,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal Pulse Width" line.long 0x04 "SPWR_0,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration Width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_0,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_0,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_0,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP Signal Start" line.long 0x04 "CLAMPWR_0,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP Signal Width" line.long 0x08 "DESR_0,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE Signal Start" line.long 0x0c "DEWR_0,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE Signal Width" tree.end width 11. tree "Display Attribute Registers" group.long 0x80++0xF line.long 0x0 "CP_1_TR_0,Color Palette Transparent Color Register" bitfld.long 0x0 15. " CP_1_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x0 14. " CP_1_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x0 13. " CP_1_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x0 12. " CP_1_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x0 11. " CP_1_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x0 10. " CP_1_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x0 9. " CP_1_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x0 8. " CP_1_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x0 7. " CP_1_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x0 6. " CP_1_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x0 5. " CP_1_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x0 4. " CP_1_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x0 3. " CP_1_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x0 2. " CP_1_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x0 1. " CP_1_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x0 0. " CP_1_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x4 "CP_2_TR_0,Color Palette Transparent Color Register" bitfld.long 0x4 15. " CP_2_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x4 14. " CP_2_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x4 13. " CP_2_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x4 12. " CP_2_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x4 11. " CP_2_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x4 10. " CP_2_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x4 9. " CP_2_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x4 8. " CP_2_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x4 7. " CP_2_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x4 6. " CP_2_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x4 5. " CP_2_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x4 4. " CP_2_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x4 3. " CP_2_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x4 2. " CP_2_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x4 1. " CP_2_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x4 0. " CP_2_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x8 "CP_3_TR_0,Color Palette Transparent Color Register" bitfld.long 0x8 15. " CP_3_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x8 14. " CP_3_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x8 13. " CP_3_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x8 12. " CP_3_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x8 11. " CP_3_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x8 10. " CP_3_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x8 9. " CP_3_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x8 8. " CP_3_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x8 7. " CP_3_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x8 6. " CP_3_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x8 5. " CP_3_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x8 4. " CP_3_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x8 3. " CP_3_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x8 2. " CP_3_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x8 1. " CP_3_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x8 0. " CP_3_I0 ,Color Palette Index 0" "Not set,Set" line.long 0xC "CP_4_TR_0,Color Palette Transparent Color Register" bitfld.long 0xC 15. " CP_4_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0xC 14. " CP_4_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0xC 13. " CP_4_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0xC 12. " CP_4_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0xC 11. " CP_4_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0xC 10. " CP_4_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0xC 9. " CP_4_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0xC 8. " CP_4_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0xC 7. " CP_4_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0xC 6. " CP_4_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0xC 5. " CP_4_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0xC 4. " CP_4_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0xC 3. " CP_4_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0xC 2. " CP_4_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0xC 1. " CP_4_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0xC 0. " CP_4_I0 ,Color Palette Index 0" "Not set,Set" group.long 0x90++0xF line.long 0x00 "DOOR_0,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display Off Mode Output Red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display Off Mode Output Green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display Off Mode Output Blue" line.long 0x04 "CDER_0,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color Detection Red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color Detection Green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color Detection Blue" line.long 0x08 "BPOR_0,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background Plane Output Red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background Plane Output Green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background Plane Output Blue" line.long 0x0c "RINTOFSR_0,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster Interrupt Offset" tree.end tree "Display Planes 1-8" tree "Display Plane 1" base (ad:0xFEB00000+0x100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 26.--28. " P1VISL ,Plane 1 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P1YCDF ,Plane 1 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P1TC ,Plane 1 Transparent Color" "P1TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P1SPIM ,Plane 1 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P1CPSL ,Plane 1 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P1DDF ,Plane 1 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB00000+0x100))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P1BRSL ,Plane 1 Blend Ratio Selection" "P1ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P1ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P1TC1R,Plane 1 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P1TC1 ,Plane 1 Transparent Color 1" line.long 0x04 "P1TC2R,Plane 1 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P1TC2 ,Plane 1 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P1TC3R,Plane 1 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P1TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P1TC3 ,Plane 1 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P1DDCR,Plane 1 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P1LRGB1 ,Plane 1 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P1LRGB0 ,Plane 1 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P1DDCR2,Plane 1 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P1NV21 ,Plane 1 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P1Y420 ,Plane 1 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P1DIVU ,Plane 1 UV Data from Divided YUV" "[P1MR].[P1DDF],UV data" textline " " bitfld.long 0x00 0. " P1DIVY ,Plane 1 Y Data from Divided YUV" "[P1MR].[P1DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P1PDYS ,Plane 1 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "[P1MR]/[P1LRGB1].[P1DDF] or [P1DDCR]/[P1DIVU].[P1LRGB0] or [P1DDCR2].[P1DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP1MR,Alpha Plane 1 Mode Register" bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 2" base (ad:0xFEB00000+0x200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 26.--28. " P2VISL ,Plane 2 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P2YCDF ,Plane 2 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P2TC ,Plane 2 Transparent Color" "P2TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P2SPIM ,Plane 2 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P2CPSL ,Plane 2 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P2DDF ,Plane 2 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB00000+0x200))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P2BRSL ,Plane 2 Blend Ratio Selection" "P2ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P2ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P2TC1R,Plane 2 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P2TC1 ,Plane 2 Transparent Color 1" line.long 0x04 "P2TC2R,Plane 2 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P2TC2 ,Plane 2 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P2TC3R,Plane 2 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P2TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P2TC3 ,Plane 2 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P2DDCR,Plane 2 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P2LRGB1 ,Plane 2 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P2LRGB0 ,Plane 2 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P2DDCR2,Plane 2 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P2NV21 ,Plane 2 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P2Y420 ,Plane 2 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P2DIVU ,Plane 2 UV Data from Divided YUV" "[P2MR].[P2DDF],UV data" textline " " bitfld.long 0x00 0. " P2DIVY ,Plane 2 Y Data from Divided YUV" "[P2MR].[P2DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P2PDYS ,Plane 2 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "[P2MR]/[P2LRGB1].[P2DDF] or [P2DDCR]/[P2DIVU].[P2LRGB0] or [P2DDCR2].[P2DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP2MR,Alpha Plane 2 Mode Register" bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 3" base (ad:0xFEB00000+0x300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 26.--28. " P3VISL ,Plane 3 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P3YCDF ,Plane 3 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P3TC ,Plane 3 Transparent Color" "P3TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P3SPIM ,Plane 3 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P3CPSL ,Plane 3 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P3DDF ,Plane 3 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB00000+0x300))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P3BRSL ,Plane 3 Blend Ratio Selection" "P3ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P3ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P3TC1R,Plane 3 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P3TC1 ,Plane 3 Transparent Color 1" line.long 0x04 "P3TC2R,Plane 3 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P3TC2 ,Plane 3 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P3TC3R,Plane 3 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P3TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P3TC3 ,Plane 3 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P3DDCR,Plane 3 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P3LRGB1 ,Plane 3 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P3LRGB0 ,Plane 3 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P3DDCR2,Plane 3 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P3NV21 ,Plane 3 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P3Y420 ,Plane 3 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P3DIVU ,Plane 3 UV Data from Divided YUV" "[P3MR].[P3DDF],UV data" textline " " bitfld.long 0x00 0. " P3DIVY ,Plane 3 Y Data from Divided YUV" "[P3MR].[P3DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P3PDYS ,Plane 3 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "[P3MR]/[P3LRGB1].[P3DDF] or [P3DDCR]/[P3DIVU].[P3LRGB0] or [P3DDCR2].[P3DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP3MR,Alpha Plane 3 Mode Register" bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 4" base (ad:0xFEB00000+0x400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 26.--28. " P4VISL ,Plane 4 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P4YCDF ,Plane 4 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P4TC ,Plane 4 Transparent Color" "P4TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P4SPIM ,Plane 4 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P4CPSL ,Plane 4 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P4DDF ,Plane 4 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB00000+0x400))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P4BRSL ,Plane 4 Blend Ratio Selection" "P4ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P4ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P4TC1R,Plane 4 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P4TC1 ,Plane 4 Transparent Color 1" line.long 0x04 "P4TC2R,Plane 4 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P4TC2 ,Plane 4 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P4TC3R,Plane 4 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P4TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P4TC3 ,Plane 4 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P4DDCR,Plane 4 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P4LRGB1 ,Plane 4 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P4LRGB0 ,Plane 4 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P4DDCR2,Plane 4 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P4NV21 ,Plane 4 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P4Y420 ,Plane 4 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P4DIVU ,Plane 4 UV Data from Divided YUV" "[P4MR].[P4DDF],UV data" textline " " bitfld.long 0x00 0. " P4DIVY ,Plane 4 Y Data from Divided YUV" "[P4MR].[P4DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P4PDYS ,Plane 4 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "[P4MR]/[P4LRGB1].[P4DDF] or [P4DDCR]/[P4DIVU].[P4LRGB0] or [P4DDCR2].[P4DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP4MR,Alpha Plane 4 Mode Register" bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 5" base (ad:0xFEB00000+0x500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 26.--28. " P5VISL ,Plane 5 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P5YCDF ,Plane 5 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P5TC ,Plane 5 Transparent Color" "P5TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P5SPIM ,Plane 5 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P5CPSL ,Plane 5 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P5DDF ,Plane 5 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB00000+0x500))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P5BRSL ,Plane 5 Blend Ratio Selection" "P5ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P5ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P5TC1R,Plane 5 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P5TC1 ,Plane 5 Transparent Color 1" line.long 0x04 "P5TC2R,Plane 5 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P5TC2 ,Plane 5 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P5TC3R,Plane 5 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P5TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P5TC3 ,Plane 5 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P5DDCR,Plane 5 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P5LRGB1 ,Plane 5 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P5LRGB0 ,Plane 5 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P5DDCR2,Plane 5 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P5NV21 ,Plane 5 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P5Y420 ,Plane 5 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P5DIVU ,Plane 5 UV Data from Divided YUV" "[P5MR].[P5DDF],UV data" textline " " bitfld.long 0x00 0. " P5DIVY ,Plane 5 Y Data from Divided YUV" "[P5MR].[P5DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P5PDYS ,Plane 5 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "[P5MR]/[P5LRGB1].[P5DDF] or [P5DDCR]/[P5DIVU].[P5LRGB0] or [P5DDCR2].[P5DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP5MR,Alpha Plane 5 Mode Register" bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 6" base (ad:0xFEB00000+0x600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 26.--28. " P6VISL ,Plane 6 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P6YCDF ,Plane 6 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P6TC ,Plane 6 Transparent Color" "P6TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P6SPIM ,Plane 6 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P6CPSL ,Plane 6 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P6DDF ,Plane 6 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB00000+0x600))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P6BRSL ,Plane 6 Blend Ratio Selection" "P6ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P6ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P6TC1R,Plane 6 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P6TC1 ,Plane 6 Transparent Color 1" line.long 0x04 "P6TC2R,Plane 6 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P6TC2 ,Plane 6 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P6TC3R,Plane 6 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P6TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P6TC3 ,Plane 6 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P6DDCR,Plane 6 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P6LRGB1 ,Plane 6 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P6LRGB0 ,Plane 6 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P6DDCR2,Plane 6 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P6NV21 ,Plane 6 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P6Y420 ,Plane 6 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P6DIVU ,Plane 6 UV Data from Divided YUV" "[P6MR].[P6DDF],UV data" textline " " bitfld.long 0x00 0. " P6DIVY ,Plane 6 Y Data from Divided YUV" "[P6MR].[P6DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P6PDYS ,Plane 6 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "[P6MR]/[P6LRGB1].[P6DDF] or [P6DDCR]/[P6DIVU].[P6LRGB0] or [P6DDCR2].[P6DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP6MR,Alpha Plane 6 Mode Register" bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 7" base (ad:0xFEB00000+0x700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 26.--28. " P7VISL ,Plane 7 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P7YCDF ,Plane 7 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P7TC ,Plane 7 Transparent Color" "P7TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P7SPIM ,Plane 7 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P7CPSL ,Plane 7 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P7DDF ,Plane 7 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB00000+0x700))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P7BRSL ,Plane 7 Blend Ratio Selection" "P7ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P7ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P7TC1R,Plane 7 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P7TC1 ,Plane 7 Transparent Color 1" line.long 0x04 "P7TC2R,Plane 7 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P7TC2 ,Plane 7 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P7TC3R,Plane 7 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P7TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P7TC3 ,Plane 7 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P7DDCR,Plane 7 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P7LRGB1 ,Plane 7 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P7LRGB0 ,Plane 7 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P7DDCR2,Plane 7 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P7NV21 ,Plane 7 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P7Y420 ,Plane 7 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P7DIVU ,Plane 7 UV Data from Divided YUV" "[P7MR].[P7DDF],UV data" textline " " bitfld.long 0x00 0. " P7DIVY ,Plane 7 Y Data from Divided YUV" "[P7MR].[P7DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P7PDYS ,Plane 7 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "[P7MR]/[P7LRGB1].[P7DDF] or [P7DDCR]/[P7DIVU].[P7LRGB0] or [P7DDCR2].[P7DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP7MR,Alpha Plane 7 Mode Register" bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Display Plane 8" base (ad:0xFEB00000+0x800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 26.--28. " P8VISL ,Plane 8 Viedo Input Select" "VIN0,VIN1,VIN2,VIN3,VIN4,?..." textline " " bitfld.long 0x00 20. " P8YCDF ,Plane 8 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P8TC ,Plane 8 Transparent Color" "P8TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P8SPIM ,Plane 8 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P8CPSL ,Plane 8 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No changed,Changed" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P8DDF ,Plane 8 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB00000+0x800))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless of A,Regardless of A" textline " " bitfld.long 0x00 8.--10. " P8BRSL ,Plane 8 Blend Ratio Selection" "P8ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,P8ALPHA,,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P8TC1R,Plane 8 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P8TC1 ,Plane 8 Transparent Color 1" line.long 0x04 "P8TC2R,Plane 8 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P8TC2 ,Plane 8 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P8TC3R,Plane 8 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P8TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P8TC3 ,Plane 8 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P8DDCR,Plane 8 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P8LRGB1 ,Plane 8 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P8LRGB0 ,Plane 8 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P8DDCR2,Plane 8 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P8NV21 ,Plane 8 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P8Y420 ,Plane 8 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P8DIVU ,Plane 8 UV Data from Divided YUV" "[P8MR].[P8DDF],UV data" textline " " bitfld.long 0x00 0. " P8DIVY ,Plane 8 Y Data from Divided YUV" "[P8MR].[P8DDF],Y data" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P8PDYS ,Plane 8 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "[P8MR]/[P8LRGB1].[P8DDF] or [P8DDCR]/[P8DIVU].[P8LRGB0] or [P8DDCR2].[P8DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP8MR,Alpha Plane 8 Mode Register" bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree.end tree "Alpha-Ratio Planes 1-8" tree "Alpha-Ratio Plane 1" base (ad:0xFEB00000+0xA100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P1PDYS ,Plane 1 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "[P1MR]/[P1LRGB1].[P1DDF] or [P1DDCR]/[P1DIVU].[P1LRGB0] or [P1DDCR2].[P1DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP1MR,Alpha Plane 1 Mode Register" bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 2" base (ad:0xFEB00000+0xA200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P2PDYS ,Plane 2 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "[P2MR]/[P2LRGB1].[P2DDF] or [P2DDCR]/[P2DIVU].[P2LRGB0] or [P2DDCR2].[P2DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP2MR,Alpha Plane 2 Mode Register" bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 3" base (ad:0xFEB00000+0xA300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P3PDYS ,Plane 3 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "[P3MR]/[P3LRGB1].[P3DDF] or [P3DDCR]/[P3DIVU].[P3LRGB0] or [P3DDCR2].[P3DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP3MR,Alpha Plane 3 Mode Register" bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 4" base (ad:0xFEB00000+0xA400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P4PDYS ,Plane 4 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "[P4MR]/[P4LRGB1].[P4DDF] or [P4DDCR]/[P4DIVU].[P4LRGB0] or [P4DDCR2].[P4DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP4MR,Alpha Plane 4 Mode Register" bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 5" base (ad:0xFEB00000+0xA500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P5PDYS ,Plane 5 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "[P5MR]/[P5LRGB1].[P5DDF] or [P5DDCR]/[P5DIVU].[P5LRGB0] or [P5DDCR2].[P5DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP5MR,Alpha Plane 5 Mode Register" bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 6" base (ad:0xFEB00000+0xA600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P6PDYS ,Plane 6 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "[P6MR]/[P6LRGB1].[P6DDF] or [P6DDCR]/[P6DIVU].[P6LRGB0] or [P6DDCR2].[P6DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP6MR,Alpha Plane 6 Mode Register" bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 7" base (ad:0xFEB00000+0xA700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P7PDYS ,Plane 7 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "[P7MR]/[P7LRGB1].[P7DDF] or [P7DDCR]/[P7DIVU].[P7LRGB0] or [P7DDCR2].[P7DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP7MR,Alpha Plane 7 Mode Register" bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree "Alpha-Ratio Plane 8" base (ad:0xFEB00000+0xA800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" bitfld.long 0x00 15. " P8PDYS ,Plane 8 Display Output YC Format Select" "RGB,YC" bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 Select" "Memory,VSP1" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "[P8MR]/[P8LRGB1].[P8DDF] or [P8DDCR]/[P8DIVU].[P8LRGB0] or [P8DDCR2].[P8DIVY],ARGB8888,RGB888,RGB666,?..." group.long 0xA000++0x03 line.long 0x00 "AP8MR,Alpha Plane 8 Mode Register" bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap-Around Enable" "Disabled,Enabled" bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "Not changed,Changed" bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual,,Auto,?..." width 0xb tree.end tree.end base ad:0xFEB00000 tree "Display Capture Registers" tree "Display Capture 1 Registers" group.long 0xC100++0x7 line.long 0x00 "DC1MR,Display Capture 1 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC1MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC1AR ,Display Capture 1 Alpha Ratio" bitfld.long 0x00 0. " DC1DF ,Display Capture 1 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC1MWR,Display Capture 1 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC1MWX ,Display Capture 1 Memory Width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC1SA ,Display Capture 1 Area Start Address" else group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC1SA ,Display Capture 1 Area Start Address" endif group.long (0xC100+0x50)++0x03 line.long 0x00 "DC1MLR,Display Capture 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC1MLY ,Display Capture 1 Memory Length Y" tree.end tree "Display Capture 2 Registers" group.long 0xC200++0x7 line.long 0x00 "DC2MR,Display Capture 2 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC2MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC2AR ,Display Capture 2 Alpha Ratio" bitfld.long 0x00 0. " DC2DF ,Display Capture 2 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC2MWR,Display Capture 2 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC2MWX ,Display Capture 2 Memory Width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC2SA ,Display Capture 2 Area Start Address" else group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC2SA ,Display Capture 2 Area Start Address" endif group.long (0xC200+0x50)++0x03 line.long 0x00 "DC2MLR,Display Capture 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC2MLY ,Display Capture 2 Memory Length Y" tree.end tree.end tree "Color Palette 1 Registers" width 10. group.long 0x1000++0x3ff line.long 0x0 "CP1_0R,Color Palette 1 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP1_0A ,Color Palette 1_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP1_0R ,Color Palette 1_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP1_0G ,Color Palette 1_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP1_0B ,Color Palette 1_0 Blue" line.long 0x4 "CP1_1R,Color Palette 1 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP1_1A ,Color Palette 1_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP1_1R ,Color Palette 1_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP1_1G ,Color Palette 1_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP1_1B ,Color Palette 1_1 Blue" line.long 0x8 "CP1_2R,Color Palette 1 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP1_2A ,Color Palette 1_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP1_2R ,Color Palette 1_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP1_2G ,Color Palette 1_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP1_2B ,Color Palette 1_2 Blue" line.long 0xC "CP1_3R,Color Palette 1 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP1_3A ,Color Palette 1_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP1_3R ,Color Palette 1_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP1_3G ,Color Palette 1_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP1_3B ,Color Palette 1_3 Blue" line.long 0x10 "CP1_4R,Color Palette 1 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP1_4A ,Color Palette 1_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP1_4R ,Color Palette 1_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP1_4G ,Color Palette 1_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP1_4B ,Color Palette 1_4 Blue" line.long 0x14 "CP1_5R,Color Palette 1 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP1_5A ,Color Palette 1_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP1_5R ,Color Palette 1_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP1_5G ,Color Palette 1_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP1_5B ,Color Palette 1_5 Blue" line.long 0x18 "CP1_6R,Color Palette 1 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP1_6A ,Color Palette 1_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP1_6R ,Color Palette 1_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP1_6G ,Color Palette 1_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP1_6B ,Color Palette 1_6 Blue" line.long 0x1C "CP1_7R,Color Palette 1 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP1_7A ,Color Palette 1_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP1_7R ,Color Palette 1_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP1_7G ,Color Palette 1_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP1_7B ,Color Palette 1_7 Blue" line.long 0x20 "CP1_8R,Color Palette 1 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP1_8A ,Color Palette 1_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP1_8R ,Color Palette 1_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP1_8G ,Color Palette 1_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP1_8B ,Color Palette 1_8 Blue" line.long 0x24 "CP1_9R,Color Palette 1 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP1_9A ,Color Palette 1_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP1_9R ,Color Palette 1_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP1_9G ,Color Palette 1_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP1_9B ,Color Palette 1_9 Blue" line.long 0x28 "CP1_10R,Color Palette 1 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP1_10A ,Color Palette 1_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP1_10R ,Color Palette 1_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP1_10G ,Color Palette 1_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP1_10B ,Color Palette 1_10 Blue" line.long 0x2C "CP1_11R,Color Palette 1 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP1_11A ,Color Palette 1_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP1_11R ,Color Palette 1_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP1_11G ,Color Palette 1_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP1_11B ,Color Palette 1_11 Blue" line.long 0x30 "CP1_12R,Color Palette 1 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP1_12A ,Color Palette 1_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP1_12R ,Color Palette 1_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP1_12G ,Color Palette 1_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP1_12B ,Color Palette 1_12 Blue" line.long 0x34 "CP1_13R,Color Palette 1 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP1_13A ,Color Palette 1_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP1_13R ,Color Palette 1_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP1_13G ,Color Palette 1_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP1_13B ,Color Palette 1_13 Blue" line.long 0x38 "CP1_14R,Color Palette 1 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP1_14A ,Color Palette 1_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP1_14R ,Color Palette 1_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP1_14G ,Color Palette 1_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP1_14B ,Color Palette 1_14 Blue" line.long 0x3C "CP1_15R,Color Palette 1 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP1_15A ,Color Palette 1_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP1_15R ,Color Palette 1_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP1_15G ,Color Palette 1_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP1_15B ,Color Palette 1_15 Blue" line.long 0x40 "CP1_16R,Color Palette 1 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP1_16A ,Color Palette 1_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP1_16R ,Color Palette 1_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP1_16G ,Color Palette 1_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP1_16B ,Color Palette 1_16 Blue" line.long 0x44 "CP1_17R,Color Palette 1 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP1_17A ,Color Palette 1_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP1_17R ,Color Palette 1_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP1_17G ,Color Palette 1_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP1_17B ,Color Palette 1_17 Blue" line.long 0x48 "CP1_18R,Color Palette 1 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP1_18A ,Color Palette 1_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP1_18R ,Color Palette 1_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP1_18G ,Color Palette 1_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP1_18B ,Color Palette 1_18 Blue" line.long 0x4C "CP1_19R,Color Palette 1 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP1_19A ,Color Palette 1_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP1_19R ,Color Palette 1_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP1_19G ,Color Palette 1_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP1_19B ,Color Palette 1_19 Blue" line.long 0x50 "CP1_20R,Color Palette 1 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP1_20A ,Color Palette 1_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP1_20R ,Color Palette 1_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP1_20G ,Color Palette 1_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP1_20B ,Color Palette 1_20 Blue" line.long 0x54 "CP1_21R,Color Palette 1 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP1_21A ,Color Palette 1_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP1_21R ,Color Palette 1_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP1_21G ,Color Palette 1_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP1_21B ,Color Palette 1_21 Blue" line.long 0x58 "CP1_22R,Color Palette 1 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP1_22A ,Color Palette 1_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP1_22R ,Color Palette 1_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP1_22G ,Color Palette 1_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP1_22B ,Color Palette 1_22 Blue" line.long 0x5C "CP1_23R,Color Palette 1 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP1_23A ,Color Palette 1_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP1_23R ,Color Palette 1_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP1_23G ,Color Palette 1_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP1_23B ,Color Palette 1_23 Blue" line.long 0x60 "CP1_24R,Color Palette 1 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP1_24A ,Color Palette 1_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP1_24R ,Color Palette 1_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP1_24G ,Color Palette 1_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP1_24B ,Color Palette 1_24 Blue" line.long 0x64 "CP1_25R,Color Palette 1 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP1_25A ,Color Palette 1_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP1_25R ,Color Palette 1_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP1_25G ,Color Palette 1_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP1_25B ,Color Palette 1_25 Blue" line.long 0x68 "CP1_26R,Color Palette 1 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP1_26A ,Color Palette 1_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP1_26R ,Color Palette 1_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP1_26G ,Color Palette 1_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP1_26B ,Color Palette 1_26 Blue" line.long 0x6C "CP1_27R,Color Palette 1 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP1_27A ,Color Palette 1_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP1_27R ,Color Palette 1_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP1_27G ,Color Palette 1_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP1_27B ,Color Palette 1_27 Blue" line.long 0x70 "CP1_28R,Color Palette 1 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP1_28A ,Color Palette 1_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP1_28R ,Color Palette 1_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP1_28G ,Color Palette 1_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP1_28B ,Color Palette 1_28 Blue" line.long 0x74 "CP1_29R,Color Palette 1 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP1_29A ,Color Palette 1_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP1_29R ,Color Palette 1_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP1_29G ,Color Palette 1_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP1_29B ,Color Palette 1_29 Blue" line.long 0x78 "CP1_30R,Color Palette 1 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP1_30A ,Color Palette 1_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP1_30R ,Color Palette 1_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP1_30G ,Color Palette 1_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP1_30B ,Color Palette 1_30 Blue" line.long 0x7C "CP1_31R,Color Palette 1 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP1_31A ,Color Palette 1_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP1_31R ,Color Palette 1_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP1_31G ,Color Palette 1_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP1_31B ,Color Palette 1_31 Blue" line.long 0x80 "CP1_32R,Color Palette 1 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP1_32A ,Color Palette 1_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP1_32R ,Color Palette 1_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP1_32G ,Color Palette 1_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP1_32B ,Color Palette 1_32 Blue" line.long 0x84 "CP1_33R,Color Palette 1 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP1_33A ,Color Palette 1_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP1_33R ,Color Palette 1_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP1_33G ,Color Palette 1_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP1_33B ,Color Palette 1_33 Blue" line.long 0x88 "CP1_34R,Color Palette 1 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP1_34A ,Color Palette 1_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP1_34R ,Color Palette 1_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP1_34G ,Color Palette 1_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP1_34B ,Color Palette 1_34 Blue" line.long 0x8C "CP1_35R,Color Palette 1 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP1_35A ,Color Palette 1_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP1_35R ,Color Palette 1_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP1_35G ,Color Palette 1_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP1_35B ,Color Palette 1_35 Blue" line.long 0x90 "CP1_36R,Color Palette 1 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP1_36A ,Color Palette 1_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP1_36R ,Color Palette 1_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP1_36G ,Color Palette 1_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP1_36B ,Color Palette 1_36 Blue" line.long 0x94 "CP1_37R,Color Palette 1 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP1_37A ,Color Palette 1_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP1_37R ,Color Palette 1_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP1_37G ,Color Palette 1_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP1_37B ,Color Palette 1_37 Blue" line.long 0x98 "CP1_38R,Color Palette 1 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP1_38A ,Color Palette 1_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP1_38R ,Color Palette 1_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP1_38G ,Color Palette 1_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP1_38B ,Color Palette 1_38 Blue" line.long 0x9C "CP1_39R,Color Palette 1 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP1_39A ,Color Palette 1_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP1_39R ,Color Palette 1_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP1_39G ,Color Palette 1_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP1_39B ,Color Palette 1_39 Blue" line.long 0xA0 "CP1_40R,Color Palette 1 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP1_40A ,Color Palette 1_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP1_40R ,Color Palette 1_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP1_40G ,Color Palette 1_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP1_40B ,Color Palette 1_40 Blue" line.long 0xA4 "CP1_41R,Color Palette 1 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP1_41A ,Color Palette 1_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP1_41R ,Color Palette 1_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP1_41G ,Color Palette 1_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP1_41B ,Color Palette 1_41 Blue" line.long 0xA8 "CP1_42R,Color Palette 1 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP1_42A ,Color Palette 1_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP1_42R ,Color Palette 1_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP1_42G ,Color Palette 1_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP1_42B ,Color Palette 1_42 Blue" line.long 0xAC "CP1_43R,Color Palette 1 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP1_43A ,Color Palette 1_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP1_43R ,Color Palette 1_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP1_43G ,Color Palette 1_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP1_43B ,Color Palette 1_43 Blue" line.long 0xB0 "CP1_44R,Color Palette 1 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP1_44A ,Color Palette 1_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP1_44R ,Color Palette 1_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP1_44G ,Color Palette 1_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP1_44B ,Color Palette 1_44 Blue" line.long 0xB4 "CP1_45R,Color Palette 1 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP1_45A ,Color Palette 1_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP1_45R ,Color Palette 1_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP1_45G ,Color Palette 1_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP1_45B ,Color Palette 1_45 Blue" line.long 0xB8 "CP1_46R,Color Palette 1 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP1_46A ,Color Palette 1_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP1_46R ,Color Palette 1_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP1_46G ,Color Palette 1_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP1_46B ,Color Palette 1_46 Blue" line.long 0xBC "CP1_47R,Color Palette 1 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP1_47A ,Color Palette 1_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP1_47R ,Color Palette 1_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP1_47G ,Color Palette 1_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP1_47B ,Color Palette 1_47 Blue" line.long 0xC0 "CP1_48R,Color Palette 1 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP1_48A ,Color Palette 1_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP1_48R ,Color Palette 1_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP1_48G ,Color Palette 1_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP1_48B ,Color Palette 1_48 Blue" line.long 0xC4 "CP1_49R,Color Palette 1 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP1_49A ,Color Palette 1_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP1_49R ,Color Palette 1_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP1_49G ,Color Palette 1_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP1_49B ,Color Palette 1_49 Blue" line.long 0xC8 "CP1_50R,Color Palette 1 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP1_50A ,Color Palette 1_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP1_50R ,Color Palette 1_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP1_50G ,Color Palette 1_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP1_50B ,Color Palette 1_50 Blue" line.long 0xCC "CP1_51R,Color Palette 1 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP1_51A ,Color Palette 1_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP1_51R ,Color Palette 1_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP1_51G ,Color Palette 1_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP1_51B ,Color Palette 1_51 Blue" line.long 0xD0 "CP1_52R,Color Palette 1 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP1_52A ,Color Palette 1_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP1_52R ,Color Palette 1_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP1_52G ,Color Palette 1_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP1_52B ,Color Palette 1_52 Blue" line.long 0xD4 "CP1_53R,Color Palette 1 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP1_53A ,Color Palette 1_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP1_53R ,Color Palette 1_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP1_53G ,Color Palette 1_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP1_53B ,Color Palette 1_53 Blue" line.long 0xD8 "CP1_54R,Color Palette 1 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP1_54A ,Color Palette 1_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP1_54R ,Color Palette 1_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP1_54G ,Color Palette 1_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP1_54B ,Color Palette 1_54 Blue" line.long 0xDC "CP1_55R,Color Palette 1 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP1_55A ,Color Palette 1_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP1_55R ,Color Palette 1_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP1_55G ,Color Palette 1_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP1_55B ,Color Palette 1_55 Blue" line.long 0xE0 "CP1_56R,Color Palette 1 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP1_56A ,Color Palette 1_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP1_56R ,Color Palette 1_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP1_56G ,Color Palette 1_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP1_56B ,Color Palette 1_56 Blue" line.long 0xE4 "CP1_57R,Color Palette 1 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP1_57A ,Color Palette 1_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP1_57R ,Color Palette 1_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP1_57G ,Color Palette 1_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP1_57B ,Color Palette 1_57 Blue" line.long 0xE8 "CP1_58R,Color Palette 1 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP1_58A ,Color Palette 1_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP1_58R ,Color Palette 1_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP1_58G ,Color Palette 1_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP1_58B ,Color Palette 1_58 Blue" line.long 0xEC "CP1_59R,Color Palette 1 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP1_59A ,Color Palette 1_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP1_59R ,Color Palette 1_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP1_59G ,Color Palette 1_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP1_59B ,Color Palette 1_59 Blue" line.long 0xF0 "CP1_60R,Color Palette 1 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP1_60A ,Color Palette 1_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP1_60R ,Color Palette 1_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP1_60G ,Color Palette 1_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP1_60B ,Color Palette 1_60 Blue" line.long 0xF4 "CP1_61R,Color Palette 1 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP1_61A ,Color Palette 1_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP1_61R ,Color Palette 1_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP1_61G ,Color Palette 1_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP1_61B ,Color Palette 1_61 Blue" line.long 0xF8 "CP1_62R,Color Palette 1 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP1_62A ,Color Palette 1_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP1_62R ,Color Palette 1_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP1_62G ,Color Palette 1_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP1_62B ,Color Palette 1_62 Blue" line.long 0xFC "CP1_63R,Color Palette 1 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP1_63A ,Color Palette 1_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP1_63R ,Color Palette 1_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP1_63G ,Color Palette 1_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP1_63B ,Color Palette 1_63 Blue" line.long 0x100 "CP1_64R,Color Palette 1 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP1_64A ,Color Palette 1_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP1_64R ,Color Palette 1_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP1_64G ,Color Palette 1_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP1_64B ,Color Palette 1_64 Blue" line.long 0x104 "CP1_65R,Color Palette 1 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP1_65A ,Color Palette 1_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP1_65R ,Color Palette 1_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP1_65G ,Color Palette 1_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP1_65B ,Color Palette 1_65 Blue" line.long 0x108 "CP1_66R,Color Palette 1 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP1_66A ,Color Palette 1_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP1_66R ,Color Palette 1_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP1_66G ,Color Palette 1_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP1_66B ,Color Palette 1_66 Blue" line.long 0x10C "CP1_67R,Color Palette 1 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP1_67A ,Color Palette 1_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP1_67R ,Color Palette 1_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP1_67G ,Color Palette 1_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP1_67B ,Color Palette 1_67 Blue" line.long 0x110 "CP1_68R,Color Palette 1 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP1_68A ,Color Palette 1_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP1_68R ,Color Palette 1_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP1_68G ,Color Palette 1_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP1_68B ,Color Palette 1_68 Blue" line.long 0x114 "CP1_69R,Color Palette 1 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP1_69A ,Color Palette 1_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP1_69R ,Color Palette 1_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP1_69G ,Color Palette 1_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP1_69B ,Color Palette 1_69 Blue" line.long 0x118 "CP1_70R,Color Palette 1 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP1_70A ,Color Palette 1_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP1_70R ,Color Palette 1_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP1_70G ,Color Palette 1_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP1_70B ,Color Palette 1_70 Blue" line.long 0x11C "CP1_71R,Color Palette 1 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP1_71A ,Color Palette 1_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP1_71R ,Color Palette 1_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP1_71G ,Color Palette 1_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP1_71B ,Color Palette 1_71 Blue" line.long 0x120 "CP1_72R,Color Palette 1 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP1_72A ,Color Palette 1_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP1_72R ,Color Palette 1_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP1_72G ,Color Palette 1_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP1_72B ,Color Palette 1_72 Blue" line.long 0x124 "CP1_73R,Color Palette 1 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP1_73A ,Color Palette 1_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP1_73R ,Color Palette 1_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP1_73G ,Color Palette 1_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP1_73B ,Color Palette 1_73 Blue" line.long 0x128 "CP1_74R,Color Palette 1 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP1_74A ,Color Palette 1_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP1_74R ,Color Palette 1_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP1_74G ,Color Palette 1_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP1_74B ,Color Palette 1_74 Blue" line.long 0x12C "CP1_75R,Color Palette 1 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP1_75A ,Color Palette 1_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP1_75R ,Color Palette 1_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP1_75G ,Color Palette 1_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP1_75B ,Color Palette 1_75 Blue" line.long 0x130 "CP1_76R,Color Palette 1 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP1_76A ,Color Palette 1_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP1_76R ,Color Palette 1_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP1_76G ,Color Palette 1_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP1_76B ,Color Palette 1_76 Blue" line.long 0x134 "CP1_77R,Color Palette 1 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP1_77A ,Color Palette 1_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP1_77R ,Color Palette 1_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP1_77G ,Color Palette 1_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP1_77B ,Color Palette 1_77 Blue" line.long 0x138 "CP1_78R,Color Palette 1 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP1_78A ,Color Palette 1_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP1_78R ,Color Palette 1_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP1_78G ,Color Palette 1_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP1_78B ,Color Palette 1_78 Blue" line.long 0x13C "CP1_79R,Color Palette 1 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP1_79A ,Color Palette 1_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP1_79R ,Color Palette 1_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP1_79G ,Color Palette 1_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP1_79B ,Color Palette 1_79 Blue" line.long 0x140 "CP1_80R,Color Palette 1 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP1_80A ,Color Palette 1_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP1_80R ,Color Palette 1_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP1_80G ,Color Palette 1_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP1_80B ,Color Palette 1_80 Blue" line.long 0x144 "CP1_81R,Color Palette 1 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP1_81A ,Color Palette 1_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP1_81R ,Color Palette 1_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP1_81G ,Color Palette 1_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP1_81B ,Color Palette 1_81 Blue" line.long 0x148 "CP1_82R,Color Palette 1 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP1_82A ,Color Palette 1_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP1_82R ,Color Palette 1_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP1_82G ,Color Palette 1_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP1_82B ,Color Palette 1_82 Blue" line.long 0x14C "CP1_83R,Color Palette 1 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP1_83A ,Color Palette 1_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP1_83R ,Color Palette 1_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP1_83G ,Color Palette 1_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP1_83B ,Color Palette 1_83 Blue" line.long 0x150 "CP1_84R,Color Palette 1 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP1_84A ,Color Palette 1_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP1_84R ,Color Palette 1_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP1_84G ,Color Palette 1_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP1_84B ,Color Palette 1_84 Blue" line.long 0x154 "CP1_85R,Color Palette 1 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP1_85A ,Color Palette 1_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP1_85R ,Color Palette 1_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP1_85G ,Color Palette 1_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP1_85B ,Color Palette 1_85 Blue" line.long 0x158 "CP1_86R,Color Palette 1 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP1_86A ,Color Palette 1_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP1_86R ,Color Palette 1_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP1_86G ,Color Palette 1_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP1_86B ,Color Palette 1_86 Blue" line.long 0x15C "CP1_87R,Color Palette 1 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP1_87A ,Color Palette 1_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP1_87R ,Color Palette 1_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP1_87G ,Color Palette 1_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP1_87B ,Color Palette 1_87 Blue" line.long 0x160 "CP1_88R,Color Palette 1 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP1_88A ,Color Palette 1_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP1_88R ,Color Palette 1_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP1_88G ,Color Palette 1_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP1_88B ,Color Palette 1_88 Blue" line.long 0x164 "CP1_89R,Color Palette 1 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP1_89A ,Color Palette 1_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP1_89R ,Color Palette 1_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP1_89G ,Color Palette 1_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP1_89B ,Color Palette 1_89 Blue" line.long 0x168 "CP1_90R,Color Palette 1 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP1_90A ,Color Palette 1_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP1_90R ,Color Palette 1_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP1_90G ,Color Palette 1_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP1_90B ,Color Palette 1_90 Blue" line.long 0x16C "CP1_91R,Color Palette 1 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP1_91A ,Color Palette 1_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP1_91R ,Color Palette 1_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP1_91G ,Color Palette 1_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP1_91B ,Color Palette 1_91 Blue" line.long 0x170 "CP1_92R,Color Palette 1 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP1_92A ,Color Palette 1_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP1_92R ,Color Palette 1_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP1_92G ,Color Palette 1_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP1_92B ,Color Palette 1_92 Blue" line.long 0x174 "CP1_93R,Color Palette 1 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP1_93A ,Color Palette 1_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP1_93R ,Color Palette 1_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP1_93G ,Color Palette 1_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP1_93B ,Color Palette 1_93 Blue" line.long 0x178 "CP1_94R,Color Palette 1 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP1_94A ,Color Palette 1_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP1_94R ,Color Palette 1_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP1_94G ,Color Palette 1_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP1_94B ,Color Palette 1_94 Blue" line.long 0x17C "CP1_95R,Color Palette 1 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP1_95A ,Color Palette 1_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP1_95R ,Color Palette 1_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP1_95G ,Color Palette 1_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP1_95B ,Color Palette 1_95 Blue" line.long 0x180 "CP1_96R,Color Palette 1 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP1_96A ,Color Palette 1_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP1_96R ,Color Palette 1_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP1_96G ,Color Palette 1_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP1_96B ,Color Palette 1_96 Blue" line.long 0x184 "CP1_97R,Color Palette 1 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP1_97A ,Color Palette 1_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP1_97R ,Color Palette 1_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP1_97G ,Color Palette 1_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP1_97B ,Color Palette 1_97 Blue" line.long 0x188 "CP1_98R,Color Palette 1 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP1_98A ,Color Palette 1_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP1_98R ,Color Palette 1_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP1_98G ,Color Palette 1_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP1_98B ,Color Palette 1_98 Blue" line.long 0x18C "CP1_99R,Color Palette 1 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP1_99A ,Color Palette 1_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP1_99R ,Color Palette 1_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP1_99G ,Color Palette 1_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP1_99B ,Color Palette 1_99 Blue" line.long 0x190 "CP1_100R,Color Palette 1 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP1_100A ,Color Palette 1_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP1_100R ,Color Palette 1_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP1_100G ,Color Palette 1_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP1_100B ,Color Palette 1_100 Blue" line.long 0x194 "CP1_101R,Color Palette 1 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP1_101A ,Color Palette 1_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP1_101R ,Color Palette 1_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP1_101G ,Color Palette 1_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP1_101B ,Color Palette 1_101 Blue" line.long 0x198 "CP1_102R,Color Palette 1 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP1_102A ,Color Palette 1_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP1_102R ,Color Palette 1_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP1_102G ,Color Palette 1_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP1_102B ,Color Palette 1_102 Blue" line.long 0x19C "CP1_103R,Color Palette 1 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP1_103A ,Color Palette 1_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP1_103R ,Color Palette 1_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP1_103G ,Color Palette 1_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP1_103B ,Color Palette 1_103 Blue" line.long 0x1A0 "CP1_104R,Color Palette 1 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP1_104A ,Color Palette 1_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP1_104R ,Color Palette 1_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP1_104G ,Color Palette 1_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP1_104B ,Color Palette 1_104 Blue" line.long 0x1A4 "CP1_105R,Color Palette 1 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP1_105A ,Color Palette 1_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP1_105R ,Color Palette 1_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP1_105G ,Color Palette 1_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP1_105B ,Color Palette 1_105 Blue" line.long 0x1A8 "CP1_106R,Color Palette 1 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP1_106A ,Color Palette 1_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP1_106R ,Color Palette 1_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP1_106G ,Color Palette 1_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP1_106B ,Color Palette 1_106 Blue" line.long 0x1AC "CP1_107R,Color Palette 1 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP1_107A ,Color Palette 1_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP1_107R ,Color Palette 1_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP1_107G ,Color Palette 1_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP1_107B ,Color Palette 1_107 Blue" line.long 0x1B0 "CP1_108R,Color Palette 1 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP1_108A ,Color Palette 1_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP1_108R ,Color Palette 1_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP1_108G ,Color Palette 1_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP1_108B ,Color Palette 1_108 Blue" line.long 0x1B4 "CP1_109R,Color Palette 1 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP1_109A ,Color Palette 1_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP1_109R ,Color Palette 1_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP1_109G ,Color Palette 1_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP1_109B ,Color Palette 1_109 Blue" line.long 0x1B8 "CP1_110R,Color Palette 1 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP1_110A ,Color Palette 1_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP1_110R ,Color Palette 1_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP1_110G ,Color Palette 1_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP1_110B ,Color Palette 1_110 Blue" line.long 0x1BC "CP1_111R,Color Palette 1 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP1_111A ,Color Palette 1_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP1_111R ,Color Palette 1_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP1_111G ,Color Palette 1_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP1_111B ,Color Palette 1_111 Blue" line.long 0x1C0 "CP1_112R,Color Palette 1 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP1_112A ,Color Palette 1_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP1_112R ,Color Palette 1_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP1_112G ,Color Palette 1_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP1_112B ,Color Palette 1_112 Blue" line.long 0x1C4 "CP1_113R,Color Palette 1 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP1_113A ,Color Palette 1_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP1_113R ,Color Palette 1_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP1_113G ,Color Palette 1_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP1_113B ,Color Palette 1_113 Blue" line.long 0x1C8 "CP1_114R,Color Palette 1 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP1_114A ,Color Palette 1_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP1_114R ,Color Palette 1_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP1_114G ,Color Palette 1_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP1_114B ,Color Palette 1_114 Blue" line.long 0x1CC "CP1_115R,Color Palette 1 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP1_115A ,Color Palette 1_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP1_115R ,Color Palette 1_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP1_115G ,Color Palette 1_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP1_115B ,Color Palette 1_115 Blue" line.long 0x1D0 "CP1_116R,Color Palette 1 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP1_116A ,Color Palette 1_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP1_116R ,Color Palette 1_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP1_116G ,Color Palette 1_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP1_116B ,Color Palette 1_116 Blue" line.long 0x1D4 "CP1_117R,Color Palette 1 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP1_117A ,Color Palette 1_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP1_117R ,Color Palette 1_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP1_117G ,Color Palette 1_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP1_117B ,Color Palette 1_117 Blue" line.long 0x1D8 "CP1_118R,Color Palette 1 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP1_118A ,Color Palette 1_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP1_118R ,Color Palette 1_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP1_118G ,Color Palette 1_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP1_118B ,Color Palette 1_118 Blue" line.long 0x1DC "CP1_119R,Color Palette 1 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP1_119A ,Color Palette 1_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP1_119R ,Color Palette 1_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP1_119G ,Color Palette 1_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP1_119B ,Color Palette 1_119 Blue" line.long 0x1E0 "CP1_120R,Color Palette 1 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP1_120A ,Color Palette 1_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP1_120R ,Color Palette 1_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP1_120G ,Color Palette 1_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP1_120B ,Color Palette 1_120 Blue" line.long 0x1E4 "CP1_121R,Color Palette 1 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP1_121A ,Color Palette 1_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP1_121R ,Color Palette 1_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP1_121G ,Color Palette 1_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP1_121B ,Color Palette 1_121 Blue" line.long 0x1E8 "CP1_122R,Color Palette 1 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP1_122A ,Color Palette 1_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP1_122R ,Color Palette 1_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP1_122G ,Color Palette 1_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP1_122B ,Color Palette 1_122 Blue" line.long 0x1EC "CP1_123R,Color Palette 1 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP1_123A ,Color Palette 1_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP1_123R ,Color Palette 1_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP1_123G ,Color Palette 1_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP1_123B ,Color Palette 1_123 Blue" line.long 0x1F0 "CP1_124R,Color Palette 1 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP1_124A ,Color Palette 1_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP1_124R ,Color Palette 1_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP1_124G ,Color Palette 1_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP1_124B ,Color Palette 1_124 Blue" line.long 0x1F4 "CP1_125R,Color Palette 1 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP1_125A ,Color Palette 1_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP1_125R ,Color Palette 1_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP1_125G ,Color Palette 1_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP1_125B ,Color Palette 1_125 Blue" line.long 0x1F8 "CP1_126R,Color Palette 1 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP1_126A ,Color Palette 1_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP1_126R ,Color Palette 1_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP1_126G ,Color Palette 1_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP1_126B ,Color Palette 1_126 Blue" line.long 0x1FC "CP1_127R,Color Palette 1 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP1_127A ,Color Palette 1_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP1_127R ,Color Palette 1_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP1_127G ,Color Palette 1_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP1_127B ,Color Palette 1_127 Blue" line.long 0x200 "CP1_128R,Color Palette 1 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP1_128A ,Color Palette 1_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP1_128R ,Color Palette 1_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP1_128G ,Color Palette 1_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP1_128B ,Color Palette 1_128 Blue" line.long 0x204 "CP1_129R,Color Palette 1 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP1_129A ,Color Palette 1_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP1_129R ,Color Palette 1_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP1_129G ,Color Palette 1_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP1_129B ,Color Palette 1_129 Blue" line.long 0x208 "CP1_130R,Color Palette 1 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP1_130A ,Color Palette 1_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP1_130R ,Color Palette 1_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP1_130G ,Color Palette 1_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP1_130B ,Color Palette 1_130 Blue" line.long 0x20C "CP1_131R,Color Palette 1 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP1_131A ,Color Palette 1_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP1_131R ,Color Palette 1_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP1_131G ,Color Palette 1_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP1_131B ,Color Palette 1_131 Blue" line.long 0x210 "CP1_132R,Color Palette 1 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP1_132A ,Color Palette 1_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP1_132R ,Color Palette 1_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP1_132G ,Color Palette 1_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP1_132B ,Color Palette 1_132 Blue" line.long 0x214 "CP1_133R,Color Palette 1 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP1_133A ,Color Palette 1_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP1_133R ,Color Palette 1_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP1_133G ,Color Palette 1_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP1_133B ,Color Palette 1_133 Blue" line.long 0x218 "CP1_134R,Color Palette 1 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP1_134A ,Color Palette 1_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP1_134R ,Color Palette 1_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP1_134G ,Color Palette 1_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP1_134B ,Color Palette 1_134 Blue" line.long 0x21C "CP1_135R,Color Palette 1 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP1_135A ,Color Palette 1_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP1_135R ,Color Palette 1_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP1_135G ,Color Palette 1_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP1_135B ,Color Palette 1_135 Blue" line.long 0x220 "CP1_136R,Color Palette 1 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP1_136A ,Color Palette 1_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP1_136R ,Color Palette 1_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP1_136G ,Color Palette 1_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP1_136B ,Color Palette 1_136 Blue" line.long 0x224 "CP1_137R,Color Palette 1 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP1_137A ,Color Palette 1_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP1_137R ,Color Palette 1_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP1_137G ,Color Palette 1_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP1_137B ,Color Palette 1_137 Blue" line.long 0x228 "CP1_138R,Color Palette 1 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP1_138A ,Color Palette 1_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP1_138R ,Color Palette 1_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP1_138G ,Color Palette 1_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP1_138B ,Color Palette 1_138 Blue" line.long 0x22C "CP1_139R,Color Palette 1 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP1_139A ,Color Palette 1_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP1_139R ,Color Palette 1_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP1_139G ,Color Palette 1_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP1_139B ,Color Palette 1_139 Blue" line.long 0x230 "CP1_140R,Color Palette 1 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP1_140A ,Color Palette 1_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP1_140R ,Color Palette 1_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP1_140G ,Color Palette 1_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP1_140B ,Color Palette 1_140 Blue" line.long 0x234 "CP1_141R,Color Palette 1 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP1_141A ,Color Palette 1_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP1_141R ,Color Palette 1_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP1_141G ,Color Palette 1_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP1_141B ,Color Palette 1_141 Blue" line.long 0x238 "CP1_142R,Color Palette 1 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP1_142A ,Color Palette 1_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP1_142R ,Color Palette 1_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP1_142G ,Color Palette 1_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP1_142B ,Color Palette 1_142 Blue" line.long 0x23C "CP1_143R,Color Palette 1 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP1_143A ,Color Palette 1_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP1_143R ,Color Palette 1_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP1_143G ,Color Palette 1_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP1_143B ,Color Palette 1_143 Blue" line.long 0x240 "CP1_144R,Color Palette 1 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP1_144A ,Color Palette 1_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP1_144R ,Color Palette 1_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP1_144G ,Color Palette 1_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP1_144B ,Color Palette 1_144 Blue" line.long 0x244 "CP1_145R,Color Palette 1 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP1_145A ,Color Palette 1_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP1_145R ,Color Palette 1_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP1_145G ,Color Palette 1_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP1_145B ,Color Palette 1_145 Blue" line.long 0x248 "CP1_146R,Color Palette 1 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP1_146A ,Color Palette 1_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP1_146R ,Color Palette 1_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP1_146G ,Color Palette 1_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP1_146B ,Color Palette 1_146 Blue" line.long 0x24C "CP1_147R,Color Palette 1 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP1_147A ,Color Palette 1_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP1_147R ,Color Palette 1_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP1_147G ,Color Palette 1_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP1_147B ,Color Palette 1_147 Blue" line.long 0x250 "CP1_148R,Color Palette 1 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP1_148A ,Color Palette 1_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP1_148R ,Color Palette 1_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP1_148G ,Color Palette 1_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP1_148B ,Color Palette 1_148 Blue" line.long 0x254 "CP1_149R,Color Palette 1 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP1_149A ,Color Palette 1_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP1_149R ,Color Palette 1_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP1_149G ,Color Palette 1_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP1_149B ,Color Palette 1_149 Blue" line.long 0x258 "CP1_150R,Color Palette 1 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP1_150A ,Color Palette 1_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP1_150R ,Color Palette 1_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP1_150G ,Color Palette 1_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP1_150B ,Color Palette 1_150 Blue" line.long 0x25C "CP1_151R,Color Palette 1 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP1_151A ,Color Palette 1_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP1_151R ,Color Palette 1_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP1_151G ,Color Palette 1_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP1_151B ,Color Palette 1_151 Blue" line.long 0x260 "CP1_152R,Color Palette 1 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP1_152A ,Color Palette 1_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP1_152R ,Color Palette 1_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP1_152G ,Color Palette 1_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP1_152B ,Color Palette 1_152 Blue" line.long 0x264 "CP1_153R,Color Palette 1 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP1_153A ,Color Palette 1_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP1_153R ,Color Palette 1_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP1_153G ,Color Palette 1_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP1_153B ,Color Palette 1_153 Blue" line.long 0x268 "CP1_154R,Color Palette 1 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP1_154A ,Color Palette 1_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP1_154R ,Color Palette 1_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP1_154G ,Color Palette 1_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP1_154B ,Color Palette 1_154 Blue" line.long 0x26C "CP1_155R,Color Palette 1 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP1_155A ,Color Palette 1_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP1_155R ,Color Palette 1_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP1_155G ,Color Palette 1_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP1_155B ,Color Palette 1_155 Blue" line.long 0x270 "CP1_156R,Color Palette 1 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP1_156A ,Color Palette 1_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP1_156R ,Color Palette 1_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP1_156G ,Color Palette 1_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP1_156B ,Color Palette 1_156 Blue" line.long 0x274 "CP1_157R,Color Palette 1 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP1_157A ,Color Palette 1_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP1_157R ,Color Palette 1_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP1_157G ,Color Palette 1_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP1_157B ,Color Palette 1_157 Blue" line.long 0x278 "CP1_158R,Color Palette 1 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP1_158A ,Color Palette 1_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP1_158R ,Color Palette 1_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP1_158G ,Color Palette 1_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP1_158B ,Color Palette 1_158 Blue" line.long 0x27C "CP1_159R,Color Palette 1 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP1_159A ,Color Palette 1_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP1_159R ,Color Palette 1_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP1_159G ,Color Palette 1_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP1_159B ,Color Palette 1_159 Blue" line.long 0x280 "CP1_160R,Color Palette 1 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP1_160A ,Color Palette 1_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP1_160R ,Color Palette 1_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP1_160G ,Color Palette 1_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP1_160B ,Color Palette 1_160 Blue" line.long 0x284 "CP1_161R,Color Palette 1 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP1_161A ,Color Palette 1_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP1_161R ,Color Palette 1_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP1_161G ,Color Palette 1_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP1_161B ,Color Palette 1_161 Blue" line.long 0x288 "CP1_162R,Color Palette 1 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP1_162A ,Color Palette 1_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP1_162R ,Color Palette 1_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP1_162G ,Color Palette 1_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP1_162B ,Color Palette 1_162 Blue" line.long 0x28C "CP1_163R,Color Palette 1 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP1_163A ,Color Palette 1_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP1_163R ,Color Palette 1_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP1_163G ,Color Palette 1_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP1_163B ,Color Palette 1_163 Blue" line.long 0x290 "CP1_164R,Color Palette 1 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP1_164A ,Color Palette 1_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP1_164R ,Color Palette 1_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP1_164G ,Color Palette 1_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP1_164B ,Color Palette 1_164 Blue" line.long 0x294 "CP1_165R,Color Palette 1 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP1_165A ,Color Palette 1_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP1_165R ,Color Palette 1_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP1_165G ,Color Palette 1_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP1_165B ,Color Palette 1_165 Blue" line.long 0x298 "CP1_166R,Color Palette 1 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP1_166A ,Color Palette 1_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP1_166R ,Color Palette 1_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP1_166G ,Color Palette 1_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP1_166B ,Color Palette 1_166 Blue" line.long 0x29C "CP1_167R,Color Palette 1 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP1_167A ,Color Palette 1_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP1_167R ,Color Palette 1_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP1_167G ,Color Palette 1_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP1_167B ,Color Palette 1_167 Blue" line.long 0x2A0 "CP1_168R,Color Palette 1 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP1_168A ,Color Palette 1_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP1_168R ,Color Palette 1_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP1_168G ,Color Palette 1_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP1_168B ,Color Palette 1_168 Blue" line.long 0x2A4 "CP1_169R,Color Palette 1 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP1_169A ,Color Palette 1_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP1_169R ,Color Palette 1_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP1_169G ,Color Palette 1_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP1_169B ,Color Palette 1_169 Blue" line.long 0x2A8 "CP1_170R,Color Palette 1 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP1_170A ,Color Palette 1_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP1_170R ,Color Palette 1_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP1_170G ,Color Palette 1_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP1_170B ,Color Palette 1_170 Blue" line.long 0x2AC "CP1_171R,Color Palette 1 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP1_171A ,Color Palette 1_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP1_171R ,Color Palette 1_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP1_171G ,Color Palette 1_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP1_171B ,Color Palette 1_171 Blue" line.long 0x2B0 "CP1_172R,Color Palette 1 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP1_172A ,Color Palette 1_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP1_172R ,Color Palette 1_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP1_172G ,Color Palette 1_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP1_172B ,Color Palette 1_172 Blue" line.long 0x2B4 "CP1_173R,Color Palette 1 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP1_173A ,Color Palette 1_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP1_173R ,Color Palette 1_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP1_173G ,Color Palette 1_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP1_173B ,Color Palette 1_173 Blue" line.long 0x2B8 "CP1_174R,Color Palette 1 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP1_174A ,Color Palette 1_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP1_174R ,Color Palette 1_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP1_174G ,Color Palette 1_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP1_174B ,Color Palette 1_174 Blue" line.long 0x2BC "CP1_175R,Color Palette 1 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP1_175A ,Color Palette 1_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP1_175R ,Color Palette 1_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP1_175G ,Color Palette 1_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP1_175B ,Color Palette 1_175 Blue" line.long 0x2C0 "CP1_176R,Color Palette 1 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP1_176A ,Color Palette 1_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP1_176R ,Color Palette 1_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP1_176G ,Color Palette 1_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP1_176B ,Color Palette 1_176 Blue" line.long 0x2C4 "CP1_177R,Color Palette 1 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP1_177A ,Color Palette 1_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP1_177R ,Color Palette 1_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP1_177G ,Color Palette 1_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP1_177B ,Color Palette 1_177 Blue" line.long 0x2C8 "CP1_178R,Color Palette 1 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP1_178A ,Color Palette 1_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP1_178R ,Color Palette 1_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP1_178G ,Color Palette 1_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP1_178B ,Color Palette 1_178 Blue" line.long 0x2CC "CP1_179R,Color Palette 1 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP1_179A ,Color Palette 1_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP1_179R ,Color Palette 1_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP1_179G ,Color Palette 1_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP1_179B ,Color Palette 1_179 Blue" line.long 0x2D0 "CP1_180R,Color Palette 1 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP1_180A ,Color Palette 1_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP1_180R ,Color Palette 1_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP1_180G ,Color Palette 1_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP1_180B ,Color Palette 1_180 Blue" line.long 0x2D4 "CP1_181R,Color Palette 1 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP1_181A ,Color Palette 1_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP1_181R ,Color Palette 1_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP1_181G ,Color Palette 1_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP1_181B ,Color Palette 1_181 Blue" line.long 0x2D8 "CP1_182R,Color Palette 1 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP1_182A ,Color Palette 1_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP1_182R ,Color Palette 1_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP1_182G ,Color Palette 1_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP1_182B ,Color Palette 1_182 Blue" line.long 0x2DC "CP1_183R,Color Palette 1 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP1_183A ,Color Palette 1_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP1_183R ,Color Palette 1_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP1_183G ,Color Palette 1_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP1_183B ,Color Palette 1_183 Blue" line.long 0x2E0 "CP1_184R,Color Palette 1 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP1_184A ,Color Palette 1_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP1_184R ,Color Palette 1_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP1_184G ,Color Palette 1_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP1_184B ,Color Palette 1_184 Blue" line.long 0x2E4 "CP1_185R,Color Palette 1 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP1_185A ,Color Palette 1_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP1_185R ,Color Palette 1_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP1_185G ,Color Palette 1_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP1_185B ,Color Palette 1_185 Blue" line.long 0x2E8 "CP1_186R,Color Palette 1 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP1_186A ,Color Palette 1_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP1_186R ,Color Palette 1_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP1_186G ,Color Palette 1_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP1_186B ,Color Palette 1_186 Blue" line.long 0x2EC "CP1_187R,Color Palette 1 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP1_187A ,Color Palette 1_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP1_187R ,Color Palette 1_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP1_187G ,Color Palette 1_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP1_187B ,Color Palette 1_187 Blue" line.long 0x2F0 "CP1_188R,Color Palette 1 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP1_188A ,Color Palette 1_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP1_188R ,Color Palette 1_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP1_188G ,Color Palette 1_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP1_188B ,Color Palette 1_188 Blue" line.long 0x2F4 "CP1_189R,Color Palette 1 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP1_189A ,Color Palette 1_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP1_189R ,Color Palette 1_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP1_189G ,Color Palette 1_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP1_189B ,Color Palette 1_189 Blue" line.long 0x2F8 "CP1_190R,Color Palette 1 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP1_190A ,Color Palette 1_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP1_190R ,Color Palette 1_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP1_190G ,Color Palette 1_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP1_190B ,Color Palette 1_190 Blue" line.long 0x2FC "CP1_191R,Color Palette 1 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP1_191A ,Color Palette 1_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP1_191R ,Color Palette 1_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP1_191G ,Color Palette 1_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP1_191B ,Color Palette 1_191 Blue" line.long 0x300 "CP1_192R,Color Palette 1 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP1_192A ,Color Palette 1_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP1_192R ,Color Palette 1_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP1_192G ,Color Palette 1_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP1_192B ,Color Palette 1_192 Blue" line.long 0x304 "CP1_193R,Color Palette 1 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP1_193A ,Color Palette 1_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP1_193R ,Color Palette 1_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP1_193G ,Color Palette 1_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP1_193B ,Color Palette 1_193 Blue" line.long 0x308 "CP1_194R,Color Palette 1 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP1_194A ,Color Palette 1_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP1_194R ,Color Palette 1_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP1_194G ,Color Palette 1_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP1_194B ,Color Palette 1_194 Blue" line.long 0x30C "CP1_195R,Color Palette 1 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP1_195A ,Color Palette 1_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP1_195R ,Color Palette 1_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP1_195G ,Color Palette 1_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP1_195B ,Color Palette 1_195 Blue" line.long 0x310 "CP1_196R,Color Palette 1 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP1_196A ,Color Palette 1_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP1_196R ,Color Palette 1_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP1_196G ,Color Palette 1_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP1_196B ,Color Palette 1_196 Blue" line.long 0x314 "CP1_197R,Color Palette 1 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP1_197A ,Color Palette 1_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP1_197R ,Color Palette 1_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP1_197G ,Color Palette 1_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP1_197B ,Color Palette 1_197 Blue" line.long 0x318 "CP1_198R,Color Palette 1 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP1_198A ,Color Palette 1_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP1_198R ,Color Palette 1_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP1_198G ,Color Palette 1_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP1_198B ,Color Palette 1_198 Blue" line.long 0x31C "CP1_199R,Color Palette 1 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP1_199A ,Color Palette 1_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP1_199R ,Color Palette 1_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP1_199G ,Color Palette 1_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP1_199B ,Color Palette 1_199 Blue" line.long 0x320 "CP1_200R,Color Palette 1 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP1_200A ,Color Palette 1_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP1_200R ,Color Palette 1_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP1_200G ,Color Palette 1_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP1_200B ,Color Palette 1_200 Blue" line.long 0x324 "CP1_201R,Color Palette 1 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP1_201A ,Color Palette 1_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP1_201R ,Color Palette 1_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP1_201G ,Color Palette 1_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP1_201B ,Color Palette 1_201 Blue" line.long 0x328 "CP1_202R,Color Palette 1 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP1_202A ,Color Palette 1_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP1_202R ,Color Palette 1_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP1_202G ,Color Palette 1_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP1_202B ,Color Palette 1_202 Blue" line.long 0x32C "CP1_203R,Color Palette 1 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP1_203A ,Color Palette 1_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP1_203R ,Color Palette 1_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP1_203G ,Color Palette 1_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP1_203B ,Color Palette 1_203 Blue" line.long 0x330 "CP1_204R,Color Palette 1 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP1_204A ,Color Palette 1_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP1_204R ,Color Palette 1_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP1_204G ,Color Palette 1_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP1_204B ,Color Palette 1_204 Blue" line.long 0x334 "CP1_205R,Color Palette 1 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP1_205A ,Color Palette 1_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP1_205R ,Color Palette 1_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP1_205G ,Color Palette 1_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP1_205B ,Color Palette 1_205 Blue" line.long 0x338 "CP1_206R,Color Palette 1 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP1_206A ,Color Palette 1_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP1_206R ,Color Palette 1_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP1_206G ,Color Palette 1_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP1_206B ,Color Palette 1_206 Blue" line.long 0x33C "CP1_207R,Color Palette 1 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP1_207A ,Color Palette 1_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP1_207R ,Color Palette 1_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP1_207G ,Color Palette 1_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP1_207B ,Color Palette 1_207 Blue" line.long 0x340 "CP1_208R,Color Palette 1 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP1_208A ,Color Palette 1_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP1_208R ,Color Palette 1_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP1_208G ,Color Palette 1_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP1_208B ,Color Palette 1_208 Blue" line.long 0x344 "CP1_209R,Color Palette 1 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP1_209A ,Color Palette 1_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP1_209R ,Color Palette 1_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP1_209G ,Color Palette 1_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP1_209B ,Color Palette 1_209 Blue" line.long 0x348 "CP1_210R,Color Palette 1 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP1_210A ,Color Palette 1_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP1_210R ,Color Palette 1_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP1_210G ,Color Palette 1_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP1_210B ,Color Palette 1_210 Blue" line.long 0x34C "CP1_211R,Color Palette 1 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP1_211A ,Color Palette 1_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP1_211R ,Color Palette 1_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP1_211G ,Color Palette 1_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP1_211B ,Color Palette 1_211 Blue" line.long 0x350 "CP1_212R,Color Palette 1 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP1_212A ,Color Palette 1_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP1_212R ,Color Palette 1_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP1_212G ,Color Palette 1_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP1_212B ,Color Palette 1_212 Blue" line.long 0x354 "CP1_213R,Color Palette 1 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP1_213A ,Color Palette 1_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP1_213R ,Color Palette 1_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP1_213G ,Color Palette 1_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP1_213B ,Color Palette 1_213 Blue" line.long 0x358 "CP1_214R,Color Palette 1 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP1_214A ,Color Palette 1_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP1_214R ,Color Palette 1_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP1_214G ,Color Palette 1_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP1_214B ,Color Palette 1_214 Blue" line.long 0x35C "CP1_215R,Color Palette 1 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP1_215A ,Color Palette 1_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP1_215R ,Color Palette 1_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP1_215G ,Color Palette 1_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP1_215B ,Color Palette 1_215 Blue" line.long 0x360 "CP1_216R,Color Palette 1 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP1_216A ,Color Palette 1_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP1_216R ,Color Palette 1_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP1_216G ,Color Palette 1_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP1_216B ,Color Palette 1_216 Blue" line.long 0x364 "CP1_217R,Color Palette 1 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP1_217A ,Color Palette 1_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP1_217R ,Color Palette 1_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP1_217G ,Color Palette 1_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP1_217B ,Color Palette 1_217 Blue" line.long 0x368 "CP1_218R,Color Palette 1 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP1_218A ,Color Palette 1_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP1_218R ,Color Palette 1_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP1_218G ,Color Palette 1_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP1_218B ,Color Palette 1_218 Blue" line.long 0x36C "CP1_219R,Color Palette 1 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP1_219A ,Color Palette 1_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP1_219R ,Color Palette 1_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP1_219G ,Color Palette 1_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP1_219B ,Color Palette 1_219 Blue" line.long 0x370 "CP1_220R,Color Palette 1 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP1_220A ,Color Palette 1_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP1_220R ,Color Palette 1_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP1_220G ,Color Palette 1_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP1_220B ,Color Palette 1_220 Blue" line.long 0x374 "CP1_221R,Color Palette 1 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP1_221A ,Color Palette 1_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP1_221R ,Color Palette 1_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP1_221G ,Color Palette 1_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP1_221B ,Color Palette 1_221 Blue" line.long 0x378 "CP1_222R,Color Palette 1 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP1_222A ,Color Palette 1_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP1_222R ,Color Palette 1_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP1_222G ,Color Palette 1_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP1_222B ,Color Palette 1_222 Blue" line.long 0x37C "CP1_223R,Color Palette 1 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP1_223A ,Color Palette 1_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP1_223R ,Color Palette 1_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP1_223G ,Color Palette 1_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP1_223B ,Color Palette 1_223 Blue" line.long 0x380 "CP1_224R,Color Palette 1 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP1_224A ,Color Palette 1_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP1_224R ,Color Palette 1_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP1_224G ,Color Palette 1_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP1_224B ,Color Palette 1_224 Blue" line.long 0x384 "CP1_225R,Color Palette 1 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP1_225A ,Color Palette 1_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP1_225R ,Color Palette 1_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP1_225G ,Color Palette 1_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP1_225B ,Color Palette 1_225 Blue" line.long 0x388 "CP1_226R,Color Palette 1 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP1_226A ,Color Palette 1_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP1_226R ,Color Palette 1_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP1_226G ,Color Palette 1_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP1_226B ,Color Palette 1_226 Blue" line.long 0x38C "CP1_227R,Color Palette 1 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP1_227A ,Color Palette 1_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP1_227R ,Color Palette 1_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP1_227G ,Color Palette 1_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP1_227B ,Color Palette 1_227 Blue" line.long 0x390 "CP1_228R,Color Palette 1 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP1_228A ,Color Palette 1_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP1_228R ,Color Palette 1_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP1_228G ,Color Palette 1_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP1_228B ,Color Palette 1_228 Blue" line.long 0x394 "CP1_229R,Color Palette 1 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP1_229A ,Color Palette 1_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP1_229R ,Color Palette 1_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP1_229G ,Color Palette 1_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP1_229B ,Color Palette 1_229 Blue" line.long 0x398 "CP1_230R,Color Palette 1 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP1_230A ,Color Palette 1_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP1_230R ,Color Palette 1_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP1_230G ,Color Palette 1_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP1_230B ,Color Palette 1_230 Blue" line.long 0x39C "CP1_231R,Color Palette 1 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP1_231A ,Color Palette 1_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP1_231R ,Color Palette 1_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP1_231G ,Color Palette 1_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP1_231B ,Color Palette 1_231 Blue" line.long 0x3A0 "CP1_232R,Color Palette 1 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP1_232A ,Color Palette 1_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP1_232R ,Color Palette 1_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP1_232G ,Color Palette 1_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP1_232B ,Color Palette 1_232 Blue" line.long 0x3A4 "CP1_233R,Color Palette 1 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP1_233A ,Color Palette 1_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP1_233R ,Color Palette 1_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP1_233G ,Color Palette 1_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP1_233B ,Color Palette 1_233 Blue" line.long 0x3A8 "CP1_234R,Color Palette 1 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP1_234A ,Color Palette 1_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP1_234R ,Color Palette 1_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP1_234G ,Color Palette 1_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP1_234B ,Color Palette 1_234 Blue" line.long 0x3AC "CP1_235R,Color Palette 1 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP1_235A ,Color Palette 1_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP1_235R ,Color Palette 1_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP1_235G ,Color Palette 1_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP1_235B ,Color Palette 1_235 Blue" line.long 0x3B0 "CP1_236R,Color Palette 1 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP1_236A ,Color Palette 1_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP1_236R ,Color Palette 1_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP1_236G ,Color Palette 1_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP1_236B ,Color Palette 1_236 Blue" line.long 0x3B4 "CP1_237R,Color Palette 1 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP1_237A ,Color Palette 1_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP1_237R ,Color Palette 1_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP1_237G ,Color Palette 1_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP1_237B ,Color Palette 1_237 Blue" line.long 0x3B8 "CP1_238R,Color Palette 1 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP1_238A ,Color Palette 1_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP1_238R ,Color Palette 1_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP1_238G ,Color Palette 1_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP1_238B ,Color Palette 1_238 Blue" line.long 0x3BC "CP1_239R,Color Palette 1 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP1_239A ,Color Palette 1_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP1_239R ,Color Palette 1_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP1_239G ,Color Palette 1_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP1_239B ,Color Palette 1_239 Blue" line.long 0x3C0 "CP1_240R,Color Palette 1 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP1_240A ,Color Palette 1_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP1_240R ,Color Palette 1_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP1_240G ,Color Palette 1_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP1_240B ,Color Palette 1_240 Blue" line.long 0x3C4 "CP1_241R,Color Palette 1 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP1_241A ,Color Palette 1_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP1_241R ,Color Palette 1_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP1_241G ,Color Palette 1_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP1_241B ,Color Palette 1_241 Blue" line.long 0x3C8 "CP1_242R,Color Palette 1 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP1_242A ,Color Palette 1_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP1_242R ,Color Palette 1_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP1_242G ,Color Palette 1_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP1_242B ,Color Palette 1_242 Blue" line.long 0x3CC "CP1_243R,Color Palette 1 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP1_243A ,Color Palette 1_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP1_243R ,Color Palette 1_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP1_243G ,Color Palette 1_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP1_243B ,Color Palette 1_243 Blue" line.long 0x3D0 "CP1_244R,Color Palette 1 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP1_244A ,Color Palette 1_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP1_244R ,Color Palette 1_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP1_244G ,Color Palette 1_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP1_244B ,Color Palette 1_244 Blue" line.long 0x3D4 "CP1_245R,Color Palette 1 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP1_245A ,Color Palette 1_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP1_245R ,Color Palette 1_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP1_245G ,Color Palette 1_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP1_245B ,Color Palette 1_245 Blue" line.long 0x3D8 "CP1_246R,Color Palette 1 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP1_246A ,Color Palette 1_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP1_246R ,Color Palette 1_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP1_246G ,Color Palette 1_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP1_246B ,Color Palette 1_246 Blue" line.long 0x3DC "CP1_247R,Color Palette 1 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP1_247A ,Color Palette 1_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP1_247R ,Color Palette 1_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP1_247G ,Color Palette 1_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP1_247B ,Color Palette 1_247 Blue" line.long 0x3E0 "CP1_248R,Color Palette 1 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP1_248A ,Color Palette 1_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP1_248R ,Color Palette 1_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP1_248G ,Color Palette 1_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP1_248B ,Color Palette 1_248 Blue" line.long 0x3E4 "CP1_249R,Color Palette 1 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP1_249A ,Color Palette 1_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP1_249R ,Color Palette 1_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP1_249G ,Color Palette 1_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP1_249B ,Color Palette 1_249 Blue" line.long 0x3E8 "CP1_250R,Color Palette 1 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP1_250A ,Color Palette 1_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP1_250R ,Color Palette 1_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP1_250G ,Color Palette 1_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP1_250B ,Color Palette 1_250 Blue" line.long 0x3EC "CP1_251R,Color Palette 1 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP1_251A ,Color Palette 1_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP1_251R ,Color Palette 1_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP1_251G ,Color Palette 1_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP1_251B ,Color Palette 1_251 Blue" line.long 0x3F0 "CP1_252R,Color Palette 1 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP1_252A ,Color Palette 1_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP1_252R ,Color Palette 1_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP1_252G ,Color Palette 1_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP1_252B ,Color Palette 1_252 Blue" line.long 0x3F4 "CP1_253R,Color Palette 1 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP1_253A ,Color Palette 1_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP1_253R ,Color Palette 1_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP1_253G ,Color Palette 1_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP1_253B ,Color Palette 1_253 Blue" line.long 0x3F8 "CP1_254R,Color Palette 1 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP1_254A ,Color Palette 1_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP1_254R ,Color Palette 1_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP1_254G ,Color Palette 1_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP1_254B ,Color Palette 1_254 Blue" line.long 0x3FC "CP1_255R,Color Palette 1 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP1_255A ,Color Palette 1_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP1_255R ,Color Palette 1_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP1_255G ,Color Palette 1_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP1_255B ,Color Palette 1_255 Blue" tree.end tree "Color Palette 2 Registers" width 10. group.long 0x2000++0x3ff line.long 0x0 "CP2_0R,Color Palette 2 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP2_0A ,Color Palette 2_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP2_0R ,Color Palette 2_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP2_0G ,Color Palette 2_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP2_0B ,Color Palette 2_0 Blue" line.long 0x4 "CP2_1R,Color Palette 2 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP2_1A ,Color Palette 2_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP2_1R ,Color Palette 2_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP2_1G ,Color Palette 2_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP2_1B ,Color Palette 2_1 Blue" line.long 0x8 "CP2_2R,Color Palette 2 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP2_2A ,Color Palette 2_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP2_2R ,Color Palette 2_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP2_2G ,Color Palette 2_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP2_2B ,Color Palette 2_2 Blue" line.long 0xC "CP2_3R,Color Palette 2 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP2_3A ,Color Palette 2_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP2_3R ,Color Palette 2_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP2_3G ,Color Palette 2_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP2_3B ,Color Palette 2_3 Blue" line.long 0x10 "CP2_4R,Color Palette 2 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP2_4A ,Color Palette 2_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP2_4R ,Color Palette 2_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP2_4G ,Color Palette 2_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP2_4B ,Color Palette 2_4 Blue" line.long 0x14 "CP2_5R,Color Palette 2 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP2_5A ,Color Palette 2_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP2_5R ,Color Palette 2_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP2_5G ,Color Palette 2_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP2_5B ,Color Palette 2_5 Blue" line.long 0x18 "CP2_6R,Color Palette 2 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP2_6A ,Color Palette 2_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP2_6R ,Color Palette 2_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP2_6G ,Color Palette 2_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP2_6B ,Color Palette 2_6 Blue" line.long 0x1C "CP2_7R,Color Palette 2 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP2_7A ,Color Palette 2_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP2_7R ,Color Palette 2_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP2_7G ,Color Palette 2_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP2_7B ,Color Palette 2_7 Blue" line.long 0x20 "CP2_8R,Color Palette 2 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP2_8A ,Color Palette 2_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP2_8R ,Color Palette 2_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP2_8G ,Color Palette 2_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP2_8B ,Color Palette 2_8 Blue" line.long 0x24 "CP2_9R,Color Palette 2 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP2_9A ,Color Palette 2_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP2_9R ,Color Palette 2_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP2_9G ,Color Palette 2_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP2_9B ,Color Palette 2_9 Blue" line.long 0x28 "CP2_10R,Color Palette 2 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP2_10A ,Color Palette 2_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP2_10R ,Color Palette 2_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP2_10G ,Color Palette 2_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP2_10B ,Color Palette 2_10 Blue" line.long 0x2C "CP2_11R,Color Palette 2 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP2_11A ,Color Palette 2_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP2_11R ,Color Palette 2_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP2_11G ,Color Palette 2_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP2_11B ,Color Palette 2_11 Blue" line.long 0x30 "CP2_12R,Color Palette 2 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP2_12A ,Color Palette 2_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP2_12R ,Color Palette 2_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP2_12G ,Color Palette 2_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP2_12B ,Color Palette 2_12 Blue" line.long 0x34 "CP2_13R,Color Palette 2 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP2_13A ,Color Palette 2_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP2_13R ,Color Palette 2_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP2_13G ,Color Palette 2_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP2_13B ,Color Palette 2_13 Blue" line.long 0x38 "CP2_14R,Color Palette 2 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP2_14A ,Color Palette 2_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP2_14R ,Color Palette 2_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP2_14G ,Color Palette 2_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP2_14B ,Color Palette 2_14 Blue" line.long 0x3C "CP2_15R,Color Palette 2 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP2_15A ,Color Palette 2_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP2_15R ,Color Palette 2_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP2_15G ,Color Palette 2_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP2_15B ,Color Palette 2_15 Blue" line.long 0x40 "CP2_16R,Color Palette 2 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP2_16A ,Color Palette 2_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP2_16R ,Color Palette 2_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP2_16G ,Color Palette 2_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP2_16B ,Color Palette 2_16 Blue" line.long 0x44 "CP2_17R,Color Palette 2 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP2_17A ,Color Palette 2_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP2_17R ,Color Palette 2_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP2_17G ,Color Palette 2_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP2_17B ,Color Palette 2_17 Blue" line.long 0x48 "CP2_18R,Color Palette 2 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP2_18A ,Color Palette 2_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP2_18R ,Color Palette 2_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP2_18G ,Color Palette 2_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP2_18B ,Color Palette 2_18 Blue" line.long 0x4C "CP2_19R,Color Palette 2 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP2_19A ,Color Palette 2_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP2_19R ,Color Palette 2_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP2_19G ,Color Palette 2_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP2_19B ,Color Palette 2_19 Blue" line.long 0x50 "CP2_20R,Color Palette 2 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP2_20A ,Color Palette 2_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP2_20R ,Color Palette 2_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP2_20G ,Color Palette 2_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP2_20B ,Color Palette 2_20 Blue" line.long 0x54 "CP2_21R,Color Palette 2 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP2_21A ,Color Palette 2_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP2_21R ,Color Palette 2_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP2_21G ,Color Palette 2_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP2_21B ,Color Palette 2_21 Blue" line.long 0x58 "CP2_22R,Color Palette 2 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP2_22A ,Color Palette 2_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP2_22R ,Color Palette 2_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP2_22G ,Color Palette 2_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP2_22B ,Color Palette 2_22 Blue" line.long 0x5C "CP2_23R,Color Palette 2 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP2_23A ,Color Palette 2_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP2_23R ,Color Palette 2_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP2_23G ,Color Palette 2_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP2_23B ,Color Palette 2_23 Blue" line.long 0x60 "CP2_24R,Color Palette 2 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP2_24A ,Color Palette 2_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP2_24R ,Color Palette 2_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP2_24G ,Color Palette 2_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP2_24B ,Color Palette 2_24 Blue" line.long 0x64 "CP2_25R,Color Palette 2 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP2_25A ,Color Palette 2_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP2_25R ,Color Palette 2_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP2_25G ,Color Palette 2_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP2_25B ,Color Palette 2_25 Blue" line.long 0x68 "CP2_26R,Color Palette 2 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP2_26A ,Color Palette 2_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP2_26R ,Color Palette 2_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP2_26G ,Color Palette 2_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP2_26B ,Color Palette 2_26 Blue" line.long 0x6C "CP2_27R,Color Palette 2 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP2_27A ,Color Palette 2_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP2_27R ,Color Palette 2_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP2_27G ,Color Palette 2_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP2_27B ,Color Palette 2_27 Blue" line.long 0x70 "CP2_28R,Color Palette 2 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP2_28A ,Color Palette 2_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP2_28R ,Color Palette 2_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP2_28G ,Color Palette 2_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP2_28B ,Color Palette 2_28 Blue" line.long 0x74 "CP2_29R,Color Palette 2 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP2_29A ,Color Palette 2_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP2_29R ,Color Palette 2_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP2_29G ,Color Palette 2_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP2_29B ,Color Palette 2_29 Blue" line.long 0x78 "CP2_30R,Color Palette 2 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP2_30A ,Color Palette 2_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP2_30R ,Color Palette 2_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP2_30G ,Color Palette 2_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP2_30B ,Color Palette 2_30 Blue" line.long 0x7C "CP2_31R,Color Palette 2 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP2_31A ,Color Palette 2_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP2_31R ,Color Palette 2_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP2_31G ,Color Palette 2_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP2_31B ,Color Palette 2_31 Blue" line.long 0x80 "CP2_32R,Color Palette 2 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP2_32A ,Color Palette 2_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP2_32R ,Color Palette 2_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP2_32G ,Color Palette 2_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP2_32B ,Color Palette 2_32 Blue" line.long 0x84 "CP2_33R,Color Palette 2 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP2_33A ,Color Palette 2_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP2_33R ,Color Palette 2_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP2_33G ,Color Palette 2_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP2_33B ,Color Palette 2_33 Blue" line.long 0x88 "CP2_34R,Color Palette 2 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP2_34A ,Color Palette 2_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP2_34R ,Color Palette 2_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP2_34G ,Color Palette 2_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP2_34B ,Color Palette 2_34 Blue" line.long 0x8C "CP2_35R,Color Palette 2 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP2_35A ,Color Palette 2_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP2_35R ,Color Palette 2_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP2_35G ,Color Palette 2_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP2_35B ,Color Palette 2_35 Blue" line.long 0x90 "CP2_36R,Color Palette 2 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP2_36A ,Color Palette 2_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP2_36R ,Color Palette 2_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP2_36G ,Color Palette 2_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP2_36B ,Color Palette 2_36 Blue" line.long 0x94 "CP2_37R,Color Palette 2 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP2_37A ,Color Palette 2_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP2_37R ,Color Palette 2_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP2_37G ,Color Palette 2_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP2_37B ,Color Palette 2_37 Blue" line.long 0x98 "CP2_38R,Color Palette 2 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP2_38A ,Color Palette 2_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP2_38R ,Color Palette 2_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP2_38G ,Color Palette 2_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP2_38B ,Color Palette 2_38 Blue" line.long 0x9C "CP2_39R,Color Palette 2 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP2_39A ,Color Palette 2_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP2_39R ,Color Palette 2_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP2_39G ,Color Palette 2_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP2_39B ,Color Palette 2_39 Blue" line.long 0xA0 "CP2_40R,Color Palette 2 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP2_40A ,Color Palette 2_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP2_40R ,Color Palette 2_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP2_40G ,Color Palette 2_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP2_40B ,Color Palette 2_40 Blue" line.long 0xA4 "CP2_41R,Color Palette 2 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP2_41A ,Color Palette 2_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP2_41R ,Color Palette 2_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP2_41G ,Color Palette 2_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP2_41B ,Color Palette 2_41 Blue" line.long 0xA8 "CP2_42R,Color Palette 2 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP2_42A ,Color Palette 2_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP2_42R ,Color Palette 2_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP2_42G ,Color Palette 2_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP2_42B ,Color Palette 2_42 Blue" line.long 0xAC "CP2_43R,Color Palette 2 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP2_43A ,Color Palette 2_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP2_43R ,Color Palette 2_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP2_43G ,Color Palette 2_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP2_43B ,Color Palette 2_43 Blue" line.long 0xB0 "CP2_44R,Color Palette 2 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP2_44A ,Color Palette 2_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP2_44R ,Color Palette 2_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP2_44G ,Color Palette 2_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP2_44B ,Color Palette 2_44 Blue" line.long 0xB4 "CP2_45R,Color Palette 2 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP2_45A ,Color Palette 2_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP2_45R ,Color Palette 2_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP2_45G ,Color Palette 2_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP2_45B ,Color Palette 2_45 Blue" line.long 0xB8 "CP2_46R,Color Palette 2 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP2_46A ,Color Palette 2_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP2_46R ,Color Palette 2_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP2_46G ,Color Palette 2_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP2_46B ,Color Palette 2_46 Blue" line.long 0xBC "CP2_47R,Color Palette 2 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP2_47A ,Color Palette 2_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP2_47R ,Color Palette 2_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP2_47G ,Color Palette 2_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP2_47B ,Color Palette 2_47 Blue" line.long 0xC0 "CP2_48R,Color Palette 2 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP2_48A ,Color Palette 2_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP2_48R ,Color Palette 2_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP2_48G ,Color Palette 2_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP2_48B ,Color Palette 2_48 Blue" line.long 0xC4 "CP2_49R,Color Palette 2 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP2_49A ,Color Palette 2_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP2_49R ,Color Palette 2_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP2_49G ,Color Palette 2_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP2_49B ,Color Palette 2_49 Blue" line.long 0xC8 "CP2_50R,Color Palette 2 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP2_50A ,Color Palette 2_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP2_50R ,Color Palette 2_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP2_50G ,Color Palette 2_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP2_50B ,Color Palette 2_50 Blue" line.long 0xCC "CP2_51R,Color Palette 2 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP2_51A ,Color Palette 2_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP2_51R ,Color Palette 2_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP2_51G ,Color Palette 2_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP2_51B ,Color Palette 2_51 Blue" line.long 0xD0 "CP2_52R,Color Palette 2 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP2_52A ,Color Palette 2_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP2_52R ,Color Palette 2_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP2_52G ,Color Palette 2_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP2_52B ,Color Palette 2_52 Blue" line.long 0xD4 "CP2_53R,Color Palette 2 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP2_53A ,Color Palette 2_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP2_53R ,Color Palette 2_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP2_53G ,Color Palette 2_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP2_53B ,Color Palette 2_53 Blue" line.long 0xD8 "CP2_54R,Color Palette 2 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP2_54A ,Color Palette 2_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP2_54R ,Color Palette 2_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP2_54G ,Color Palette 2_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP2_54B ,Color Palette 2_54 Blue" line.long 0xDC "CP2_55R,Color Palette 2 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP2_55A ,Color Palette 2_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP2_55R ,Color Palette 2_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP2_55G ,Color Palette 2_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP2_55B ,Color Palette 2_55 Blue" line.long 0xE0 "CP2_56R,Color Palette 2 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP2_56A ,Color Palette 2_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP2_56R ,Color Palette 2_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP2_56G ,Color Palette 2_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP2_56B ,Color Palette 2_56 Blue" line.long 0xE4 "CP2_57R,Color Palette 2 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP2_57A ,Color Palette 2_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP2_57R ,Color Palette 2_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP2_57G ,Color Palette 2_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP2_57B ,Color Palette 2_57 Blue" line.long 0xE8 "CP2_58R,Color Palette 2 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP2_58A ,Color Palette 2_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP2_58R ,Color Palette 2_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP2_58G ,Color Palette 2_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP2_58B ,Color Palette 2_58 Blue" line.long 0xEC "CP2_59R,Color Palette 2 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP2_59A ,Color Palette 2_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP2_59R ,Color Palette 2_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP2_59G ,Color Palette 2_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP2_59B ,Color Palette 2_59 Blue" line.long 0xF0 "CP2_60R,Color Palette 2 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP2_60A ,Color Palette 2_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP2_60R ,Color Palette 2_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP2_60G ,Color Palette 2_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP2_60B ,Color Palette 2_60 Blue" line.long 0xF4 "CP2_61R,Color Palette 2 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP2_61A ,Color Palette 2_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP2_61R ,Color Palette 2_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP2_61G ,Color Palette 2_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP2_61B ,Color Palette 2_61 Blue" line.long 0xF8 "CP2_62R,Color Palette 2 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP2_62A ,Color Palette 2_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP2_62R ,Color Palette 2_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP2_62G ,Color Palette 2_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP2_62B ,Color Palette 2_62 Blue" line.long 0xFC "CP2_63R,Color Palette 2 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP2_63A ,Color Palette 2_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP2_63R ,Color Palette 2_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP2_63G ,Color Palette 2_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP2_63B ,Color Palette 2_63 Blue" line.long 0x100 "CP2_64R,Color Palette 2 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP2_64A ,Color Palette 2_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP2_64R ,Color Palette 2_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP2_64G ,Color Palette 2_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP2_64B ,Color Palette 2_64 Blue" line.long 0x104 "CP2_65R,Color Palette 2 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP2_65A ,Color Palette 2_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP2_65R ,Color Palette 2_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP2_65G ,Color Palette 2_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP2_65B ,Color Palette 2_65 Blue" line.long 0x108 "CP2_66R,Color Palette 2 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP2_66A ,Color Palette 2_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP2_66R ,Color Palette 2_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP2_66G ,Color Palette 2_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP2_66B ,Color Palette 2_66 Blue" line.long 0x10C "CP2_67R,Color Palette 2 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP2_67A ,Color Palette 2_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP2_67R ,Color Palette 2_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP2_67G ,Color Palette 2_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP2_67B ,Color Palette 2_67 Blue" line.long 0x110 "CP2_68R,Color Palette 2 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP2_68A ,Color Palette 2_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP2_68R ,Color Palette 2_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP2_68G ,Color Palette 2_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP2_68B ,Color Palette 2_68 Blue" line.long 0x114 "CP2_69R,Color Palette 2 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP2_69A ,Color Palette 2_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP2_69R ,Color Palette 2_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP2_69G ,Color Palette 2_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP2_69B ,Color Palette 2_69 Blue" line.long 0x118 "CP2_70R,Color Palette 2 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP2_70A ,Color Palette 2_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP2_70R ,Color Palette 2_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP2_70G ,Color Palette 2_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP2_70B ,Color Palette 2_70 Blue" line.long 0x11C "CP2_71R,Color Palette 2 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP2_71A ,Color Palette 2_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP2_71R ,Color Palette 2_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP2_71G ,Color Palette 2_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP2_71B ,Color Palette 2_71 Blue" line.long 0x120 "CP2_72R,Color Palette 2 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP2_72A ,Color Palette 2_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP2_72R ,Color Palette 2_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP2_72G ,Color Palette 2_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP2_72B ,Color Palette 2_72 Blue" line.long 0x124 "CP2_73R,Color Palette 2 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP2_73A ,Color Palette 2_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP2_73R ,Color Palette 2_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP2_73G ,Color Palette 2_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP2_73B ,Color Palette 2_73 Blue" line.long 0x128 "CP2_74R,Color Palette 2 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP2_74A ,Color Palette 2_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP2_74R ,Color Palette 2_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP2_74G ,Color Palette 2_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP2_74B ,Color Palette 2_74 Blue" line.long 0x12C "CP2_75R,Color Palette 2 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP2_75A ,Color Palette 2_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP2_75R ,Color Palette 2_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP2_75G ,Color Palette 2_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP2_75B ,Color Palette 2_75 Blue" line.long 0x130 "CP2_76R,Color Palette 2 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP2_76A ,Color Palette 2_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP2_76R ,Color Palette 2_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP2_76G ,Color Palette 2_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP2_76B ,Color Palette 2_76 Blue" line.long 0x134 "CP2_77R,Color Palette 2 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP2_77A ,Color Palette 2_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP2_77R ,Color Palette 2_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP2_77G ,Color Palette 2_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP2_77B ,Color Palette 2_77 Blue" line.long 0x138 "CP2_78R,Color Palette 2 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP2_78A ,Color Palette 2_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP2_78R ,Color Palette 2_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP2_78G ,Color Palette 2_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP2_78B ,Color Palette 2_78 Blue" line.long 0x13C "CP2_79R,Color Palette 2 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP2_79A ,Color Palette 2_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP2_79R ,Color Palette 2_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP2_79G ,Color Palette 2_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP2_79B ,Color Palette 2_79 Blue" line.long 0x140 "CP2_80R,Color Palette 2 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP2_80A ,Color Palette 2_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP2_80R ,Color Palette 2_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP2_80G ,Color Palette 2_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP2_80B ,Color Palette 2_80 Blue" line.long 0x144 "CP2_81R,Color Palette 2 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP2_81A ,Color Palette 2_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP2_81R ,Color Palette 2_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP2_81G ,Color Palette 2_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP2_81B ,Color Palette 2_81 Blue" line.long 0x148 "CP2_82R,Color Palette 2 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP2_82A ,Color Palette 2_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP2_82R ,Color Palette 2_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP2_82G ,Color Palette 2_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP2_82B ,Color Palette 2_82 Blue" line.long 0x14C "CP2_83R,Color Palette 2 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP2_83A ,Color Palette 2_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP2_83R ,Color Palette 2_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP2_83G ,Color Palette 2_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP2_83B ,Color Palette 2_83 Blue" line.long 0x150 "CP2_84R,Color Palette 2 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP2_84A ,Color Palette 2_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP2_84R ,Color Palette 2_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP2_84G ,Color Palette 2_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP2_84B ,Color Palette 2_84 Blue" line.long 0x154 "CP2_85R,Color Palette 2 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP2_85A ,Color Palette 2_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP2_85R ,Color Palette 2_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP2_85G ,Color Palette 2_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP2_85B ,Color Palette 2_85 Blue" line.long 0x158 "CP2_86R,Color Palette 2 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP2_86A ,Color Palette 2_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP2_86R ,Color Palette 2_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP2_86G ,Color Palette 2_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP2_86B ,Color Palette 2_86 Blue" line.long 0x15C "CP2_87R,Color Palette 2 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP2_87A ,Color Palette 2_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP2_87R ,Color Palette 2_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP2_87G ,Color Palette 2_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP2_87B ,Color Palette 2_87 Blue" line.long 0x160 "CP2_88R,Color Palette 2 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP2_88A ,Color Palette 2_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP2_88R ,Color Palette 2_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP2_88G ,Color Palette 2_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP2_88B ,Color Palette 2_88 Blue" line.long 0x164 "CP2_89R,Color Palette 2 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP2_89A ,Color Palette 2_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP2_89R ,Color Palette 2_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP2_89G ,Color Palette 2_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP2_89B ,Color Palette 2_89 Blue" line.long 0x168 "CP2_90R,Color Palette 2 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP2_90A ,Color Palette 2_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP2_90R ,Color Palette 2_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP2_90G ,Color Palette 2_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP2_90B ,Color Palette 2_90 Blue" line.long 0x16C "CP2_91R,Color Palette 2 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP2_91A ,Color Palette 2_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP2_91R ,Color Palette 2_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP2_91G ,Color Palette 2_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP2_91B ,Color Palette 2_91 Blue" line.long 0x170 "CP2_92R,Color Palette 2 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP2_92A ,Color Palette 2_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP2_92R ,Color Palette 2_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP2_92G ,Color Palette 2_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP2_92B ,Color Palette 2_92 Blue" line.long 0x174 "CP2_93R,Color Palette 2 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP2_93A ,Color Palette 2_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP2_93R ,Color Palette 2_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP2_93G ,Color Palette 2_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP2_93B ,Color Palette 2_93 Blue" line.long 0x178 "CP2_94R,Color Palette 2 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP2_94A ,Color Palette 2_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP2_94R ,Color Palette 2_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP2_94G ,Color Palette 2_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP2_94B ,Color Palette 2_94 Blue" line.long 0x17C "CP2_95R,Color Palette 2 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP2_95A ,Color Palette 2_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP2_95R ,Color Palette 2_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP2_95G ,Color Palette 2_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP2_95B ,Color Palette 2_95 Blue" line.long 0x180 "CP2_96R,Color Palette 2 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP2_96A ,Color Palette 2_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP2_96R ,Color Palette 2_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP2_96G ,Color Palette 2_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP2_96B ,Color Palette 2_96 Blue" line.long 0x184 "CP2_97R,Color Palette 2 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP2_97A ,Color Palette 2_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP2_97R ,Color Palette 2_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP2_97G ,Color Palette 2_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP2_97B ,Color Palette 2_97 Blue" line.long 0x188 "CP2_98R,Color Palette 2 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP2_98A ,Color Palette 2_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP2_98R ,Color Palette 2_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP2_98G ,Color Palette 2_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP2_98B ,Color Palette 2_98 Blue" line.long 0x18C "CP2_99R,Color Palette 2 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP2_99A ,Color Palette 2_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP2_99R ,Color Palette 2_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP2_99G ,Color Palette 2_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP2_99B ,Color Palette 2_99 Blue" line.long 0x190 "CP2_100R,Color Palette 2 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP2_100A ,Color Palette 2_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP2_100R ,Color Palette 2_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP2_100G ,Color Palette 2_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP2_100B ,Color Palette 2_100 Blue" line.long 0x194 "CP2_101R,Color Palette 2 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP2_101A ,Color Palette 2_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP2_101R ,Color Palette 2_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP2_101G ,Color Palette 2_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP2_101B ,Color Palette 2_101 Blue" line.long 0x198 "CP2_102R,Color Palette 2 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP2_102A ,Color Palette 2_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP2_102R ,Color Palette 2_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP2_102G ,Color Palette 2_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP2_102B ,Color Palette 2_102 Blue" line.long 0x19C "CP2_103R,Color Palette 2 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP2_103A ,Color Palette 2_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP2_103R ,Color Palette 2_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP2_103G ,Color Palette 2_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP2_103B ,Color Palette 2_103 Blue" line.long 0x1A0 "CP2_104R,Color Palette 2 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP2_104A ,Color Palette 2_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP2_104R ,Color Palette 2_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP2_104G ,Color Palette 2_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP2_104B ,Color Palette 2_104 Blue" line.long 0x1A4 "CP2_105R,Color Palette 2 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP2_105A ,Color Palette 2_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP2_105R ,Color Palette 2_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP2_105G ,Color Palette 2_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP2_105B ,Color Palette 2_105 Blue" line.long 0x1A8 "CP2_106R,Color Palette 2 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP2_106A ,Color Palette 2_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP2_106R ,Color Palette 2_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP2_106G ,Color Palette 2_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP2_106B ,Color Palette 2_106 Blue" line.long 0x1AC "CP2_107R,Color Palette 2 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP2_107A ,Color Palette 2_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP2_107R ,Color Palette 2_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP2_107G ,Color Palette 2_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP2_107B ,Color Palette 2_107 Blue" line.long 0x1B0 "CP2_108R,Color Palette 2 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP2_108A ,Color Palette 2_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP2_108R ,Color Palette 2_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP2_108G ,Color Palette 2_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP2_108B ,Color Palette 2_108 Blue" line.long 0x1B4 "CP2_109R,Color Palette 2 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP2_109A ,Color Palette 2_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP2_109R ,Color Palette 2_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP2_109G ,Color Palette 2_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP2_109B ,Color Palette 2_109 Blue" line.long 0x1B8 "CP2_110R,Color Palette 2 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP2_110A ,Color Palette 2_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP2_110R ,Color Palette 2_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP2_110G ,Color Palette 2_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP2_110B ,Color Palette 2_110 Blue" line.long 0x1BC "CP2_111R,Color Palette 2 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP2_111A ,Color Palette 2_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP2_111R ,Color Palette 2_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP2_111G ,Color Palette 2_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP2_111B ,Color Palette 2_111 Blue" line.long 0x1C0 "CP2_112R,Color Palette 2 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP2_112A ,Color Palette 2_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP2_112R ,Color Palette 2_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP2_112G ,Color Palette 2_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP2_112B ,Color Palette 2_112 Blue" line.long 0x1C4 "CP2_113R,Color Palette 2 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP2_113A ,Color Palette 2_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP2_113R ,Color Palette 2_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP2_113G ,Color Palette 2_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP2_113B ,Color Palette 2_113 Blue" line.long 0x1C8 "CP2_114R,Color Palette 2 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP2_114A ,Color Palette 2_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP2_114R ,Color Palette 2_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP2_114G ,Color Palette 2_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP2_114B ,Color Palette 2_114 Blue" line.long 0x1CC "CP2_115R,Color Palette 2 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP2_115A ,Color Palette 2_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP2_115R ,Color Palette 2_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP2_115G ,Color Palette 2_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP2_115B ,Color Palette 2_115 Blue" line.long 0x1D0 "CP2_116R,Color Palette 2 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP2_116A ,Color Palette 2_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP2_116R ,Color Palette 2_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP2_116G ,Color Palette 2_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP2_116B ,Color Palette 2_116 Blue" line.long 0x1D4 "CP2_117R,Color Palette 2 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP2_117A ,Color Palette 2_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP2_117R ,Color Palette 2_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP2_117G ,Color Palette 2_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP2_117B ,Color Palette 2_117 Blue" line.long 0x1D8 "CP2_118R,Color Palette 2 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP2_118A ,Color Palette 2_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP2_118R ,Color Palette 2_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP2_118G ,Color Palette 2_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP2_118B ,Color Palette 2_118 Blue" line.long 0x1DC "CP2_119R,Color Palette 2 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP2_119A ,Color Palette 2_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP2_119R ,Color Palette 2_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP2_119G ,Color Palette 2_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP2_119B ,Color Palette 2_119 Blue" line.long 0x1E0 "CP2_120R,Color Palette 2 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP2_120A ,Color Palette 2_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP2_120R ,Color Palette 2_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP2_120G ,Color Palette 2_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP2_120B ,Color Palette 2_120 Blue" line.long 0x1E4 "CP2_121R,Color Palette 2 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP2_121A ,Color Palette 2_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP2_121R ,Color Palette 2_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP2_121G ,Color Palette 2_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP2_121B ,Color Palette 2_121 Blue" line.long 0x1E8 "CP2_122R,Color Palette 2 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP2_122A ,Color Palette 2_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP2_122R ,Color Palette 2_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP2_122G ,Color Palette 2_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP2_122B ,Color Palette 2_122 Blue" line.long 0x1EC "CP2_123R,Color Palette 2 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP2_123A ,Color Palette 2_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP2_123R ,Color Palette 2_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP2_123G ,Color Palette 2_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP2_123B ,Color Palette 2_123 Blue" line.long 0x1F0 "CP2_124R,Color Palette 2 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP2_124A ,Color Palette 2_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP2_124R ,Color Palette 2_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP2_124G ,Color Palette 2_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP2_124B ,Color Palette 2_124 Blue" line.long 0x1F4 "CP2_125R,Color Palette 2 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP2_125A ,Color Palette 2_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP2_125R ,Color Palette 2_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP2_125G ,Color Palette 2_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP2_125B ,Color Palette 2_125 Blue" line.long 0x1F8 "CP2_126R,Color Palette 2 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP2_126A ,Color Palette 2_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP2_126R ,Color Palette 2_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP2_126G ,Color Palette 2_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP2_126B ,Color Palette 2_126 Blue" line.long 0x1FC "CP2_127R,Color Palette 2 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP2_127A ,Color Palette 2_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP2_127R ,Color Palette 2_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP2_127G ,Color Palette 2_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP2_127B ,Color Palette 2_127 Blue" line.long 0x200 "CP2_128R,Color Palette 2 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP2_128A ,Color Palette 2_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP2_128R ,Color Palette 2_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP2_128G ,Color Palette 2_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP2_128B ,Color Palette 2_128 Blue" line.long 0x204 "CP2_129R,Color Palette 2 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP2_129A ,Color Palette 2_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP2_129R ,Color Palette 2_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP2_129G ,Color Palette 2_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP2_129B ,Color Palette 2_129 Blue" line.long 0x208 "CP2_130R,Color Palette 2 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP2_130A ,Color Palette 2_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP2_130R ,Color Palette 2_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP2_130G ,Color Palette 2_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP2_130B ,Color Palette 2_130 Blue" line.long 0x20C "CP2_131R,Color Palette 2 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP2_131A ,Color Palette 2_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP2_131R ,Color Palette 2_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP2_131G ,Color Palette 2_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP2_131B ,Color Palette 2_131 Blue" line.long 0x210 "CP2_132R,Color Palette 2 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP2_132A ,Color Palette 2_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP2_132R ,Color Palette 2_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP2_132G ,Color Palette 2_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP2_132B ,Color Palette 2_132 Blue" line.long 0x214 "CP2_133R,Color Palette 2 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP2_133A ,Color Palette 2_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP2_133R ,Color Palette 2_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP2_133G ,Color Palette 2_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP2_133B ,Color Palette 2_133 Blue" line.long 0x218 "CP2_134R,Color Palette 2 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP2_134A ,Color Palette 2_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP2_134R ,Color Palette 2_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP2_134G ,Color Palette 2_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP2_134B ,Color Palette 2_134 Blue" line.long 0x21C "CP2_135R,Color Palette 2 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP2_135A ,Color Palette 2_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP2_135R ,Color Palette 2_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP2_135G ,Color Palette 2_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP2_135B ,Color Palette 2_135 Blue" line.long 0x220 "CP2_136R,Color Palette 2 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP2_136A ,Color Palette 2_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP2_136R ,Color Palette 2_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP2_136G ,Color Palette 2_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP2_136B ,Color Palette 2_136 Blue" line.long 0x224 "CP2_137R,Color Palette 2 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP2_137A ,Color Palette 2_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP2_137R ,Color Palette 2_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP2_137G ,Color Palette 2_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP2_137B ,Color Palette 2_137 Blue" line.long 0x228 "CP2_138R,Color Palette 2 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP2_138A ,Color Palette 2_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP2_138R ,Color Palette 2_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP2_138G ,Color Palette 2_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP2_138B ,Color Palette 2_138 Blue" line.long 0x22C "CP2_139R,Color Palette 2 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP2_139A ,Color Palette 2_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP2_139R ,Color Palette 2_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP2_139G ,Color Palette 2_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP2_139B ,Color Palette 2_139 Blue" line.long 0x230 "CP2_140R,Color Palette 2 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP2_140A ,Color Palette 2_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP2_140R ,Color Palette 2_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP2_140G ,Color Palette 2_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP2_140B ,Color Palette 2_140 Blue" line.long 0x234 "CP2_141R,Color Palette 2 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP2_141A ,Color Palette 2_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP2_141R ,Color Palette 2_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP2_141G ,Color Palette 2_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP2_141B ,Color Palette 2_141 Blue" line.long 0x238 "CP2_142R,Color Palette 2 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP2_142A ,Color Palette 2_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP2_142R ,Color Palette 2_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP2_142G ,Color Palette 2_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP2_142B ,Color Palette 2_142 Blue" line.long 0x23C "CP2_143R,Color Palette 2 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP2_143A ,Color Palette 2_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP2_143R ,Color Palette 2_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP2_143G ,Color Palette 2_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP2_143B ,Color Palette 2_143 Blue" line.long 0x240 "CP2_144R,Color Palette 2 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP2_144A ,Color Palette 2_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP2_144R ,Color Palette 2_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP2_144G ,Color Palette 2_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP2_144B ,Color Palette 2_144 Blue" line.long 0x244 "CP2_145R,Color Palette 2 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP2_145A ,Color Palette 2_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP2_145R ,Color Palette 2_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP2_145G ,Color Palette 2_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP2_145B ,Color Palette 2_145 Blue" line.long 0x248 "CP2_146R,Color Palette 2 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP2_146A ,Color Palette 2_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP2_146R ,Color Palette 2_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP2_146G ,Color Palette 2_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP2_146B ,Color Palette 2_146 Blue" line.long 0x24C "CP2_147R,Color Palette 2 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP2_147A ,Color Palette 2_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP2_147R ,Color Palette 2_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP2_147G ,Color Palette 2_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP2_147B ,Color Palette 2_147 Blue" line.long 0x250 "CP2_148R,Color Palette 2 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP2_148A ,Color Palette 2_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP2_148R ,Color Palette 2_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP2_148G ,Color Palette 2_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP2_148B ,Color Palette 2_148 Blue" line.long 0x254 "CP2_149R,Color Palette 2 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP2_149A ,Color Palette 2_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP2_149R ,Color Palette 2_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP2_149G ,Color Palette 2_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP2_149B ,Color Palette 2_149 Blue" line.long 0x258 "CP2_150R,Color Palette 2 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP2_150A ,Color Palette 2_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP2_150R ,Color Palette 2_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP2_150G ,Color Palette 2_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP2_150B ,Color Palette 2_150 Blue" line.long 0x25C "CP2_151R,Color Palette 2 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP2_151A ,Color Palette 2_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP2_151R ,Color Palette 2_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP2_151G ,Color Palette 2_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP2_151B ,Color Palette 2_151 Blue" line.long 0x260 "CP2_152R,Color Palette 2 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP2_152A ,Color Palette 2_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP2_152R ,Color Palette 2_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP2_152G ,Color Palette 2_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP2_152B ,Color Palette 2_152 Blue" line.long 0x264 "CP2_153R,Color Palette 2 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP2_153A ,Color Palette 2_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP2_153R ,Color Palette 2_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP2_153G ,Color Palette 2_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP2_153B ,Color Palette 2_153 Blue" line.long 0x268 "CP2_154R,Color Palette 2 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP2_154A ,Color Palette 2_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP2_154R ,Color Palette 2_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP2_154G ,Color Palette 2_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP2_154B ,Color Palette 2_154 Blue" line.long 0x26C "CP2_155R,Color Palette 2 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP2_155A ,Color Palette 2_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP2_155R ,Color Palette 2_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP2_155G ,Color Palette 2_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP2_155B ,Color Palette 2_155 Blue" line.long 0x270 "CP2_156R,Color Palette 2 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP2_156A ,Color Palette 2_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP2_156R ,Color Palette 2_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP2_156G ,Color Palette 2_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP2_156B ,Color Palette 2_156 Blue" line.long 0x274 "CP2_157R,Color Palette 2 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP2_157A ,Color Palette 2_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP2_157R ,Color Palette 2_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP2_157G ,Color Palette 2_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP2_157B ,Color Palette 2_157 Blue" line.long 0x278 "CP2_158R,Color Palette 2 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP2_158A ,Color Palette 2_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP2_158R ,Color Palette 2_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP2_158G ,Color Palette 2_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP2_158B ,Color Palette 2_158 Blue" line.long 0x27C "CP2_159R,Color Palette 2 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP2_159A ,Color Palette 2_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP2_159R ,Color Palette 2_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP2_159G ,Color Palette 2_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP2_159B ,Color Palette 2_159 Blue" line.long 0x280 "CP2_160R,Color Palette 2 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP2_160A ,Color Palette 2_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP2_160R ,Color Palette 2_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP2_160G ,Color Palette 2_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP2_160B ,Color Palette 2_160 Blue" line.long 0x284 "CP2_161R,Color Palette 2 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP2_161A ,Color Palette 2_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP2_161R ,Color Palette 2_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP2_161G ,Color Palette 2_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP2_161B ,Color Palette 2_161 Blue" line.long 0x288 "CP2_162R,Color Palette 2 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP2_162A ,Color Palette 2_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP2_162R ,Color Palette 2_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP2_162G ,Color Palette 2_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP2_162B ,Color Palette 2_162 Blue" line.long 0x28C "CP2_163R,Color Palette 2 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP2_163A ,Color Palette 2_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP2_163R ,Color Palette 2_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP2_163G ,Color Palette 2_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP2_163B ,Color Palette 2_163 Blue" line.long 0x290 "CP2_164R,Color Palette 2 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP2_164A ,Color Palette 2_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP2_164R ,Color Palette 2_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP2_164G ,Color Palette 2_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP2_164B ,Color Palette 2_164 Blue" line.long 0x294 "CP2_165R,Color Palette 2 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP2_165A ,Color Palette 2_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP2_165R ,Color Palette 2_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP2_165G ,Color Palette 2_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP2_165B ,Color Palette 2_165 Blue" line.long 0x298 "CP2_166R,Color Palette 2 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP2_166A ,Color Palette 2_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP2_166R ,Color Palette 2_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP2_166G ,Color Palette 2_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP2_166B ,Color Palette 2_166 Blue" line.long 0x29C "CP2_167R,Color Palette 2 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP2_167A ,Color Palette 2_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP2_167R ,Color Palette 2_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP2_167G ,Color Palette 2_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP2_167B ,Color Palette 2_167 Blue" line.long 0x2A0 "CP2_168R,Color Palette 2 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP2_168A ,Color Palette 2_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP2_168R ,Color Palette 2_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP2_168G ,Color Palette 2_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP2_168B ,Color Palette 2_168 Blue" line.long 0x2A4 "CP2_169R,Color Palette 2 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP2_169A ,Color Palette 2_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP2_169R ,Color Palette 2_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP2_169G ,Color Palette 2_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP2_169B ,Color Palette 2_169 Blue" line.long 0x2A8 "CP2_170R,Color Palette 2 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP2_170A ,Color Palette 2_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP2_170R ,Color Palette 2_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP2_170G ,Color Palette 2_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP2_170B ,Color Palette 2_170 Blue" line.long 0x2AC "CP2_171R,Color Palette 2 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP2_171A ,Color Palette 2_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP2_171R ,Color Palette 2_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP2_171G ,Color Palette 2_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP2_171B ,Color Palette 2_171 Blue" line.long 0x2B0 "CP2_172R,Color Palette 2 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP2_172A ,Color Palette 2_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP2_172R ,Color Palette 2_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP2_172G ,Color Palette 2_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP2_172B ,Color Palette 2_172 Blue" line.long 0x2B4 "CP2_173R,Color Palette 2 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP2_173A ,Color Palette 2_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP2_173R ,Color Palette 2_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP2_173G ,Color Palette 2_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP2_173B ,Color Palette 2_173 Blue" line.long 0x2B8 "CP2_174R,Color Palette 2 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP2_174A ,Color Palette 2_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP2_174R ,Color Palette 2_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP2_174G ,Color Palette 2_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP2_174B ,Color Palette 2_174 Blue" line.long 0x2BC "CP2_175R,Color Palette 2 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP2_175A ,Color Palette 2_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP2_175R ,Color Palette 2_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP2_175G ,Color Palette 2_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP2_175B ,Color Palette 2_175 Blue" line.long 0x2C0 "CP2_176R,Color Palette 2 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP2_176A ,Color Palette 2_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP2_176R ,Color Palette 2_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP2_176G ,Color Palette 2_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP2_176B ,Color Palette 2_176 Blue" line.long 0x2C4 "CP2_177R,Color Palette 2 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP2_177A ,Color Palette 2_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP2_177R ,Color Palette 2_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP2_177G ,Color Palette 2_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP2_177B ,Color Palette 2_177 Blue" line.long 0x2C8 "CP2_178R,Color Palette 2 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP2_178A ,Color Palette 2_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP2_178R ,Color Palette 2_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP2_178G ,Color Palette 2_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP2_178B ,Color Palette 2_178 Blue" line.long 0x2CC "CP2_179R,Color Palette 2 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP2_179A ,Color Palette 2_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP2_179R ,Color Palette 2_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP2_179G ,Color Palette 2_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP2_179B ,Color Palette 2_179 Blue" line.long 0x2D0 "CP2_180R,Color Palette 2 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP2_180A ,Color Palette 2_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP2_180R ,Color Palette 2_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP2_180G ,Color Palette 2_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP2_180B ,Color Palette 2_180 Blue" line.long 0x2D4 "CP2_181R,Color Palette 2 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP2_181A ,Color Palette 2_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP2_181R ,Color Palette 2_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP2_181G ,Color Palette 2_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP2_181B ,Color Palette 2_181 Blue" line.long 0x2D8 "CP2_182R,Color Palette 2 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP2_182A ,Color Palette 2_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP2_182R ,Color Palette 2_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP2_182G ,Color Palette 2_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP2_182B ,Color Palette 2_182 Blue" line.long 0x2DC "CP2_183R,Color Palette 2 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP2_183A ,Color Palette 2_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP2_183R ,Color Palette 2_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP2_183G ,Color Palette 2_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP2_183B ,Color Palette 2_183 Blue" line.long 0x2E0 "CP2_184R,Color Palette 2 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP2_184A ,Color Palette 2_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP2_184R ,Color Palette 2_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP2_184G ,Color Palette 2_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP2_184B ,Color Palette 2_184 Blue" line.long 0x2E4 "CP2_185R,Color Palette 2 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP2_185A ,Color Palette 2_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP2_185R ,Color Palette 2_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP2_185G ,Color Palette 2_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP2_185B ,Color Palette 2_185 Blue" line.long 0x2E8 "CP2_186R,Color Palette 2 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP2_186A ,Color Palette 2_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP2_186R ,Color Palette 2_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP2_186G ,Color Palette 2_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP2_186B ,Color Palette 2_186 Blue" line.long 0x2EC "CP2_187R,Color Palette 2 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP2_187A ,Color Palette 2_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP2_187R ,Color Palette 2_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP2_187G ,Color Palette 2_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP2_187B ,Color Palette 2_187 Blue" line.long 0x2F0 "CP2_188R,Color Palette 2 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP2_188A ,Color Palette 2_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP2_188R ,Color Palette 2_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP2_188G ,Color Palette 2_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP2_188B ,Color Palette 2_188 Blue" line.long 0x2F4 "CP2_189R,Color Palette 2 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP2_189A ,Color Palette 2_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP2_189R ,Color Palette 2_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP2_189G ,Color Palette 2_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP2_189B ,Color Palette 2_189 Blue" line.long 0x2F8 "CP2_190R,Color Palette 2 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP2_190A ,Color Palette 2_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP2_190R ,Color Palette 2_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP2_190G ,Color Palette 2_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP2_190B ,Color Palette 2_190 Blue" line.long 0x2FC "CP2_191R,Color Palette 2 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP2_191A ,Color Palette 2_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP2_191R ,Color Palette 2_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP2_191G ,Color Palette 2_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP2_191B ,Color Palette 2_191 Blue" line.long 0x300 "CP2_192R,Color Palette 2 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP2_192A ,Color Palette 2_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP2_192R ,Color Palette 2_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP2_192G ,Color Palette 2_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP2_192B ,Color Palette 2_192 Blue" line.long 0x304 "CP2_193R,Color Palette 2 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP2_193A ,Color Palette 2_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP2_193R ,Color Palette 2_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP2_193G ,Color Palette 2_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP2_193B ,Color Palette 2_193 Blue" line.long 0x308 "CP2_194R,Color Palette 2 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP2_194A ,Color Palette 2_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP2_194R ,Color Palette 2_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP2_194G ,Color Palette 2_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP2_194B ,Color Palette 2_194 Blue" line.long 0x30C "CP2_195R,Color Palette 2 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP2_195A ,Color Palette 2_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP2_195R ,Color Palette 2_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP2_195G ,Color Palette 2_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP2_195B ,Color Palette 2_195 Blue" line.long 0x310 "CP2_196R,Color Palette 2 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP2_196A ,Color Palette 2_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP2_196R ,Color Palette 2_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP2_196G ,Color Palette 2_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP2_196B ,Color Palette 2_196 Blue" line.long 0x314 "CP2_197R,Color Palette 2 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP2_197A ,Color Palette 2_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP2_197R ,Color Palette 2_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP2_197G ,Color Palette 2_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP2_197B ,Color Palette 2_197 Blue" line.long 0x318 "CP2_198R,Color Palette 2 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP2_198A ,Color Palette 2_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP2_198R ,Color Palette 2_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP2_198G ,Color Palette 2_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP2_198B ,Color Palette 2_198 Blue" line.long 0x31C "CP2_199R,Color Palette 2 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP2_199A ,Color Palette 2_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP2_199R ,Color Palette 2_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP2_199G ,Color Palette 2_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP2_199B ,Color Palette 2_199 Blue" line.long 0x320 "CP2_200R,Color Palette 2 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP2_200A ,Color Palette 2_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP2_200R ,Color Palette 2_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP2_200G ,Color Palette 2_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP2_200B ,Color Palette 2_200 Blue" line.long 0x324 "CP2_201R,Color Palette 2 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP2_201A ,Color Palette 2_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP2_201R ,Color Palette 2_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP2_201G ,Color Palette 2_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP2_201B ,Color Palette 2_201 Blue" line.long 0x328 "CP2_202R,Color Palette 2 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP2_202A ,Color Palette 2_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP2_202R ,Color Palette 2_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP2_202G ,Color Palette 2_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP2_202B ,Color Palette 2_202 Blue" line.long 0x32C "CP2_203R,Color Palette 2 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP2_203A ,Color Palette 2_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP2_203R ,Color Palette 2_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP2_203G ,Color Palette 2_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP2_203B ,Color Palette 2_203 Blue" line.long 0x330 "CP2_204R,Color Palette 2 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP2_204A ,Color Palette 2_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP2_204R ,Color Palette 2_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP2_204G ,Color Palette 2_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP2_204B ,Color Palette 2_204 Blue" line.long 0x334 "CP2_205R,Color Palette 2 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP2_205A ,Color Palette 2_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP2_205R ,Color Palette 2_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP2_205G ,Color Palette 2_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP2_205B ,Color Palette 2_205 Blue" line.long 0x338 "CP2_206R,Color Palette 2 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP2_206A ,Color Palette 2_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP2_206R ,Color Palette 2_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP2_206G ,Color Palette 2_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP2_206B ,Color Palette 2_206 Blue" line.long 0x33C "CP2_207R,Color Palette 2 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP2_207A ,Color Palette 2_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP2_207R ,Color Palette 2_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP2_207G ,Color Palette 2_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP2_207B ,Color Palette 2_207 Blue" line.long 0x340 "CP2_208R,Color Palette 2 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP2_208A ,Color Palette 2_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP2_208R ,Color Palette 2_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP2_208G ,Color Palette 2_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP2_208B ,Color Palette 2_208 Blue" line.long 0x344 "CP2_209R,Color Palette 2 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP2_209A ,Color Palette 2_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP2_209R ,Color Palette 2_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP2_209G ,Color Palette 2_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP2_209B ,Color Palette 2_209 Blue" line.long 0x348 "CP2_210R,Color Palette 2 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP2_210A ,Color Palette 2_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP2_210R ,Color Palette 2_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP2_210G ,Color Palette 2_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP2_210B ,Color Palette 2_210 Blue" line.long 0x34C "CP2_211R,Color Palette 2 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP2_211A ,Color Palette 2_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP2_211R ,Color Palette 2_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP2_211G ,Color Palette 2_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP2_211B ,Color Palette 2_211 Blue" line.long 0x350 "CP2_212R,Color Palette 2 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP2_212A ,Color Palette 2_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP2_212R ,Color Palette 2_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP2_212G ,Color Palette 2_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP2_212B ,Color Palette 2_212 Blue" line.long 0x354 "CP2_213R,Color Palette 2 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP2_213A ,Color Palette 2_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP2_213R ,Color Palette 2_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP2_213G ,Color Palette 2_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP2_213B ,Color Palette 2_213 Blue" line.long 0x358 "CP2_214R,Color Palette 2 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP2_214A ,Color Palette 2_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP2_214R ,Color Palette 2_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP2_214G ,Color Palette 2_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP2_214B ,Color Palette 2_214 Blue" line.long 0x35C "CP2_215R,Color Palette 2 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP2_215A ,Color Palette 2_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP2_215R ,Color Palette 2_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP2_215G ,Color Palette 2_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP2_215B ,Color Palette 2_215 Blue" line.long 0x360 "CP2_216R,Color Palette 2 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP2_216A ,Color Palette 2_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP2_216R ,Color Palette 2_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP2_216G ,Color Palette 2_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP2_216B ,Color Palette 2_216 Blue" line.long 0x364 "CP2_217R,Color Palette 2 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP2_217A ,Color Palette 2_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP2_217R ,Color Palette 2_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP2_217G ,Color Palette 2_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP2_217B ,Color Palette 2_217 Blue" line.long 0x368 "CP2_218R,Color Palette 2 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP2_218A ,Color Palette 2_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP2_218R ,Color Palette 2_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP2_218G ,Color Palette 2_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP2_218B ,Color Palette 2_218 Blue" line.long 0x36C "CP2_219R,Color Palette 2 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP2_219A ,Color Palette 2_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP2_219R ,Color Palette 2_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP2_219G ,Color Palette 2_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP2_219B ,Color Palette 2_219 Blue" line.long 0x370 "CP2_220R,Color Palette 2 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP2_220A ,Color Palette 2_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP2_220R ,Color Palette 2_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP2_220G ,Color Palette 2_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP2_220B ,Color Palette 2_220 Blue" line.long 0x374 "CP2_221R,Color Palette 2 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP2_221A ,Color Palette 2_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP2_221R ,Color Palette 2_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP2_221G ,Color Palette 2_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP2_221B ,Color Palette 2_221 Blue" line.long 0x378 "CP2_222R,Color Palette 2 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP2_222A ,Color Palette 2_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP2_222R ,Color Palette 2_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP2_222G ,Color Palette 2_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP2_222B ,Color Palette 2_222 Blue" line.long 0x37C "CP2_223R,Color Palette 2 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP2_223A ,Color Palette 2_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP2_223R ,Color Palette 2_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP2_223G ,Color Palette 2_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP2_223B ,Color Palette 2_223 Blue" line.long 0x380 "CP2_224R,Color Palette 2 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP2_224A ,Color Palette 2_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP2_224R ,Color Palette 2_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP2_224G ,Color Palette 2_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP2_224B ,Color Palette 2_224 Blue" line.long 0x384 "CP2_225R,Color Palette 2 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP2_225A ,Color Palette 2_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP2_225R ,Color Palette 2_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP2_225G ,Color Palette 2_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP2_225B ,Color Palette 2_225 Blue" line.long 0x388 "CP2_226R,Color Palette 2 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP2_226A ,Color Palette 2_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP2_226R ,Color Palette 2_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP2_226G ,Color Palette 2_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP2_226B ,Color Palette 2_226 Blue" line.long 0x38C "CP2_227R,Color Palette 2 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP2_227A ,Color Palette 2_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP2_227R ,Color Palette 2_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP2_227G ,Color Palette 2_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP2_227B ,Color Palette 2_227 Blue" line.long 0x390 "CP2_228R,Color Palette 2 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP2_228A ,Color Palette 2_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP2_228R ,Color Palette 2_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP2_228G ,Color Palette 2_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP2_228B ,Color Palette 2_228 Blue" line.long 0x394 "CP2_229R,Color Palette 2 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP2_229A ,Color Palette 2_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP2_229R ,Color Palette 2_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP2_229G ,Color Palette 2_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP2_229B ,Color Palette 2_229 Blue" line.long 0x398 "CP2_230R,Color Palette 2 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP2_230A ,Color Palette 2_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP2_230R ,Color Palette 2_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP2_230G ,Color Palette 2_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP2_230B ,Color Palette 2_230 Blue" line.long 0x39C "CP2_231R,Color Palette 2 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP2_231A ,Color Palette 2_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP2_231R ,Color Palette 2_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP2_231G ,Color Palette 2_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP2_231B ,Color Palette 2_231 Blue" line.long 0x3A0 "CP2_232R,Color Palette 2 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP2_232A ,Color Palette 2_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP2_232R ,Color Palette 2_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP2_232G ,Color Palette 2_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP2_232B ,Color Palette 2_232 Blue" line.long 0x3A4 "CP2_233R,Color Palette 2 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP2_233A ,Color Palette 2_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP2_233R ,Color Palette 2_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP2_233G ,Color Palette 2_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP2_233B ,Color Palette 2_233 Blue" line.long 0x3A8 "CP2_234R,Color Palette 2 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP2_234A ,Color Palette 2_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP2_234R ,Color Palette 2_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP2_234G ,Color Palette 2_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP2_234B ,Color Palette 2_234 Blue" line.long 0x3AC "CP2_235R,Color Palette 2 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP2_235A ,Color Palette 2_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP2_235R ,Color Palette 2_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP2_235G ,Color Palette 2_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP2_235B ,Color Palette 2_235 Blue" line.long 0x3B0 "CP2_236R,Color Palette 2 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP2_236A ,Color Palette 2_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP2_236R ,Color Palette 2_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP2_236G ,Color Palette 2_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP2_236B ,Color Palette 2_236 Blue" line.long 0x3B4 "CP2_237R,Color Palette 2 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP2_237A ,Color Palette 2_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP2_237R ,Color Palette 2_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP2_237G ,Color Palette 2_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP2_237B ,Color Palette 2_237 Blue" line.long 0x3B8 "CP2_238R,Color Palette 2 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP2_238A ,Color Palette 2_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP2_238R ,Color Palette 2_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP2_238G ,Color Palette 2_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP2_238B ,Color Palette 2_238 Blue" line.long 0x3BC "CP2_239R,Color Palette 2 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP2_239A ,Color Palette 2_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP2_239R ,Color Palette 2_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP2_239G ,Color Palette 2_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP2_239B ,Color Palette 2_239 Blue" line.long 0x3C0 "CP2_240R,Color Palette 2 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP2_240A ,Color Palette 2_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP2_240R ,Color Palette 2_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP2_240G ,Color Palette 2_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP2_240B ,Color Palette 2_240 Blue" line.long 0x3C4 "CP2_241R,Color Palette 2 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP2_241A ,Color Palette 2_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP2_241R ,Color Palette 2_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP2_241G ,Color Palette 2_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP2_241B ,Color Palette 2_241 Blue" line.long 0x3C8 "CP2_242R,Color Palette 2 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP2_242A ,Color Palette 2_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP2_242R ,Color Palette 2_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP2_242G ,Color Palette 2_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP2_242B ,Color Palette 2_242 Blue" line.long 0x3CC "CP2_243R,Color Palette 2 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP2_243A ,Color Palette 2_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP2_243R ,Color Palette 2_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP2_243G ,Color Palette 2_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP2_243B ,Color Palette 2_243 Blue" line.long 0x3D0 "CP2_244R,Color Palette 2 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP2_244A ,Color Palette 2_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP2_244R ,Color Palette 2_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP2_244G ,Color Palette 2_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP2_244B ,Color Palette 2_244 Blue" line.long 0x3D4 "CP2_245R,Color Palette 2 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP2_245A ,Color Palette 2_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP2_245R ,Color Palette 2_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP2_245G ,Color Palette 2_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP2_245B ,Color Palette 2_245 Blue" line.long 0x3D8 "CP2_246R,Color Palette 2 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP2_246A ,Color Palette 2_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP2_246R ,Color Palette 2_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP2_246G ,Color Palette 2_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP2_246B ,Color Palette 2_246 Blue" line.long 0x3DC "CP2_247R,Color Palette 2 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP2_247A ,Color Palette 2_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP2_247R ,Color Palette 2_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP2_247G ,Color Palette 2_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP2_247B ,Color Palette 2_247 Blue" line.long 0x3E0 "CP2_248R,Color Palette 2 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP2_248A ,Color Palette 2_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP2_248R ,Color Palette 2_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP2_248G ,Color Palette 2_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP2_248B ,Color Palette 2_248 Blue" line.long 0x3E4 "CP2_249R,Color Palette 2 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP2_249A ,Color Palette 2_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP2_249R ,Color Palette 2_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP2_249G ,Color Palette 2_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP2_249B ,Color Palette 2_249 Blue" line.long 0x3E8 "CP2_250R,Color Palette 2 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP2_250A ,Color Palette 2_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP2_250R ,Color Palette 2_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP2_250G ,Color Palette 2_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP2_250B ,Color Palette 2_250 Blue" line.long 0x3EC "CP2_251R,Color Palette 2 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP2_251A ,Color Palette 2_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP2_251R ,Color Palette 2_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP2_251G ,Color Palette 2_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP2_251B ,Color Palette 2_251 Blue" line.long 0x3F0 "CP2_252R,Color Palette 2 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP2_252A ,Color Palette 2_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP2_252R ,Color Palette 2_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP2_252G ,Color Palette 2_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP2_252B ,Color Palette 2_252 Blue" line.long 0x3F4 "CP2_253R,Color Palette 2 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP2_253A ,Color Palette 2_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP2_253R ,Color Palette 2_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP2_253G ,Color Palette 2_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP2_253B ,Color Palette 2_253 Blue" line.long 0x3F8 "CP2_254R,Color Palette 2 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP2_254A ,Color Palette 2_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP2_254R ,Color Palette 2_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP2_254G ,Color Palette 2_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP2_254B ,Color Palette 2_254 Blue" line.long 0x3FC "CP2_255R,Color Palette 2 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP2_255A ,Color Palette 2_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP2_255R ,Color Palette 2_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP2_255G ,Color Palette 2_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP2_255B ,Color Palette 2_255 Blue" tree.end tree "Color Palette 3 Registers" width 10. group.long 0x3000++0x3ff line.long 0x0 "CP3_0R,Color Palette 3 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP3_0A ,Color Palette 3_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP3_0R ,Color Palette 3_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP3_0G ,Color Palette 3_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP3_0B ,Color Palette 3_0 Blue" line.long 0x4 "CP3_1R,Color Palette 3 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP3_1A ,Color Palette 3_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP3_1R ,Color Palette 3_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP3_1G ,Color Palette 3_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP3_1B ,Color Palette 3_1 Blue" line.long 0x8 "CP3_2R,Color Palette 3 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP3_2A ,Color Palette 3_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP3_2R ,Color Palette 3_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP3_2G ,Color Palette 3_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP3_2B ,Color Palette 3_2 Blue" line.long 0xC "CP3_3R,Color Palette 3 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP3_3A ,Color Palette 3_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP3_3R ,Color Palette 3_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP3_3G ,Color Palette 3_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP3_3B ,Color Palette 3_3 Blue" line.long 0x10 "CP3_4R,Color Palette 3 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP3_4A ,Color Palette 3_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP3_4R ,Color Palette 3_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP3_4G ,Color Palette 3_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP3_4B ,Color Palette 3_4 Blue" line.long 0x14 "CP3_5R,Color Palette 3 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP3_5A ,Color Palette 3_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP3_5R ,Color Palette 3_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP3_5G ,Color Palette 3_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP3_5B ,Color Palette 3_5 Blue" line.long 0x18 "CP3_6R,Color Palette 3 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP3_6A ,Color Palette 3_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP3_6R ,Color Palette 3_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP3_6G ,Color Palette 3_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP3_6B ,Color Palette 3_6 Blue" line.long 0x1C "CP3_7R,Color Palette 3 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP3_7A ,Color Palette 3_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP3_7R ,Color Palette 3_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP3_7G ,Color Palette 3_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP3_7B ,Color Palette 3_7 Blue" line.long 0x20 "CP3_8R,Color Palette 3 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP3_8A ,Color Palette 3_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP3_8R ,Color Palette 3_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP3_8G ,Color Palette 3_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP3_8B ,Color Palette 3_8 Blue" line.long 0x24 "CP3_9R,Color Palette 3 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP3_9A ,Color Palette 3_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP3_9R ,Color Palette 3_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP3_9G ,Color Palette 3_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP3_9B ,Color Palette 3_9 Blue" line.long 0x28 "CP3_10R,Color Palette 3 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP3_10A ,Color Palette 3_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP3_10R ,Color Palette 3_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP3_10G ,Color Palette 3_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP3_10B ,Color Palette 3_10 Blue" line.long 0x2C "CP3_11R,Color Palette 3 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP3_11A ,Color Palette 3_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP3_11R ,Color Palette 3_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP3_11G ,Color Palette 3_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP3_11B ,Color Palette 3_11 Blue" line.long 0x30 "CP3_12R,Color Palette 3 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP3_12A ,Color Palette 3_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP3_12R ,Color Palette 3_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP3_12G ,Color Palette 3_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP3_12B ,Color Palette 3_12 Blue" line.long 0x34 "CP3_13R,Color Palette 3 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP3_13A ,Color Palette 3_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP3_13R ,Color Palette 3_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP3_13G ,Color Palette 3_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP3_13B ,Color Palette 3_13 Blue" line.long 0x38 "CP3_14R,Color Palette 3 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP3_14A ,Color Palette 3_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP3_14R ,Color Palette 3_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP3_14G ,Color Palette 3_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP3_14B ,Color Palette 3_14 Blue" line.long 0x3C "CP3_15R,Color Palette 3 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP3_15A ,Color Palette 3_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP3_15R ,Color Palette 3_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP3_15G ,Color Palette 3_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP3_15B ,Color Palette 3_15 Blue" line.long 0x40 "CP3_16R,Color Palette 3 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP3_16A ,Color Palette 3_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP3_16R ,Color Palette 3_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP3_16G ,Color Palette 3_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP3_16B ,Color Palette 3_16 Blue" line.long 0x44 "CP3_17R,Color Palette 3 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP3_17A ,Color Palette 3_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP3_17R ,Color Palette 3_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP3_17G ,Color Palette 3_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP3_17B ,Color Palette 3_17 Blue" line.long 0x48 "CP3_18R,Color Palette 3 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP3_18A ,Color Palette 3_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP3_18R ,Color Palette 3_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP3_18G ,Color Palette 3_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP3_18B ,Color Palette 3_18 Blue" line.long 0x4C "CP3_19R,Color Palette 3 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP3_19A ,Color Palette 3_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP3_19R ,Color Palette 3_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP3_19G ,Color Palette 3_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP3_19B ,Color Palette 3_19 Blue" line.long 0x50 "CP3_20R,Color Palette 3 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP3_20A ,Color Palette 3_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP3_20R ,Color Palette 3_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP3_20G ,Color Palette 3_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP3_20B ,Color Palette 3_20 Blue" line.long 0x54 "CP3_21R,Color Palette 3 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP3_21A ,Color Palette 3_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP3_21R ,Color Palette 3_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP3_21G ,Color Palette 3_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP3_21B ,Color Palette 3_21 Blue" line.long 0x58 "CP3_22R,Color Palette 3 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP3_22A ,Color Palette 3_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP3_22R ,Color Palette 3_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP3_22G ,Color Palette 3_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP3_22B ,Color Palette 3_22 Blue" line.long 0x5C "CP3_23R,Color Palette 3 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP3_23A ,Color Palette 3_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP3_23R ,Color Palette 3_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP3_23G ,Color Palette 3_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP3_23B ,Color Palette 3_23 Blue" line.long 0x60 "CP3_24R,Color Palette 3 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP3_24A ,Color Palette 3_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP3_24R ,Color Palette 3_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP3_24G ,Color Palette 3_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP3_24B ,Color Palette 3_24 Blue" line.long 0x64 "CP3_25R,Color Palette 3 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP3_25A ,Color Palette 3_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP3_25R ,Color Palette 3_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP3_25G ,Color Palette 3_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP3_25B ,Color Palette 3_25 Blue" line.long 0x68 "CP3_26R,Color Palette 3 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP3_26A ,Color Palette 3_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP3_26R ,Color Palette 3_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP3_26G ,Color Palette 3_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP3_26B ,Color Palette 3_26 Blue" line.long 0x6C "CP3_27R,Color Palette 3 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP3_27A ,Color Palette 3_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP3_27R ,Color Palette 3_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP3_27G ,Color Palette 3_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP3_27B ,Color Palette 3_27 Blue" line.long 0x70 "CP3_28R,Color Palette 3 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP3_28A ,Color Palette 3_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP3_28R ,Color Palette 3_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP3_28G ,Color Palette 3_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP3_28B ,Color Palette 3_28 Blue" line.long 0x74 "CP3_29R,Color Palette 3 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP3_29A ,Color Palette 3_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP3_29R ,Color Palette 3_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP3_29G ,Color Palette 3_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP3_29B ,Color Palette 3_29 Blue" line.long 0x78 "CP3_30R,Color Palette 3 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP3_30A ,Color Palette 3_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP3_30R ,Color Palette 3_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP3_30G ,Color Palette 3_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP3_30B ,Color Palette 3_30 Blue" line.long 0x7C "CP3_31R,Color Palette 3 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP3_31A ,Color Palette 3_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP3_31R ,Color Palette 3_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP3_31G ,Color Palette 3_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP3_31B ,Color Palette 3_31 Blue" line.long 0x80 "CP3_32R,Color Palette 3 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP3_32A ,Color Palette 3_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP3_32R ,Color Palette 3_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP3_32G ,Color Palette 3_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP3_32B ,Color Palette 3_32 Blue" line.long 0x84 "CP3_33R,Color Palette 3 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP3_33A ,Color Palette 3_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP3_33R ,Color Palette 3_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP3_33G ,Color Palette 3_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP3_33B ,Color Palette 3_33 Blue" line.long 0x88 "CP3_34R,Color Palette 3 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP3_34A ,Color Palette 3_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP3_34R ,Color Palette 3_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP3_34G ,Color Palette 3_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP3_34B ,Color Palette 3_34 Blue" line.long 0x8C "CP3_35R,Color Palette 3 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP3_35A ,Color Palette 3_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP3_35R ,Color Palette 3_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP3_35G ,Color Palette 3_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP3_35B ,Color Palette 3_35 Blue" line.long 0x90 "CP3_36R,Color Palette 3 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP3_36A ,Color Palette 3_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP3_36R ,Color Palette 3_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP3_36G ,Color Palette 3_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP3_36B ,Color Palette 3_36 Blue" line.long 0x94 "CP3_37R,Color Palette 3 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP3_37A ,Color Palette 3_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP3_37R ,Color Palette 3_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP3_37G ,Color Palette 3_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP3_37B ,Color Palette 3_37 Blue" line.long 0x98 "CP3_38R,Color Palette 3 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP3_38A ,Color Palette 3_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP3_38R ,Color Palette 3_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP3_38G ,Color Palette 3_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP3_38B ,Color Palette 3_38 Blue" line.long 0x9C "CP3_39R,Color Palette 3 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP3_39A ,Color Palette 3_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP3_39R ,Color Palette 3_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP3_39G ,Color Palette 3_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP3_39B ,Color Palette 3_39 Blue" line.long 0xA0 "CP3_40R,Color Palette 3 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP3_40A ,Color Palette 3_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP3_40R ,Color Palette 3_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP3_40G ,Color Palette 3_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP3_40B ,Color Palette 3_40 Blue" line.long 0xA4 "CP3_41R,Color Palette 3 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP3_41A ,Color Palette 3_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP3_41R ,Color Palette 3_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP3_41G ,Color Palette 3_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP3_41B ,Color Palette 3_41 Blue" line.long 0xA8 "CP3_42R,Color Palette 3 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP3_42A ,Color Palette 3_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP3_42R ,Color Palette 3_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP3_42G ,Color Palette 3_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP3_42B ,Color Palette 3_42 Blue" line.long 0xAC "CP3_43R,Color Palette 3 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP3_43A ,Color Palette 3_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP3_43R ,Color Palette 3_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP3_43G ,Color Palette 3_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP3_43B ,Color Palette 3_43 Blue" line.long 0xB0 "CP3_44R,Color Palette 3 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP3_44A ,Color Palette 3_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP3_44R ,Color Palette 3_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP3_44G ,Color Palette 3_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP3_44B ,Color Palette 3_44 Blue" line.long 0xB4 "CP3_45R,Color Palette 3 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP3_45A ,Color Palette 3_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP3_45R ,Color Palette 3_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP3_45G ,Color Palette 3_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP3_45B ,Color Palette 3_45 Blue" line.long 0xB8 "CP3_46R,Color Palette 3 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP3_46A ,Color Palette 3_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP3_46R ,Color Palette 3_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP3_46G ,Color Palette 3_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP3_46B ,Color Palette 3_46 Blue" line.long 0xBC "CP3_47R,Color Palette 3 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP3_47A ,Color Palette 3_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP3_47R ,Color Palette 3_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP3_47G ,Color Palette 3_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP3_47B ,Color Palette 3_47 Blue" line.long 0xC0 "CP3_48R,Color Palette 3 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP3_48A ,Color Palette 3_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP3_48R ,Color Palette 3_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP3_48G ,Color Palette 3_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP3_48B ,Color Palette 3_48 Blue" line.long 0xC4 "CP3_49R,Color Palette 3 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP3_49A ,Color Palette 3_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP3_49R ,Color Palette 3_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP3_49G ,Color Palette 3_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP3_49B ,Color Palette 3_49 Blue" line.long 0xC8 "CP3_50R,Color Palette 3 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP3_50A ,Color Palette 3_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP3_50R ,Color Palette 3_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP3_50G ,Color Palette 3_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP3_50B ,Color Palette 3_50 Blue" line.long 0xCC "CP3_51R,Color Palette 3 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP3_51A ,Color Palette 3_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP3_51R ,Color Palette 3_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP3_51G ,Color Palette 3_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP3_51B ,Color Palette 3_51 Blue" line.long 0xD0 "CP3_52R,Color Palette 3 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP3_52A ,Color Palette 3_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP3_52R ,Color Palette 3_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP3_52G ,Color Palette 3_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP3_52B ,Color Palette 3_52 Blue" line.long 0xD4 "CP3_53R,Color Palette 3 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP3_53A ,Color Palette 3_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP3_53R ,Color Palette 3_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP3_53G ,Color Palette 3_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP3_53B ,Color Palette 3_53 Blue" line.long 0xD8 "CP3_54R,Color Palette 3 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP3_54A ,Color Palette 3_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP3_54R ,Color Palette 3_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP3_54G ,Color Palette 3_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP3_54B ,Color Palette 3_54 Blue" line.long 0xDC "CP3_55R,Color Palette 3 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP3_55A ,Color Palette 3_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP3_55R ,Color Palette 3_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP3_55G ,Color Palette 3_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP3_55B ,Color Palette 3_55 Blue" line.long 0xE0 "CP3_56R,Color Palette 3 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP3_56A ,Color Palette 3_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP3_56R ,Color Palette 3_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP3_56G ,Color Palette 3_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP3_56B ,Color Palette 3_56 Blue" line.long 0xE4 "CP3_57R,Color Palette 3 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP3_57A ,Color Palette 3_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP3_57R ,Color Palette 3_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP3_57G ,Color Palette 3_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP3_57B ,Color Palette 3_57 Blue" line.long 0xE8 "CP3_58R,Color Palette 3 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP3_58A ,Color Palette 3_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP3_58R ,Color Palette 3_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP3_58G ,Color Palette 3_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP3_58B ,Color Palette 3_58 Blue" line.long 0xEC "CP3_59R,Color Palette 3 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP3_59A ,Color Palette 3_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP3_59R ,Color Palette 3_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP3_59G ,Color Palette 3_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP3_59B ,Color Palette 3_59 Blue" line.long 0xF0 "CP3_60R,Color Palette 3 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP3_60A ,Color Palette 3_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP3_60R ,Color Palette 3_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP3_60G ,Color Palette 3_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP3_60B ,Color Palette 3_60 Blue" line.long 0xF4 "CP3_61R,Color Palette 3 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP3_61A ,Color Palette 3_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP3_61R ,Color Palette 3_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP3_61G ,Color Palette 3_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP3_61B ,Color Palette 3_61 Blue" line.long 0xF8 "CP3_62R,Color Palette 3 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP3_62A ,Color Palette 3_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP3_62R ,Color Palette 3_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP3_62G ,Color Palette 3_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP3_62B ,Color Palette 3_62 Blue" line.long 0xFC "CP3_63R,Color Palette 3 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP3_63A ,Color Palette 3_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP3_63R ,Color Palette 3_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP3_63G ,Color Palette 3_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP3_63B ,Color Palette 3_63 Blue" line.long 0x100 "CP3_64R,Color Palette 3 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP3_64A ,Color Palette 3_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP3_64R ,Color Palette 3_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP3_64G ,Color Palette 3_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP3_64B ,Color Palette 3_64 Blue" line.long 0x104 "CP3_65R,Color Palette 3 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP3_65A ,Color Palette 3_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP3_65R ,Color Palette 3_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP3_65G ,Color Palette 3_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP3_65B ,Color Palette 3_65 Blue" line.long 0x108 "CP3_66R,Color Palette 3 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP3_66A ,Color Palette 3_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP3_66R ,Color Palette 3_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP3_66G ,Color Palette 3_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP3_66B ,Color Palette 3_66 Blue" line.long 0x10C "CP3_67R,Color Palette 3 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP3_67A ,Color Palette 3_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP3_67R ,Color Palette 3_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP3_67G ,Color Palette 3_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP3_67B ,Color Palette 3_67 Blue" line.long 0x110 "CP3_68R,Color Palette 3 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP3_68A ,Color Palette 3_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP3_68R ,Color Palette 3_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP3_68G ,Color Palette 3_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP3_68B ,Color Palette 3_68 Blue" line.long 0x114 "CP3_69R,Color Palette 3 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP3_69A ,Color Palette 3_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP3_69R ,Color Palette 3_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP3_69G ,Color Palette 3_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP3_69B ,Color Palette 3_69 Blue" line.long 0x118 "CP3_70R,Color Palette 3 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP3_70A ,Color Palette 3_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP3_70R ,Color Palette 3_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP3_70G ,Color Palette 3_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP3_70B ,Color Palette 3_70 Blue" line.long 0x11C "CP3_71R,Color Palette 3 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP3_71A ,Color Palette 3_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP3_71R ,Color Palette 3_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP3_71G ,Color Palette 3_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP3_71B ,Color Palette 3_71 Blue" line.long 0x120 "CP3_72R,Color Palette 3 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP3_72A ,Color Palette 3_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP3_72R ,Color Palette 3_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP3_72G ,Color Palette 3_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP3_72B ,Color Palette 3_72 Blue" line.long 0x124 "CP3_73R,Color Palette 3 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP3_73A ,Color Palette 3_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP3_73R ,Color Palette 3_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP3_73G ,Color Palette 3_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP3_73B ,Color Palette 3_73 Blue" line.long 0x128 "CP3_74R,Color Palette 3 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP3_74A ,Color Palette 3_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP3_74R ,Color Palette 3_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP3_74G ,Color Palette 3_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP3_74B ,Color Palette 3_74 Blue" line.long 0x12C "CP3_75R,Color Palette 3 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP3_75A ,Color Palette 3_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP3_75R ,Color Palette 3_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP3_75G ,Color Palette 3_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP3_75B ,Color Palette 3_75 Blue" line.long 0x130 "CP3_76R,Color Palette 3 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP3_76A ,Color Palette 3_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP3_76R ,Color Palette 3_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP3_76G ,Color Palette 3_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP3_76B ,Color Palette 3_76 Blue" line.long 0x134 "CP3_77R,Color Palette 3 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP3_77A ,Color Palette 3_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP3_77R ,Color Palette 3_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP3_77G ,Color Palette 3_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP3_77B ,Color Palette 3_77 Blue" line.long 0x138 "CP3_78R,Color Palette 3 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP3_78A ,Color Palette 3_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP3_78R ,Color Palette 3_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP3_78G ,Color Palette 3_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP3_78B ,Color Palette 3_78 Blue" line.long 0x13C "CP3_79R,Color Palette 3 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP3_79A ,Color Palette 3_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP3_79R ,Color Palette 3_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP3_79G ,Color Palette 3_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP3_79B ,Color Palette 3_79 Blue" line.long 0x140 "CP3_80R,Color Palette 3 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP3_80A ,Color Palette 3_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP3_80R ,Color Palette 3_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP3_80G ,Color Palette 3_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP3_80B ,Color Palette 3_80 Blue" line.long 0x144 "CP3_81R,Color Palette 3 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP3_81A ,Color Palette 3_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP3_81R ,Color Palette 3_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP3_81G ,Color Palette 3_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP3_81B ,Color Palette 3_81 Blue" line.long 0x148 "CP3_82R,Color Palette 3 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP3_82A ,Color Palette 3_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP3_82R ,Color Palette 3_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP3_82G ,Color Palette 3_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP3_82B ,Color Palette 3_82 Blue" line.long 0x14C "CP3_83R,Color Palette 3 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP3_83A ,Color Palette 3_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP3_83R ,Color Palette 3_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP3_83G ,Color Palette 3_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP3_83B ,Color Palette 3_83 Blue" line.long 0x150 "CP3_84R,Color Palette 3 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP3_84A ,Color Palette 3_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP3_84R ,Color Palette 3_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP3_84G ,Color Palette 3_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP3_84B ,Color Palette 3_84 Blue" line.long 0x154 "CP3_85R,Color Palette 3 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP3_85A ,Color Palette 3_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP3_85R ,Color Palette 3_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP3_85G ,Color Palette 3_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP3_85B ,Color Palette 3_85 Blue" line.long 0x158 "CP3_86R,Color Palette 3 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP3_86A ,Color Palette 3_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP3_86R ,Color Palette 3_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP3_86G ,Color Palette 3_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP3_86B ,Color Palette 3_86 Blue" line.long 0x15C "CP3_87R,Color Palette 3 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP3_87A ,Color Palette 3_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP3_87R ,Color Palette 3_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP3_87G ,Color Palette 3_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP3_87B ,Color Palette 3_87 Blue" line.long 0x160 "CP3_88R,Color Palette 3 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP3_88A ,Color Palette 3_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP3_88R ,Color Palette 3_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP3_88G ,Color Palette 3_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP3_88B ,Color Palette 3_88 Blue" line.long 0x164 "CP3_89R,Color Palette 3 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP3_89A ,Color Palette 3_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP3_89R ,Color Palette 3_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP3_89G ,Color Palette 3_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP3_89B ,Color Palette 3_89 Blue" line.long 0x168 "CP3_90R,Color Palette 3 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP3_90A ,Color Palette 3_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP3_90R ,Color Palette 3_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP3_90G ,Color Palette 3_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP3_90B ,Color Palette 3_90 Blue" line.long 0x16C "CP3_91R,Color Palette 3 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP3_91A ,Color Palette 3_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP3_91R ,Color Palette 3_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP3_91G ,Color Palette 3_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP3_91B ,Color Palette 3_91 Blue" line.long 0x170 "CP3_92R,Color Palette 3 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP3_92A ,Color Palette 3_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP3_92R ,Color Palette 3_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP3_92G ,Color Palette 3_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP3_92B ,Color Palette 3_92 Blue" line.long 0x174 "CP3_93R,Color Palette 3 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP3_93A ,Color Palette 3_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP3_93R ,Color Palette 3_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP3_93G ,Color Palette 3_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP3_93B ,Color Palette 3_93 Blue" line.long 0x178 "CP3_94R,Color Palette 3 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP3_94A ,Color Palette 3_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP3_94R ,Color Palette 3_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP3_94G ,Color Palette 3_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP3_94B ,Color Palette 3_94 Blue" line.long 0x17C "CP3_95R,Color Palette 3 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP3_95A ,Color Palette 3_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP3_95R ,Color Palette 3_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP3_95G ,Color Palette 3_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP3_95B ,Color Palette 3_95 Blue" line.long 0x180 "CP3_96R,Color Palette 3 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP3_96A ,Color Palette 3_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP3_96R ,Color Palette 3_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP3_96G ,Color Palette 3_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP3_96B ,Color Palette 3_96 Blue" line.long 0x184 "CP3_97R,Color Palette 3 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP3_97A ,Color Palette 3_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP3_97R ,Color Palette 3_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP3_97G ,Color Palette 3_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP3_97B ,Color Palette 3_97 Blue" line.long 0x188 "CP3_98R,Color Palette 3 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP3_98A ,Color Palette 3_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP3_98R ,Color Palette 3_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP3_98G ,Color Palette 3_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP3_98B ,Color Palette 3_98 Blue" line.long 0x18C "CP3_99R,Color Palette 3 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP3_99A ,Color Palette 3_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP3_99R ,Color Palette 3_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP3_99G ,Color Palette 3_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP3_99B ,Color Palette 3_99 Blue" line.long 0x190 "CP3_100R,Color Palette 3 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP3_100A ,Color Palette 3_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP3_100R ,Color Palette 3_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP3_100G ,Color Palette 3_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP3_100B ,Color Palette 3_100 Blue" line.long 0x194 "CP3_101R,Color Palette 3 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP3_101A ,Color Palette 3_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP3_101R ,Color Palette 3_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP3_101G ,Color Palette 3_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP3_101B ,Color Palette 3_101 Blue" line.long 0x198 "CP3_102R,Color Palette 3 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP3_102A ,Color Palette 3_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP3_102R ,Color Palette 3_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP3_102G ,Color Palette 3_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP3_102B ,Color Palette 3_102 Blue" line.long 0x19C "CP3_103R,Color Palette 3 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP3_103A ,Color Palette 3_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP3_103R ,Color Palette 3_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP3_103G ,Color Palette 3_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP3_103B ,Color Palette 3_103 Blue" line.long 0x1A0 "CP3_104R,Color Palette 3 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP3_104A ,Color Palette 3_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP3_104R ,Color Palette 3_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP3_104G ,Color Palette 3_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP3_104B ,Color Palette 3_104 Blue" line.long 0x1A4 "CP3_105R,Color Palette 3 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP3_105A ,Color Palette 3_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP3_105R ,Color Palette 3_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP3_105G ,Color Palette 3_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP3_105B ,Color Palette 3_105 Blue" line.long 0x1A8 "CP3_106R,Color Palette 3 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP3_106A ,Color Palette 3_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP3_106R ,Color Palette 3_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP3_106G ,Color Palette 3_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP3_106B ,Color Palette 3_106 Blue" line.long 0x1AC "CP3_107R,Color Palette 3 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP3_107A ,Color Palette 3_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP3_107R ,Color Palette 3_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP3_107G ,Color Palette 3_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP3_107B ,Color Palette 3_107 Blue" line.long 0x1B0 "CP3_108R,Color Palette 3 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP3_108A ,Color Palette 3_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP3_108R ,Color Palette 3_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP3_108G ,Color Palette 3_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP3_108B ,Color Palette 3_108 Blue" line.long 0x1B4 "CP3_109R,Color Palette 3 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP3_109A ,Color Palette 3_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP3_109R ,Color Palette 3_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP3_109G ,Color Palette 3_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP3_109B ,Color Palette 3_109 Blue" line.long 0x1B8 "CP3_110R,Color Palette 3 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP3_110A ,Color Palette 3_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP3_110R ,Color Palette 3_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP3_110G ,Color Palette 3_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP3_110B ,Color Palette 3_110 Blue" line.long 0x1BC "CP3_111R,Color Palette 3 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP3_111A ,Color Palette 3_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP3_111R ,Color Palette 3_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP3_111G ,Color Palette 3_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP3_111B ,Color Palette 3_111 Blue" line.long 0x1C0 "CP3_112R,Color Palette 3 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP3_112A ,Color Palette 3_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP3_112R ,Color Palette 3_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP3_112G ,Color Palette 3_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP3_112B ,Color Palette 3_112 Blue" line.long 0x1C4 "CP3_113R,Color Palette 3 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP3_113A ,Color Palette 3_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP3_113R ,Color Palette 3_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP3_113G ,Color Palette 3_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP3_113B ,Color Palette 3_113 Blue" line.long 0x1C8 "CP3_114R,Color Palette 3 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP3_114A ,Color Palette 3_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP3_114R ,Color Palette 3_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP3_114G ,Color Palette 3_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP3_114B ,Color Palette 3_114 Blue" line.long 0x1CC "CP3_115R,Color Palette 3 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP3_115A ,Color Palette 3_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP3_115R ,Color Palette 3_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP3_115G ,Color Palette 3_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP3_115B ,Color Palette 3_115 Blue" line.long 0x1D0 "CP3_116R,Color Palette 3 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP3_116A ,Color Palette 3_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP3_116R ,Color Palette 3_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP3_116G ,Color Palette 3_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP3_116B ,Color Palette 3_116 Blue" line.long 0x1D4 "CP3_117R,Color Palette 3 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP3_117A ,Color Palette 3_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP3_117R ,Color Palette 3_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP3_117G ,Color Palette 3_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP3_117B ,Color Palette 3_117 Blue" line.long 0x1D8 "CP3_118R,Color Palette 3 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP3_118A ,Color Palette 3_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP3_118R ,Color Palette 3_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP3_118G ,Color Palette 3_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP3_118B ,Color Palette 3_118 Blue" line.long 0x1DC "CP3_119R,Color Palette 3 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP3_119A ,Color Palette 3_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP3_119R ,Color Palette 3_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP3_119G ,Color Palette 3_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP3_119B ,Color Palette 3_119 Blue" line.long 0x1E0 "CP3_120R,Color Palette 3 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP3_120A ,Color Palette 3_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP3_120R ,Color Palette 3_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP3_120G ,Color Palette 3_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP3_120B ,Color Palette 3_120 Blue" line.long 0x1E4 "CP3_121R,Color Palette 3 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP3_121A ,Color Palette 3_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP3_121R ,Color Palette 3_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP3_121G ,Color Palette 3_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP3_121B ,Color Palette 3_121 Blue" line.long 0x1E8 "CP3_122R,Color Palette 3 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP3_122A ,Color Palette 3_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP3_122R ,Color Palette 3_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP3_122G ,Color Palette 3_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP3_122B ,Color Palette 3_122 Blue" line.long 0x1EC "CP3_123R,Color Palette 3 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP3_123A ,Color Palette 3_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP3_123R ,Color Palette 3_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP3_123G ,Color Palette 3_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP3_123B ,Color Palette 3_123 Blue" line.long 0x1F0 "CP3_124R,Color Palette 3 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP3_124A ,Color Palette 3_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP3_124R ,Color Palette 3_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP3_124G ,Color Palette 3_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP3_124B ,Color Palette 3_124 Blue" line.long 0x1F4 "CP3_125R,Color Palette 3 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP3_125A ,Color Palette 3_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP3_125R ,Color Palette 3_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP3_125G ,Color Palette 3_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP3_125B ,Color Palette 3_125 Blue" line.long 0x1F8 "CP3_126R,Color Palette 3 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP3_126A ,Color Palette 3_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP3_126R ,Color Palette 3_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP3_126G ,Color Palette 3_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP3_126B ,Color Palette 3_126 Blue" line.long 0x1FC "CP3_127R,Color Palette 3 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP3_127A ,Color Palette 3_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP3_127R ,Color Palette 3_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP3_127G ,Color Palette 3_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP3_127B ,Color Palette 3_127 Blue" line.long 0x200 "CP3_128R,Color Palette 3 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP3_128A ,Color Palette 3_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP3_128R ,Color Palette 3_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP3_128G ,Color Palette 3_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP3_128B ,Color Palette 3_128 Blue" line.long 0x204 "CP3_129R,Color Palette 3 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP3_129A ,Color Palette 3_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP3_129R ,Color Palette 3_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP3_129G ,Color Palette 3_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP3_129B ,Color Palette 3_129 Blue" line.long 0x208 "CP3_130R,Color Palette 3 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP3_130A ,Color Palette 3_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP3_130R ,Color Palette 3_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP3_130G ,Color Palette 3_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP3_130B ,Color Palette 3_130 Blue" line.long 0x20C "CP3_131R,Color Palette 3 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP3_131A ,Color Palette 3_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP3_131R ,Color Palette 3_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP3_131G ,Color Palette 3_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP3_131B ,Color Palette 3_131 Blue" line.long 0x210 "CP3_132R,Color Palette 3 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP3_132A ,Color Palette 3_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP3_132R ,Color Palette 3_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP3_132G ,Color Palette 3_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP3_132B ,Color Palette 3_132 Blue" line.long 0x214 "CP3_133R,Color Palette 3 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP3_133A ,Color Palette 3_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP3_133R ,Color Palette 3_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP3_133G ,Color Palette 3_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP3_133B ,Color Palette 3_133 Blue" line.long 0x218 "CP3_134R,Color Palette 3 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP3_134A ,Color Palette 3_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP3_134R ,Color Palette 3_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP3_134G ,Color Palette 3_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP3_134B ,Color Palette 3_134 Blue" line.long 0x21C "CP3_135R,Color Palette 3 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP3_135A ,Color Palette 3_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP3_135R ,Color Palette 3_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP3_135G ,Color Palette 3_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP3_135B ,Color Palette 3_135 Blue" line.long 0x220 "CP3_136R,Color Palette 3 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP3_136A ,Color Palette 3_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP3_136R ,Color Palette 3_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP3_136G ,Color Palette 3_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP3_136B ,Color Palette 3_136 Blue" line.long 0x224 "CP3_137R,Color Palette 3 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP3_137A ,Color Palette 3_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP3_137R ,Color Palette 3_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP3_137G ,Color Palette 3_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP3_137B ,Color Palette 3_137 Blue" line.long 0x228 "CP3_138R,Color Palette 3 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP3_138A ,Color Palette 3_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP3_138R ,Color Palette 3_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP3_138G ,Color Palette 3_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP3_138B ,Color Palette 3_138 Blue" line.long 0x22C "CP3_139R,Color Palette 3 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP3_139A ,Color Palette 3_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP3_139R ,Color Palette 3_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP3_139G ,Color Palette 3_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP3_139B ,Color Palette 3_139 Blue" line.long 0x230 "CP3_140R,Color Palette 3 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP3_140A ,Color Palette 3_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP3_140R ,Color Palette 3_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP3_140G ,Color Palette 3_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP3_140B ,Color Palette 3_140 Blue" line.long 0x234 "CP3_141R,Color Palette 3 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP3_141A ,Color Palette 3_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP3_141R ,Color Palette 3_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP3_141G ,Color Palette 3_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP3_141B ,Color Palette 3_141 Blue" line.long 0x238 "CP3_142R,Color Palette 3 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP3_142A ,Color Palette 3_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP3_142R ,Color Palette 3_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP3_142G ,Color Palette 3_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP3_142B ,Color Palette 3_142 Blue" line.long 0x23C "CP3_143R,Color Palette 3 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP3_143A ,Color Palette 3_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP3_143R ,Color Palette 3_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP3_143G ,Color Palette 3_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP3_143B ,Color Palette 3_143 Blue" line.long 0x240 "CP3_144R,Color Palette 3 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP3_144A ,Color Palette 3_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP3_144R ,Color Palette 3_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP3_144G ,Color Palette 3_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP3_144B ,Color Palette 3_144 Blue" line.long 0x244 "CP3_145R,Color Palette 3 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP3_145A ,Color Palette 3_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP3_145R ,Color Palette 3_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP3_145G ,Color Palette 3_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP3_145B ,Color Palette 3_145 Blue" line.long 0x248 "CP3_146R,Color Palette 3 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP3_146A ,Color Palette 3_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP3_146R ,Color Palette 3_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP3_146G ,Color Palette 3_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP3_146B ,Color Palette 3_146 Blue" line.long 0x24C "CP3_147R,Color Palette 3 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP3_147A ,Color Palette 3_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP3_147R ,Color Palette 3_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP3_147G ,Color Palette 3_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP3_147B ,Color Palette 3_147 Blue" line.long 0x250 "CP3_148R,Color Palette 3 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP3_148A ,Color Palette 3_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP3_148R ,Color Palette 3_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP3_148G ,Color Palette 3_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP3_148B ,Color Palette 3_148 Blue" line.long 0x254 "CP3_149R,Color Palette 3 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP3_149A ,Color Palette 3_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP3_149R ,Color Palette 3_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP3_149G ,Color Palette 3_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP3_149B ,Color Palette 3_149 Blue" line.long 0x258 "CP3_150R,Color Palette 3 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP3_150A ,Color Palette 3_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP3_150R ,Color Palette 3_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP3_150G ,Color Palette 3_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP3_150B ,Color Palette 3_150 Blue" line.long 0x25C "CP3_151R,Color Palette 3 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP3_151A ,Color Palette 3_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP3_151R ,Color Palette 3_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP3_151G ,Color Palette 3_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP3_151B ,Color Palette 3_151 Blue" line.long 0x260 "CP3_152R,Color Palette 3 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP3_152A ,Color Palette 3_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP3_152R ,Color Palette 3_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP3_152G ,Color Palette 3_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP3_152B ,Color Palette 3_152 Blue" line.long 0x264 "CP3_153R,Color Palette 3 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP3_153A ,Color Palette 3_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP3_153R ,Color Palette 3_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP3_153G ,Color Palette 3_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP3_153B ,Color Palette 3_153 Blue" line.long 0x268 "CP3_154R,Color Palette 3 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP3_154A ,Color Palette 3_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP3_154R ,Color Palette 3_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP3_154G ,Color Palette 3_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP3_154B ,Color Palette 3_154 Blue" line.long 0x26C "CP3_155R,Color Palette 3 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP3_155A ,Color Palette 3_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP3_155R ,Color Palette 3_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP3_155G ,Color Palette 3_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP3_155B ,Color Palette 3_155 Blue" line.long 0x270 "CP3_156R,Color Palette 3 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP3_156A ,Color Palette 3_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP3_156R ,Color Palette 3_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP3_156G ,Color Palette 3_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP3_156B ,Color Palette 3_156 Blue" line.long 0x274 "CP3_157R,Color Palette 3 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP3_157A ,Color Palette 3_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP3_157R ,Color Palette 3_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP3_157G ,Color Palette 3_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP3_157B ,Color Palette 3_157 Blue" line.long 0x278 "CP3_158R,Color Palette 3 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP3_158A ,Color Palette 3_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP3_158R ,Color Palette 3_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP3_158G ,Color Palette 3_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP3_158B ,Color Palette 3_158 Blue" line.long 0x27C "CP3_159R,Color Palette 3 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP3_159A ,Color Palette 3_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP3_159R ,Color Palette 3_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP3_159G ,Color Palette 3_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP3_159B ,Color Palette 3_159 Blue" line.long 0x280 "CP3_160R,Color Palette 3 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP3_160A ,Color Palette 3_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP3_160R ,Color Palette 3_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP3_160G ,Color Palette 3_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP3_160B ,Color Palette 3_160 Blue" line.long 0x284 "CP3_161R,Color Palette 3 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP3_161A ,Color Palette 3_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP3_161R ,Color Palette 3_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP3_161G ,Color Palette 3_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP3_161B ,Color Palette 3_161 Blue" line.long 0x288 "CP3_162R,Color Palette 3 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP3_162A ,Color Palette 3_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP3_162R ,Color Palette 3_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP3_162G ,Color Palette 3_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP3_162B ,Color Palette 3_162 Blue" line.long 0x28C "CP3_163R,Color Palette 3 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP3_163A ,Color Palette 3_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP3_163R ,Color Palette 3_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP3_163G ,Color Palette 3_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP3_163B ,Color Palette 3_163 Blue" line.long 0x290 "CP3_164R,Color Palette 3 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP3_164A ,Color Palette 3_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP3_164R ,Color Palette 3_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP3_164G ,Color Palette 3_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP3_164B ,Color Palette 3_164 Blue" line.long 0x294 "CP3_165R,Color Palette 3 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP3_165A ,Color Palette 3_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP3_165R ,Color Palette 3_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP3_165G ,Color Palette 3_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP3_165B ,Color Palette 3_165 Blue" line.long 0x298 "CP3_166R,Color Palette 3 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP3_166A ,Color Palette 3_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP3_166R ,Color Palette 3_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP3_166G ,Color Palette 3_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP3_166B ,Color Palette 3_166 Blue" line.long 0x29C "CP3_167R,Color Palette 3 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP3_167A ,Color Palette 3_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP3_167R ,Color Palette 3_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP3_167G ,Color Palette 3_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP3_167B ,Color Palette 3_167 Blue" line.long 0x2A0 "CP3_168R,Color Palette 3 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP3_168A ,Color Palette 3_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP3_168R ,Color Palette 3_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP3_168G ,Color Palette 3_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP3_168B ,Color Palette 3_168 Blue" line.long 0x2A4 "CP3_169R,Color Palette 3 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP3_169A ,Color Palette 3_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP3_169R ,Color Palette 3_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP3_169G ,Color Palette 3_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP3_169B ,Color Palette 3_169 Blue" line.long 0x2A8 "CP3_170R,Color Palette 3 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP3_170A ,Color Palette 3_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP3_170R ,Color Palette 3_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP3_170G ,Color Palette 3_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP3_170B ,Color Palette 3_170 Blue" line.long 0x2AC "CP3_171R,Color Palette 3 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP3_171A ,Color Palette 3_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP3_171R ,Color Palette 3_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP3_171G ,Color Palette 3_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP3_171B ,Color Palette 3_171 Blue" line.long 0x2B0 "CP3_172R,Color Palette 3 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP3_172A ,Color Palette 3_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP3_172R ,Color Palette 3_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP3_172G ,Color Palette 3_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP3_172B ,Color Palette 3_172 Blue" line.long 0x2B4 "CP3_173R,Color Palette 3 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP3_173A ,Color Palette 3_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP3_173R ,Color Palette 3_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP3_173G ,Color Palette 3_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP3_173B ,Color Palette 3_173 Blue" line.long 0x2B8 "CP3_174R,Color Palette 3 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP3_174A ,Color Palette 3_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP3_174R ,Color Palette 3_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP3_174G ,Color Palette 3_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP3_174B ,Color Palette 3_174 Blue" line.long 0x2BC "CP3_175R,Color Palette 3 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP3_175A ,Color Palette 3_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP3_175R ,Color Palette 3_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP3_175G ,Color Palette 3_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP3_175B ,Color Palette 3_175 Blue" line.long 0x2C0 "CP3_176R,Color Palette 3 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP3_176A ,Color Palette 3_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP3_176R ,Color Palette 3_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP3_176G ,Color Palette 3_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP3_176B ,Color Palette 3_176 Blue" line.long 0x2C4 "CP3_177R,Color Palette 3 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP3_177A ,Color Palette 3_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP3_177R ,Color Palette 3_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP3_177G ,Color Palette 3_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP3_177B ,Color Palette 3_177 Blue" line.long 0x2C8 "CP3_178R,Color Palette 3 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP3_178A ,Color Palette 3_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP3_178R ,Color Palette 3_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP3_178G ,Color Palette 3_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP3_178B ,Color Palette 3_178 Blue" line.long 0x2CC "CP3_179R,Color Palette 3 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP3_179A ,Color Palette 3_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP3_179R ,Color Palette 3_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP3_179G ,Color Palette 3_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP3_179B ,Color Palette 3_179 Blue" line.long 0x2D0 "CP3_180R,Color Palette 3 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP3_180A ,Color Palette 3_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP3_180R ,Color Palette 3_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP3_180G ,Color Palette 3_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP3_180B ,Color Palette 3_180 Blue" line.long 0x2D4 "CP3_181R,Color Palette 3 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP3_181A ,Color Palette 3_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP3_181R ,Color Palette 3_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP3_181G ,Color Palette 3_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP3_181B ,Color Palette 3_181 Blue" line.long 0x2D8 "CP3_182R,Color Palette 3 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP3_182A ,Color Palette 3_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP3_182R ,Color Palette 3_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP3_182G ,Color Palette 3_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP3_182B ,Color Palette 3_182 Blue" line.long 0x2DC "CP3_183R,Color Palette 3 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP3_183A ,Color Palette 3_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP3_183R ,Color Palette 3_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP3_183G ,Color Palette 3_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP3_183B ,Color Palette 3_183 Blue" line.long 0x2E0 "CP3_184R,Color Palette 3 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP3_184A ,Color Palette 3_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP3_184R ,Color Palette 3_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP3_184G ,Color Palette 3_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP3_184B ,Color Palette 3_184 Blue" line.long 0x2E4 "CP3_185R,Color Palette 3 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP3_185A ,Color Palette 3_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP3_185R ,Color Palette 3_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP3_185G ,Color Palette 3_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP3_185B ,Color Palette 3_185 Blue" line.long 0x2E8 "CP3_186R,Color Palette 3 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP3_186A ,Color Palette 3_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP3_186R ,Color Palette 3_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP3_186G ,Color Palette 3_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP3_186B ,Color Palette 3_186 Blue" line.long 0x2EC "CP3_187R,Color Palette 3 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP3_187A ,Color Palette 3_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP3_187R ,Color Palette 3_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP3_187G ,Color Palette 3_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP3_187B ,Color Palette 3_187 Blue" line.long 0x2F0 "CP3_188R,Color Palette 3 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP3_188A ,Color Palette 3_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP3_188R ,Color Palette 3_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP3_188G ,Color Palette 3_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP3_188B ,Color Palette 3_188 Blue" line.long 0x2F4 "CP3_189R,Color Palette 3 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP3_189A ,Color Palette 3_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP3_189R ,Color Palette 3_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP3_189G ,Color Palette 3_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP3_189B ,Color Palette 3_189 Blue" line.long 0x2F8 "CP3_190R,Color Palette 3 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP3_190A ,Color Palette 3_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP3_190R ,Color Palette 3_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP3_190G ,Color Palette 3_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP3_190B ,Color Palette 3_190 Blue" line.long 0x2FC "CP3_191R,Color Palette 3 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP3_191A ,Color Palette 3_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP3_191R ,Color Palette 3_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP3_191G ,Color Palette 3_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP3_191B ,Color Palette 3_191 Blue" line.long 0x300 "CP3_192R,Color Palette 3 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP3_192A ,Color Palette 3_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP3_192R ,Color Palette 3_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP3_192G ,Color Palette 3_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP3_192B ,Color Palette 3_192 Blue" line.long 0x304 "CP3_193R,Color Palette 3 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP3_193A ,Color Palette 3_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP3_193R ,Color Palette 3_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP3_193G ,Color Palette 3_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP3_193B ,Color Palette 3_193 Blue" line.long 0x308 "CP3_194R,Color Palette 3 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP3_194A ,Color Palette 3_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP3_194R ,Color Palette 3_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP3_194G ,Color Palette 3_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP3_194B ,Color Palette 3_194 Blue" line.long 0x30C "CP3_195R,Color Palette 3 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP3_195A ,Color Palette 3_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP3_195R ,Color Palette 3_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP3_195G ,Color Palette 3_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP3_195B ,Color Palette 3_195 Blue" line.long 0x310 "CP3_196R,Color Palette 3 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP3_196A ,Color Palette 3_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP3_196R ,Color Palette 3_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP3_196G ,Color Palette 3_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP3_196B ,Color Palette 3_196 Blue" line.long 0x314 "CP3_197R,Color Palette 3 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP3_197A ,Color Palette 3_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP3_197R ,Color Palette 3_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP3_197G ,Color Palette 3_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP3_197B ,Color Palette 3_197 Blue" line.long 0x318 "CP3_198R,Color Palette 3 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP3_198A ,Color Palette 3_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP3_198R ,Color Palette 3_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP3_198G ,Color Palette 3_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP3_198B ,Color Palette 3_198 Blue" line.long 0x31C "CP3_199R,Color Palette 3 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP3_199A ,Color Palette 3_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP3_199R ,Color Palette 3_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP3_199G ,Color Palette 3_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP3_199B ,Color Palette 3_199 Blue" line.long 0x320 "CP3_200R,Color Palette 3 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP3_200A ,Color Palette 3_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP3_200R ,Color Palette 3_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP3_200G ,Color Palette 3_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP3_200B ,Color Palette 3_200 Blue" line.long 0x324 "CP3_201R,Color Palette 3 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP3_201A ,Color Palette 3_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP3_201R ,Color Palette 3_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP3_201G ,Color Palette 3_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP3_201B ,Color Palette 3_201 Blue" line.long 0x328 "CP3_202R,Color Palette 3 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP3_202A ,Color Palette 3_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP3_202R ,Color Palette 3_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP3_202G ,Color Palette 3_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP3_202B ,Color Palette 3_202 Blue" line.long 0x32C "CP3_203R,Color Palette 3 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP3_203A ,Color Palette 3_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP3_203R ,Color Palette 3_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP3_203G ,Color Palette 3_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP3_203B ,Color Palette 3_203 Blue" line.long 0x330 "CP3_204R,Color Palette 3 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP3_204A ,Color Palette 3_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP3_204R ,Color Palette 3_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP3_204G ,Color Palette 3_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP3_204B ,Color Palette 3_204 Blue" line.long 0x334 "CP3_205R,Color Palette 3 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP3_205A ,Color Palette 3_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP3_205R ,Color Palette 3_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP3_205G ,Color Palette 3_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP3_205B ,Color Palette 3_205 Blue" line.long 0x338 "CP3_206R,Color Palette 3 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP3_206A ,Color Palette 3_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP3_206R ,Color Palette 3_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP3_206G ,Color Palette 3_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP3_206B ,Color Palette 3_206 Blue" line.long 0x33C "CP3_207R,Color Palette 3 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP3_207A ,Color Palette 3_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP3_207R ,Color Palette 3_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP3_207G ,Color Palette 3_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP3_207B ,Color Palette 3_207 Blue" line.long 0x340 "CP3_208R,Color Palette 3 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP3_208A ,Color Palette 3_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP3_208R ,Color Palette 3_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP3_208G ,Color Palette 3_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP3_208B ,Color Palette 3_208 Blue" line.long 0x344 "CP3_209R,Color Palette 3 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP3_209A ,Color Palette 3_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP3_209R ,Color Palette 3_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP3_209G ,Color Palette 3_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP3_209B ,Color Palette 3_209 Blue" line.long 0x348 "CP3_210R,Color Palette 3 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP3_210A ,Color Palette 3_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP3_210R ,Color Palette 3_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP3_210G ,Color Palette 3_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP3_210B ,Color Palette 3_210 Blue" line.long 0x34C "CP3_211R,Color Palette 3 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP3_211A ,Color Palette 3_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP3_211R ,Color Palette 3_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP3_211G ,Color Palette 3_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP3_211B ,Color Palette 3_211 Blue" line.long 0x350 "CP3_212R,Color Palette 3 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP3_212A ,Color Palette 3_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP3_212R ,Color Palette 3_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP3_212G ,Color Palette 3_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP3_212B ,Color Palette 3_212 Blue" line.long 0x354 "CP3_213R,Color Palette 3 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP3_213A ,Color Palette 3_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP3_213R ,Color Palette 3_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP3_213G ,Color Palette 3_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP3_213B ,Color Palette 3_213 Blue" line.long 0x358 "CP3_214R,Color Palette 3 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP3_214A ,Color Palette 3_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP3_214R ,Color Palette 3_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP3_214G ,Color Palette 3_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP3_214B ,Color Palette 3_214 Blue" line.long 0x35C "CP3_215R,Color Palette 3 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP3_215A ,Color Palette 3_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP3_215R ,Color Palette 3_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP3_215G ,Color Palette 3_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP3_215B ,Color Palette 3_215 Blue" line.long 0x360 "CP3_216R,Color Palette 3 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP3_216A ,Color Palette 3_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP3_216R ,Color Palette 3_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP3_216G ,Color Palette 3_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP3_216B ,Color Palette 3_216 Blue" line.long 0x364 "CP3_217R,Color Palette 3 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP3_217A ,Color Palette 3_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP3_217R ,Color Palette 3_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP3_217G ,Color Palette 3_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP3_217B ,Color Palette 3_217 Blue" line.long 0x368 "CP3_218R,Color Palette 3 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP3_218A ,Color Palette 3_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP3_218R ,Color Palette 3_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP3_218G ,Color Palette 3_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP3_218B ,Color Palette 3_218 Blue" line.long 0x36C "CP3_219R,Color Palette 3 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP3_219A ,Color Palette 3_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP3_219R ,Color Palette 3_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP3_219G ,Color Palette 3_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP3_219B ,Color Palette 3_219 Blue" line.long 0x370 "CP3_220R,Color Palette 3 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP3_220A ,Color Palette 3_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP3_220R ,Color Palette 3_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP3_220G ,Color Palette 3_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP3_220B ,Color Palette 3_220 Blue" line.long 0x374 "CP3_221R,Color Palette 3 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP3_221A ,Color Palette 3_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP3_221R ,Color Palette 3_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP3_221G ,Color Palette 3_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP3_221B ,Color Palette 3_221 Blue" line.long 0x378 "CP3_222R,Color Palette 3 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP3_222A ,Color Palette 3_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP3_222R ,Color Palette 3_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP3_222G ,Color Palette 3_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP3_222B ,Color Palette 3_222 Blue" line.long 0x37C "CP3_223R,Color Palette 3 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP3_223A ,Color Palette 3_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP3_223R ,Color Palette 3_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP3_223G ,Color Palette 3_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP3_223B ,Color Palette 3_223 Blue" line.long 0x380 "CP3_224R,Color Palette 3 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP3_224A ,Color Palette 3_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP3_224R ,Color Palette 3_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP3_224G ,Color Palette 3_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP3_224B ,Color Palette 3_224 Blue" line.long 0x384 "CP3_225R,Color Palette 3 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP3_225A ,Color Palette 3_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP3_225R ,Color Palette 3_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP3_225G ,Color Palette 3_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP3_225B ,Color Palette 3_225 Blue" line.long 0x388 "CP3_226R,Color Palette 3 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP3_226A ,Color Palette 3_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP3_226R ,Color Palette 3_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP3_226G ,Color Palette 3_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP3_226B ,Color Palette 3_226 Blue" line.long 0x38C "CP3_227R,Color Palette 3 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP3_227A ,Color Palette 3_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP3_227R ,Color Palette 3_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP3_227G ,Color Palette 3_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP3_227B ,Color Palette 3_227 Blue" line.long 0x390 "CP3_228R,Color Palette 3 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP3_228A ,Color Palette 3_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP3_228R ,Color Palette 3_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP3_228G ,Color Palette 3_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP3_228B ,Color Palette 3_228 Blue" line.long 0x394 "CP3_229R,Color Palette 3 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP3_229A ,Color Palette 3_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP3_229R ,Color Palette 3_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP3_229G ,Color Palette 3_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP3_229B ,Color Palette 3_229 Blue" line.long 0x398 "CP3_230R,Color Palette 3 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP3_230A ,Color Palette 3_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP3_230R ,Color Palette 3_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP3_230G ,Color Palette 3_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP3_230B ,Color Palette 3_230 Blue" line.long 0x39C "CP3_231R,Color Palette 3 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP3_231A ,Color Palette 3_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP3_231R ,Color Palette 3_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP3_231G ,Color Palette 3_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP3_231B ,Color Palette 3_231 Blue" line.long 0x3A0 "CP3_232R,Color Palette 3 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP3_232A ,Color Palette 3_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP3_232R ,Color Palette 3_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP3_232G ,Color Palette 3_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP3_232B ,Color Palette 3_232 Blue" line.long 0x3A4 "CP3_233R,Color Palette 3 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP3_233A ,Color Palette 3_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP3_233R ,Color Palette 3_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP3_233G ,Color Palette 3_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP3_233B ,Color Palette 3_233 Blue" line.long 0x3A8 "CP3_234R,Color Palette 3 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP3_234A ,Color Palette 3_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP3_234R ,Color Palette 3_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP3_234G ,Color Palette 3_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP3_234B ,Color Palette 3_234 Blue" line.long 0x3AC "CP3_235R,Color Palette 3 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP3_235A ,Color Palette 3_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP3_235R ,Color Palette 3_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP3_235G ,Color Palette 3_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP3_235B ,Color Palette 3_235 Blue" line.long 0x3B0 "CP3_236R,Color Palette 3 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP3_236A ,Color Palette 3_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP3_236R ,Color Palette 3_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP3_236G ,Color Palette 3_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP3_236B ,Color Palette 3_236 Blue" line.long 0x3B4 "CP3_237R,Color Palette 3 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP3_237A ,Color Palette 3_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP3_237R ,Color Palette 3_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP3_237G ,Color Palette 3_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP3_237B ,Color Palette 3_237 Blue" line.long 0x3B8 "CP3_238R,Color Palette 3 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP3_238A ,Color Palette 3_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP3_238R ,Color Palette 3_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP3_238G ,Color Palette 3_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP3_238B ,Color Palette 3_238 Blue" line.long 0x3BC "CP3_239R,Color Palette 3 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP3_239A ,Color Palette 3_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP3_239R ,Color Palette 3_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP3_239G ,Color Palette 3_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP3_239B ,Color Palette 3_239 Blue" line.long 0x3C0 "CP3_240R,Color Palette 3 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP3_240A ,Color Palette 3_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP3_240R ,Color Palette 3_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP3_240G ,Color Palette 3_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP3_240B ,Color Palette 3_240 Blue" line.long 0x3C4 "CP3_241R,Color Palette 3 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP3_241A ,Color Palette 3_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP3_241R ,Color Palette 3_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP3_241G ,Color Palette 3_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP3_241B ,Color Palette 3_241 Blue" line.long 0x3C8 "CP3_242R,Color Palette 3 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP3_242A ,Color Palette 3_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP3_242R ,Color Palette 3_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP3_242G ,Color Palette 3_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP3_242B ,Color Palette 3_242 Blue" line.long 0x3CC "CP3_243R,Color Palette 3 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP3_243A ,Color Palette 3_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP3_243R ,Color Palette 3_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP3_243G ,Color Palette 3_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP3_243B ,Color Palette 3_243 Blue" line.long 0x3D0 "CP3_244R,Color Palette 3 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP3_244A ,Color Palette 3_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP3_244R ,Color Palette 3_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP3_244G ,Color Palette 3_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP3_244B ,Color Palette 3_244 Blue" line.long 0x3D4 "CP3_245R,Color Palette 3 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP3_245A ,Color Palette 3_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP3_245R ,Color Palette 3_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP3_245G ,Color Palette 3_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP3_245B ,Color Palette 3_245 Blue" line.long 0x3D8 "CP3_246R,Color Palette 3 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP3_246A ,Color Palette 3_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP3_246R ,Color Palette 3_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP3_246G ,Color Palette 3_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP3_246B ,Color Palette 3_246 Blue" line.long 0x3DC "CP3_247R,Color Palette 3 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP3_247A ,Color Palette 3_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP3_247R ,Color Palette 3_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP3_247G ,Color Palette 3_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP3_247B ,Color Palette 3_247 Blue" line.long 0x3E0 "CP3_248R,Color Palette 3 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP3_248A ,Color Palette 3_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP3_248R ,Color Palette 3_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP3_248G ,Color Palette 3_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP3_248B ,Color Palette 3_248 Blue" line.long 0x3E4 "CP3_249R,Color Palette 3 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP3_249A ,Color Palette 3_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP3_249R ,Color Palette 3_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP3_249G ,Color Palette 3_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP3_249B ,Color Palette 3_249 Blue" line.long 0x3E8 "CP3_250R,Color Palette 3 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP3_250A ,Color Palette 3_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP3_250R ,Color Palette 3_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP3_250G ,Color Palette 3_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP3_250B ,Color Palette 3_250 Blue" line.long 0x3EC "CP3_251R,Color Palette 3 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP3_251A ,Color Palette 3_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP3_251R ,Color Palette 3_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP3_251G ,Color Palette 3_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP3_251B ,Color Palette 3_251 Blue" line.long 0x3F0 "CP3_252R,Color Palette 3 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP3_252A ,Color Palette 3_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP3_252R ,Color Palette 3_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP3_252G ,Color Palette 3_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP3_252B ,Color Palette 3_252 Blue" line.long 0x3F4 "CP3_253R,Color Palette 3 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP3_253A ,Color Palette 3_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP3_253R ,Color Palette 3_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP3_253G ,Color Palette 3_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP3_253B ,Color Palette 3_253 Blue" line.long 0x3F8 "CP3_254R,Color Palette 3 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP3_254A ,Color Palette 3_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP3_254R ,Color Palette 3_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP3_254G ,Color Palette 3_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP3_254B ,Color Palette 3_254 Blue" line.long 0x3FC "CP3_255R,Color Palette 3 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP3_255A ,Color Palette 3_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP3_255R ,Color Palette 3_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP3_255G ,Color Palette 3_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP3_255B ,Color Palette 3_255 Blue" tree.end tree "Color Palette 4 Registers" width 10. group.long 0x4000++0x3ff line.long 0x0 "CP4_0R,Color Palette 4 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP4_0A ,Color Palette 4_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP4_0R ,Color Palette 4_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP4_0G ,Color Palette 4_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP4_0B ,Color Palette 4_0 Blue" line.long 0x4 "CP4_1R,Color Palette 4 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP4_1A ,Color Palette 4_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP4_1R ,Color Palette 4_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP4_1G ,Color Palette 4_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP4_1B ,Color Palette 4_1 Blue" line.long 0x8 "CP4_2R,Color Palette 4 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP4_2A ,Color Palette 4_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP4_2R ,Color Palette 4_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP4_2G ,Color Palette 4_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP4_2B ,Color Palette 4_2 Blue" line.long 0xC "CP4_3R,Color Palette 4 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP4_3A ,Color Palette 4_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP4_3R ,Color Palette 4_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP4_3G ,Color Palette 4_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP4_3B ,Color Palette 4_3 Blue" line.long 0x10 "CP4_4R,Color Palette 4 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP4_4A ,Color Palette 4_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP4_4R ,Color Palette 4_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP4_4G ,Color Palette 4_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP4_4B ,Color Palette 4_4 Blue" line.long 0x14 "CP4_5R,Color Palette 4 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP4_5A ,Color Palette 4_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP4_5R ,Color Palette 4_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP4_5G ,Color Palette 4_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP4_5B ,Color Palette 4_5 Blue" line.long 0x18 "CP4_6R,Color Palette 4 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP4_6A ,Color Palette 4_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP4_6R ,Color Palette 4_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP4_6G ,Color Palette 4_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP4_6B ,Color Palette 4_6 Blue" line.long 0x1C "CP4_7R,Color Palette 4 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP4_7A ,Color Palette 4_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP4_7R ,Color Palette 4_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP4_7G ,Color Palette 4_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP4_7B ,Color Palette 4_7 Blue" line.long 0x20 "CP4_8R,Color Palette 4 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP4_8A ,Color Palette 4_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP4_8R ,Color Palette 4_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP4_8G ,Color Palette 4_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP4_8B ,Color Palette 4_8 Blue" line.long 0x24 "CP4_9R,Color Palette 4 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP4_9A ,Color Palette 4_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP4_9R ,Color Palette 4_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP4_9G ,Color Palette 4_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP4_9B ,Color Palette 4_9 Blue" line.long 0x28 "CP4_10R,Color Palette 4 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP4_10A ,Color Palette 4_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP4_10R ,Color Palette 4_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP4_10G ,Color Palette 4_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP4_10B ,Color Palette 4_10 Blue" line.long 0x2C "CP4_11R,Color Palette 4 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP4_11A ,Color Palette 4_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP4_11R ,Color Palette 4_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP4_11G ,Color Palette 4_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP4_11B ,Color Palette 4_11 Blue" line.long 0x30 "CP4_12R,Color Palette 4 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP4_12A ,Color Palette 4_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP4_12R ,Color Palette 4_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP4_12G ,Color Palette 4_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP4_12B ,Color Palette 4_12 Blue" line.long 0x34 "CP4_13R,Color Palette 4 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP4_13A ,Color Palette 4_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP4_13R ,Color Palette 4_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP4_13G ,Color Palette 4_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP4_13B ,Color Palette 4_13 Blue" line.long 0x38 "CP4_14R,Color Palette 4 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP4_14A ,Color Palette 4_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP4_14R ,Color Palette 4_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP4_14G ,Color Palette 4_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP4_14B ,Color Palette 4_14 Blue" line.long 0x3C "CP4_15R,Color Palette 4 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP4_15A ,Color Palette 4_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP4_15R ,Color Palette 4_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP4_15G ,Color Palette 4_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP4_15B ,Color Palette 4_15 Blue" line.long 0x40 "CP4_16R,Color Palette 4 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP4_16A ,Color Palette 4_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP4_16R ,Color Palette 4_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP4_16G ,Color Palette 4_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP4_16B ,Color Palette 4_16 Blue" line.long 0x44 "CP4_17R,Color Palette 4 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP4_17A ,Color Palette 4_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP4_17R ,Color Palette 4_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP4_17G ,Color Palette 4_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP4_17B ,Color Palette 4_17 Blue" line.long 0x48 "CP4_18R,Color Palette 4 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP4_18A ,Color Palette 4_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP4_18R ,Color Palette 4_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP4_18G ,Color Palette 4_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP4_18B ,Color Palette 4_18 Blue" line.long 0x4C "CP4_19R,Color Palette 4 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP4_19A ,Color Palette 4_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP4_19R ,Color Palette 4_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP4_19G ,Color Palette 4_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP4_19B ,Color Palette 4_19 Blue" line.long 0x50 "CP4_20R,Color Palette 4 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP4_20A ,Color Palette 4_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP4_20R ,Color Palette 4_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP4_20G ,Color Palette 4_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP4_20B ,Color Palette 4_20 Blue" line.long 0x54 "CP4_21R,Color Palette 4 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP4_21A ,Color Palette 4_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP4_21R ,Color Palette 4_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP4_21G ,Color Palette 4_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP4_21B ,Color Palette 4_21 Blue" line.long 0x58 "CP4_22R,Color Palette 4 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP4_22A ,Color Palette 4_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP4_22R ,Color Palette 4_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP4_22G ,Color Palette 4_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP4_22B ,Color Palette 4_22 Blue" line.long 0x5C "CP4_23R,Color Palette 4 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP4_23A ,Color Palette 4_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP4_23R ,Color Palette 4_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP4_23G ,Color Palette 4_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP4_23B ,Color Palette 4_23 Blue" line.long 0x60 "CP4_24R,Color Palette 4 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP4_24A ,Color Palette 4_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP4_24R ,Color Palette 4_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP4_24G ,Color Palette 4_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP4_24B ,Color Palette 4_24 Blue" line.long 0x64 "CP4_25R,Color Palette 4 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP4_25A ,Color Palette 4_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP4_25R ,Color Palette 4_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP4_25G ,Color Palette 4_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP4_25B ,Color Palette 4_25 Blue" line.long 0x68 "CP4_26R,Color Palette 4 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP4_26A ,Color Palette 4_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP4_26R ,Color Palette 4_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP4_26G ,Color Palette 4_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP4_26B ,Color Palette 4_26 Blue" line.long 0x6C "CP4_27R,Color Palette 4 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP4_27A ,Color Palette 4_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP4_27R ,Color Palette 4_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP4_27G ,Color Palette 4_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP4_27B ,Color Palette 4_27 Blue" line.long 0x70 "CP4_28R,Color Palette 4 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP4_28A ,Color Palette 4_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP4_28R ,Color Palette 4_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP4_28G ,Color Palette 4_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP4_28B ,Color Palette 4_28 Blue" line.long 0x74 "CP4_29R,Color Palette 4 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP4_29A ,Color Palette 4_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP4_29R ,Color Palette 4_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP4_29G ,Color Palette 4_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP4_29B ,Color Palette 4_29 Blue" line.long 0x78 "CP4_30R,Color Palette 4 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP4_30A ,Color Palette 4_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP4_30R ,Color Palette 4_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP4_30G ,Color Palette 4_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP4_30B ,Color Palette 4_30 Blue" line.long 0x7C "CP4_31R,Color Palette 4 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP4_31A ,Color Palette 4_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP4_31R ,Color Palette 4_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP4_31G ,Color Palette 4_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP4_31B ,Color Palette 4_31 Blue" line.long 0x80 "CP4_32R,Color Palette 4 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP4_32A ,Color Palette 4_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP4_32R ,Color Palette 4_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP4_32G ,Color Palette 4_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP4_32B ,Color Palette 4_32 Blue" line.long 0x84 "CP4_33R,Color Palette 4 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP4_33A ,Color Palette 4_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP4_33R ,Color Palette 4_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP4_33G ,Color Palette 4_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP4_33B ,Color Palette 4_33 Blue" line.long 0x88 "CP4_34R,Color Palette 4 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP4_34A ,Color Palette 4_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP4_34R ,Color Palette 4_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP4_34G ,Color Palette 4_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP4_34B ,Color Palette 4_34 Blue" line.long 0x8C "CP4_35R,Color Palette 4 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP4_35A ,Color Palette 4_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP4_35R ,Color Palette 4_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP4_35G ,Color Palette 4_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP4_35B ,Color Palette 4_35 Blue" line.long 0x90 "CP4_36R,Color Palette 4 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP4_36A ,Color Palette 4_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP4_36R ,Color Palette 4_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP4_36G ,Color Palette 4_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP4_36B ,Color Palette 4_36 Blue" line.long 0x94 "CP4_37R,Color Palette 4 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP4_37A ,Color Palette 4_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP4_37R ,Color Palette 4_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP4_37G ,Color Palette 4_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP4_37B ,Color Palette 4_37 Blue" line.long 0x98 "CP4_38R,Color Palette 4 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP4_38A ,Color Palette 4_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP4_38R ,Color Palette 4_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP4_38G ,Color Palette 4_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP4_38B ,Color Palette 4_38 Blue" line.long 0x9C "CP4_39R,Color Palette 4 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP4_39A ,Color Palette 4_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP4_39R ,Color Palette 4_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP4_39G ,Color Palette 4_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP4_39B ,Color Palette 4_39 Blue" line.long 0xA0 "CP4_40R,Color Palette 4 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP4_40A ,Color Palette 4_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP4_40R ,Color Palette 4_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP4_40G ,Color Palette 4_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP4_40B ,Color Palette 4_40 Blue" line.long 0xA4 "CP4_41R,Color Palette 4 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP4_41A ,Color Palette 4_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP4_41R ,Color Palette 4_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP4_41G ,Color Palette 4_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP4_41B ,Color Palette 4_41 Blue" line.long 0xA8 "CP4_42R,Color Palette 4 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP4_42A ,Color Palette 4_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP4_42R ,Color Palette 4_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP4_42G ,Color Palette 4_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP4_42B ,Color Palette 4_42 Blue" line.long 0xAC "CP4_43R,Color Palette 4 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP4_43A ,Color Palette 4_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP4_43R ,Color Palette 4_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP4_43G ,Color Palette 4_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP4_43B ,Color Palette 4_43 Blue" line.long 0xB0 "CP4_44R,Color Palette 4 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP4_44A ,Color Palette 4_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP4_44R ,Color Palette 4_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP4_44G ,Color Palette 4_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP4_44B ,Color Palette 4_44 Blue" line.long 0xB4 "CP4_45R,Color Palette 4 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP4_45A ,Color Palette 4_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP4_45R ,Color Palette 4_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP4_45G ,Color Palette 4_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP4_45B ,Color Palette 4_45 Blue" line.long 0xB8 "CP4_46R,Color Palette 4 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP4_46A ,Color Palette 4_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP4_46R ,Color Palette 4_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP4_46G ,Color Palette 4_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP4_46B ,Color Palette 4_46 Blue" line.long 0xBC "CP4_47R,Color Palette 4 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP4_47A ,Color Palette 4_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP4_47R ,Color Palette 4_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP4_47G ,Color Palette 4_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP4_47B ,Color Palette 4_47 Blue" line.long 0xC0 "CP4_48R,Color Palette 4 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP4_48A ,Color Palette 4_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP4_48R ,Color Palette 4_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP4_48G ,Color Palette 4_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP4_48B ,Color Palette 4_48 Blue" line.long 0xC4 "CP4_49R,Color Palette 4 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP4_49A ,Color Palette 4_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP4_49R ,Color Palette 4_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP4_49G ,Color Palette 4_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP4_49B ,Color Palette 4_49 Blue" line.long 0xC8 "CP4_50R,Color Palette 4 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP4_50A ,Color Palette 4_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP4_50R ,Color Palette 4_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP4_50G ,Color Palette 4_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP4_50B ,Color Palette 4_50 Blue" line.long 0xCC "CP4_51R,Color Palette 4 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP4_51A ,Color Palette 4_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP4_51R ,Color Palette 4_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP4_51G ,Color Palette 4_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP4_51B ,Color Palette 4_51 Blue" line.long 0xD0 "CP4_52R,Color Palette 4 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP4_52A ,Color Palette 4_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP4_52R ,Color Palette 4_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP4_52G ,Color Palette 4_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP4_52B ,Color Palette 4_52 Blue" line.long 0xD4 "CP4_53R,Color Palette 4 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP4_53A ,Color Palette 4_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP4_53R ,Color Palette 4_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP4_53G ,Color Palette 4_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP4_53B ,Color Palette 4_53 Blue" line.long 0xD8 "CP4_54R,Color Palette 4 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP4_54A ,Color Palette 4_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP4_54R ,Color Palette 4_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP4_54G ,Color Palette 4_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP4_54B ,Color Palette 4_54 Blue" line.long 0xDC "CP4_55R,Color Palette 4 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP4_55A ,Color Palette 4_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP4_55R ,Color Palette 4_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP4_55G ,Color Palette 4_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP4_55B ,Color Palette 4_55 Blue" line.long 0xE0 "CP4_56R,Color Palette 4 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP4_56A ,Color Palette 4_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP4_56R ,Color Palette 4_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP4_56G ,Color Palette 4_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP4_56B ,Color Palette 4_56 Blue" line.long 0xE4 "CP4_57R,Color Palette 4 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP4_57A ,Color Palette 4_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP4_57R ,Color Palette 4_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP4_57G ,Color Palette 4_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP4_57B ,Color Palette 4_57 Blue" line.long 0xE8 "CP4_58R,Color Palette 4 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP4_58A ,Color Palette 4_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP4_58R ,Color Palette 4_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP4_58G ,Color Palette 4_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP4_58B ,Color Palette 4_58 Blue" line.long 0xEC "CP4_59R,Color Palette 4 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP4_59A ,Color Palette 4_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP4_59R ,Color Palette 4_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP4_59G ,Color Palette 4_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP4_59B ,Color Palette 4_59 Blue" line.long 0xF0 "CP4_60R,Color Palette 4 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP4_60A ,Color Palette 4_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP4_60R ,Color Palette 4_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP4_60G ,Color Palette 4_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP4_60B ,Color Palette 4_60 Blue" line.long 0xF4 "CP4_61R,Color Palette 4 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP4_61A ,Color Palette 4_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP4_61R ,Color Palette 4_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP4_61G ,Color Palette 4_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP4_61B ,Color Palette 4_61 Blue" line.long 0xF8 "CP4_62R,Color Palette 4 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP4_62A ,Color Palette 4_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP4_62R ,Color Palette 4_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP4_62G ,Color Palette 4_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP4_62B ,Color Palette 4_62 Blue" line.long 0xFC "CP4_63R,Color Palette 4 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP4_63A ,Color Palette 4_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP4_63R ,Color Palette 4_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP4_63G ,Color Palette 4_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP4_63B ,Color Palette 4_63 Blue" line.long 0x100 "CP4_64R,Color Palette 4 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP4_64A ,Color Palette 4_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP4_64R ,Color Palette 4_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP4_64G ,Color Palette 4_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP4_64B ,Color Palette 4_64 Blue" line.long 0x104 "CP4_65R,Color Palette 4 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP4_65A ,Color Palette 4_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP4_65R ,Color Palette 4_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP4_65G ,Color Palette 4_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP4_65B ,Color Palette 4_65 Blue" line.long 0x108 "CP4_66R,Color Palette 4 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP4_66A ,Color Palette 4_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP4_66R ,Color Palette 4_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP4_66G ,Color Palette 4_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP4_66B ,Color Palette 4_66 Blue" line.long 0x10C "CP4_67R,Color Palette 4 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP4_67A ,Color Palette 4_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP4_67R ,Color Palette 4_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP4_67G ,Color Palette 4_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP4_67B ,Color Palette 4_67 Blue" line.long 0x110 "CP4_68R,Color Palette 4 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP4_68A ,Color Palette 4_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP4_68R ,Color Palette 4_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP4_68G ,Color Palette 4_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP4_68B ,Color Palette 4_68 Blue" line.long 0x114 "CP4_69R,Color Palette 4 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP4_69A ,Color Palette 4_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP4_69R ,Color Palette 4_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP4_69G ,Color Palette 4_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP4_69B ,Color Palette 4_69 Blue" line.long 0x118 "CP4_70R,Color Palette 4 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP4_70A ,Color Palette 4_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP4_70R ,Color Palette 4_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP4_70G ,Color Palette 4_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP4_70B ,Color Palette 4_70 Blue" line.long 0x11C "CP4_71R,Color Palette 4 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP4_71A ,Color Palette 4_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP4_71R ,Color Palette 4_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP4_71G ,Color Palette 4_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP4_71B ,Color Palette 4_71 Blue" line.long 0x120 "CP4_72R,Color Palette 4 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP4_72A ,Color Palette 4_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP4_72R ,Color Palette 4_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP4_72G ,Color Palette 4_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP4_72B ,Color Palette 4_72 Blue" line.long 0x124 "CP4_73R,Color Palette 4 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP4_73A ,Color Palette 4_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP4_73R ,Color Palette 4_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP4_73G ,Color Palette 4_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP4_73B ,Color Palette 4_73 Blue" line.long 0x128 "CP4_74R,Color Palette 4 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP4_74A ,Color Palette 4_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP4_74R ,Color Palette 4_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP4_74G ,Color Palette 4_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP4_74B ,Color Palette 4_74 Blue" line.long 0x12C "CP4_75R,Color Palette 4 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP4_75A ,Color Palette 4_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP4_75R ,Color Palette 4_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP4_75G ,Color Palette 4_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP4_75B ,Color Palette 4_75 Blue" line.long 0x130 "CP4_76R,Color Palette 4 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP4_76A ,Color Palette 4_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP4_76R ,Color Palette 4_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP4_76G ,Color Palette 4_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP4_76B ,Color Palette 4_76 Blue" line.long 0x134 "CP4_77R,Color Palette 4 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP4_77A ,Color Palette 4_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP4_77R ,Color Palette 4_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP4_77G ,Color Palette 4_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP4_77B ,Color Palette 4_77 Blue" line.long 0x138 "CP4_78R,Color Palette 4 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP4_78A ,Color Palette 4_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP4_78R ,Color Palette 4_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP4_78G ,Color Palette 4_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP4_78B ,Color Palette 4_78 Blue" line.long 0x13C "CP4_79R,Color Palette 4 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP4_79A ,Color Palette 4_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP4_79R ,Color Palette 4_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP4_79G ,Color Palette 4_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP4_79B ,Color Palette 4_79 Blue" line.long 0x140 "CP4_80R,Color Palette 4 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP4_80A ,Color Palette 4_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP4_80R ,Color Palette 4_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP4_80G ,Color Palette 4_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP4_80B ,Color Palette 4_80 Blue" line.long 0x144 "CP4_81R,Color Palette 4 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP4_81A ,Color Palette 4_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP4_81R ,Color Palette 4_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP4_81G ,Color Palette 4_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP4_81B ,Color Palette 4_81 Blue" line.long 0x148 "CP4_82R,Color Palette 4 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP4_82A ,Color Palette 4_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP4_82R ,Color Palette 4_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP4_82G ,Color Palette 4_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP4_82B ,Color Palette 4_82 Blue" line.long 0x14C "CP4_83R,Color Palette 4 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP4_83A ,Color Palette 4_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP4_83R ,Color Palette 4_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP4_83G ,Color Palette 4_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP4_83B ,Color Palette 4_83 Blue" line.long 0x150 "CP4_84R,Color Palette 4 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP4_84A ,Color Palette 4_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP4_84R ,Color Palette 4_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP4_84G ,Color Palette 4_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP4_84B ,Color Palette 4_84 Blue" line.long 0x154 "CP4_85R,Color Palette 4 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP4_85A ,Color Palette 4_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP4_85R ,Color Palette 4_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP4_85G ,Color Palette 4_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP4_85B ,Color Palette 4_85 Blue" line.long 0x158 "CP4_86R,Color Palette 4 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP4_86A ,Color Palette 4_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP4_86R ,Color Palette 4_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP4_86G ,Color Palette 4_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP4_86B ,Color Palette 4_86 Blue" line.long 0x15C "CP4_87R,Color Palette 4 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP4_87A ,Color Palette 4_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP4_87R ,Color Palette 4_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP4_87G ,Color Palette 4_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP4_87B ,Color Palette 4_87 Blue" line.long 0x160 "CP4_88R,Color Palette 4 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP4_88A ,Color Palette 4_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP4_88R ,Color Palette 4_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP4_88G ,Color Palette 4_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP4_88B ,Color Palette 4_88 Blue" line.long 0x164 "CP4_89R,Color Palette 4 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP4_89A ,Color Palette 4_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP4_89R ,Color Palette 4_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP4_89G ,Color Palette 4_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP4_89B ,Color Palette 4_89 Blue" line.long 0x168 "CP4_90R,Color Palette 4 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP4_90A ,Color Palette 4_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP4_90R ,Color Palette 4_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP4_90G ,Color Palette 4_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP4_90B ,Color Palette 4_90 Blue" line.long 0x16C "CP4_91R,Color Palette 4 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP4_91A ,Color Palette 4_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP4_91R ,Color Palette 4_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP4_91G ,Color Palette 4_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP4_91B ,Color Palette 4_91 Blue" line.long 0x170 "CP4_92R,Color Palette 4 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP4_92A ,Color Palette 4_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP4_92R ,Color Palette 4_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP4_92G ,Color Palette 4_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP4_92B ,Color Palette 4_92 Blue" line.long 0x174 "CP4_93R,Color Palette 4 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP4_93A ,Color Palette 4_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP4_93R ,Color Palette 4_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP4_93G ,Color Palette 4_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP4_93B ,Color Palette 4_93 Blue" line.long 0x178 "CP4_94R,Color Palette 4 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP4_94A ,Color Palette 4_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP4_94R ,Color Palette 4_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP4_94G ,Color Palette 4_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP4_94B ,Color Palette 4_94 Blue" line.long 0x17C "CP4_95R,Color Palette 4 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP4_95A ,Color Palette 4_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP4_95R ,Color Palette 4_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP4_95G ,Color Palette 4_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP4_95B ,Color Palette 4_95 Blue" line.long 0x180 "CP4_96R,Color Palette 4 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP4_96A ,Color Palette 4_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP4_96R ,Color Palette 4_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP4_96G ,Color Palette 4_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP4_96B ,Color Palette 4_96 Blue" line.long 0x184 "CP4_97R,Color Palette 4 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP4_97A ,Color Palette 4_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP4_97R ,Color Palette 4_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP4_97G ,Color Palette 4_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP4_97B ,Color Palette 4_97 Blue" line.long 0x188 "CP4_98R,Color Palette 4 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP4_98A ,Color Palette 4_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP4_98R ,Color Palette 4_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP4_98G ,Color Palette 4_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP4_98B ,Color Palette 4_98 Blue" line.long 0x18C "CP4_99R,Color Palette 4 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP4_99A ,Color Palette 4_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP4_99R ,Color Palette 4_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP4_99G ,Color Palette 4_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP4_99B ,Color Palette 4_99 Blue" line.long 0x190 "CP4_100R,Color Palette 4 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP4_100A ,Color Palette 4_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP4_100R ,Color Palette 4_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP4_100G ,Color Palette 4_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP4_100B ,Color Palette 4_100 Blue" line.long 0x194 "CP4_101R,Color Palette 4 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP4_101A ,Color Palette 4_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP4_101R ,Color Palette 4_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP4_101G ,Color Palette 4_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP4_101B ,Color Palette 4_101 Blue" line.long 0x198 "CP4_102R,Color Palette 4 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP4_102A ,Color Palette 4_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP4_102R ,Color Palette 4_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP4_102G ,Color Palette 4_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP4_102B ,Color Palette 4_102 Blue" line.long 0x19C "CP4_103R,Color Palette 4 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP4_103A ,Color Palette 4_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP4_103R ,Color Palette 4_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP4_103G ,Color Palette 4_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP4_103B ,Color Palette 4_103 Blue" line.long 0x1A0 "CP4_104R,Color Palette 4 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP4_104A ,Color Palette 4_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP4_104R ,Color Palette 4_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP4_104G ,Color Palette 4_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP4_104B ,Color Palette 4_104 Blue" line.long 0x1A4 "CP4_105R,Color Palette 4 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP4_105A ,Color Palette 4_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP4_105R ,Color Palette 4_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP4_105G ,Color Palette 4_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP4_105B ,Color Palette 4_105 Blue" line.long 0x1A8 "CP4_106R,Color Palette 4 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP4_106A ,Color Palette 4_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP4_106R ,Color Palette 4_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP4_106G ,Color Palette 4_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP4_106B ,Color Palette 4_106 Blue" line.long 0x1AC "CP4_107R,Color Palette 4 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP4_107A ,Color Palette 4_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP4_107R ,Color Palette 4_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP4_107G ,Color Palette 4_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP4_107B ,Color Palette 4_107 Blue" line.long 0x1B0 "CP4_108R,Color Palette 4 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP4_108A ,Color Palette 4_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP4_108R ,Color Palette 4_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP4_108G ,Color Palette 4_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP4_108B ,Color Palette 4_108 Blue" line.long 0x1B4 "CP4_109R,Color Palette 4 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP4_109A ,Color Palette 4_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP4_109R ,Color Palette 4_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP4_109G ,Color Palette 4_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP4_109B ,Color Palette 4_109 Blue" line.long 0x1B8 "CP4_110R,Color Palette 4 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP4_110A ,Color Palette 4_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP4_110R ,Color Palette 4_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP4_110G ,Color Palette 4_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP4_110B ,Color Palette 4_110 Blue" line.long 0x1BC "CP4_111R,Color Palette 4 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP4_111A ,Color Palette 4_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP4_111R ,Color Palette 4_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP4_111G ,Color Palette 4_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP4_111B ,Color Palette 4_111 Blue" line.long 0x1C0 "CP4_112R,Color Palette 4 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP4_112A ,Color Palette 4_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP4_112R ,Color Palette 4_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP4_112G ,Color Palette 4_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP4_112B ,Color Palette 4_112 Blue" line.long 0x1C4 "CP4_113R,Color Palette 4 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP4_113A ,Color Palette 4_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP4_113R ,Color Palette 4_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP4_113G ,Color Palette 4_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP4_113B ,Color Palette 4_113 Blue" line.long 0x1C8 "CP4_114R,Color Palette 4 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP4_114A ,Color Palette 4_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP4_114R ,Color Palette 4_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP4_114G ,Color Palette 4_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP4_114B ,Color Palette 4_114 Blue" line.long 0x1CC "CP4_115R,Color Palette 4 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP4_115A ,Color Palette 4_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP4_115R ,Color Palette 4_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP4_115G ,Color Palette 4_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP4_115B ,Color Palette 4_115 Blue" line.long 0x1D0 "CP4_116R,Color Palette 4 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP4_116A ,Color Palette 4_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP4_116R ,Color Palette 4_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP4_116G ,Color Palette 4_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP4_116B ,Color Palette 4_116 Blue" line.long 0x1D4 "CP4_117R,Color Palette 4 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP4_117A ,Color Palette 4_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP4_117R ,Color Palette 4_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP4_117G ,Color Palette 4_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP4_117B ,Color Palette 4_117 Blue" line.long 0x1D8 "CP4_118R,Color Palette 4 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP4_118A ,Color Palette 4_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP4_118R ,Color Palette 4_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP4_118G ,Color Palette 4_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP4_118B ,Color Palette 4_118 Blue" line.long 0x1DC "CP4_119R,Color Palette 4 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP4_119A ,Color Palette 4_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP4_119R ,Color Palette 4_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP4_119G ,Color Palette 4_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP4_119B ,Color Palette 4_119 Blue" line.long 0x1E0 "CP4_120R,Color Palette 4 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP4_120A ,Color Palette 4_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP4_120R ,Color Palette 4_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP4_120G ,Color Palette 4_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP4_120B ,Color Palette 4_120 Blue" line.long 0x1E4 "CP4_121R,Color Palette 4 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP4_121A ,Color Palette 4_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP4_121R ,Color Palette 4_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP4_121G ,Color Palette 4_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP4_121B ,Color Palette 4_121 Blue" line.long 0x1E8 "CP4_122R,Color Palette 4 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP4_122A ,Color Palette 4_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP4_122R ,Color Palette 4_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP4_122G ,Color Palette 4_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP4_122B ,Color Palette 4_122 Blue" line.long 0x1EC "CP4_123R,Color Palette 4 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP4_123A ,Color Palette 4_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP4_123R ,Color Palette 4_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP4_123G ,Color Palette 4_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP4_123B ,Color Palette 4_123 Blue" line.long 0x1F0 "CP4_124R,Color Palette 4 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP4_124A ,Color Palette 4_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP4_124R ,Color Palette 4_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP4_124G ,Color Palette 4_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP4_124B ,Color Palette 4_124 Blue" line.long 0x1F4 "CP4_125R,Color Palette 4 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP4_125A ,Color Palette 4_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP4_125R ,Color Palette 4_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP4_125G ,Color Palette 4_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP4_125B ,Color Palette 4_125 Blue" line.long 0x1F8 "CP4_126R,Color Palette 4 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP4_126A ,Color Palette 4_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP4_126R ,Color Palette 4_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP4_126G ,Color Palette 4_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP4_126B ,Color Palette 4_126 Blue" line.long 0x1FC "CP4_127R,Color Palette 4 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP4_127A ,Color Palette 4_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP4_127R ,Color Palette 4_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP4_127G ,Color Palette 4_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP4_127B ,Color Palette 4_127 Blue" line.long 0x200 "CP4_128R,Color Palette 4 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP4_128A ,Color Palette 4_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP4_128R ,Color Palette 4_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP4_128G ,Color Palette 4_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP4_128B ,Color Palette 4_128 Blue" line.long 0x204 "CP4_129R,Color Palette 4 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP4_129A ,Color Palette 4_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP4_129R ,Color Palette 4_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP4_129G ,Color Palette 4_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP4_129B ,Color Palette 4_129 Blue" line.long 0x208 "CP4_130R,Color Palette 4 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP4_130A ,Color Palette 4_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP4_130R ,Color Palette 4_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP4_130G ,Color Palette 4_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP4_130B ,Color Palette 4_130 Blue" line.long 0x20C "CP4_131R,Color Palette 4 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP4_131A ,Color Palette 4_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP4_131R ,Color Palette 4_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP4_131G ,Color Palette 4_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP4_131B ,Color Palette 4_131 Blue" line.long 0x210 "CP4_132R,Color Palette 4 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP4_132A ,Color Palette 4_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP4_132R ,Color Palette 4_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP4_132G ,Color Palette 4_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP4_132B ,Color Palette 4_132 Blue" line.long 0x214 "CP4_133R,Color Palette 4 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP4_133A ,Color Palette 4_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP4_133R ,Color Palette 4_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP4_133G ,Color Palette 4_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP4_133B ,Color Palette 4_133 Blue" line.long 0x218 "CP4_134R,Color Palette 4 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP4_134A ,Color Palette 4_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP4_134R ,Color Palette 4_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP4_134G ,Color Palette 4_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP4_134B ,Color Palette 4_134 Blue" line.long 0x21C "CP4_135R,Color Palette 4 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP4_135A ,Color Palette 4_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP4_135R ,Color Palette 4_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP4_135G ,Color Palette 4_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP4_135B ,Color Palette 4_135 Blue" line.long 0x220 "CP4_136R,Color Palette 4 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP4_136A ,Color Palette 4_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP4_136R ,Color Palette 4_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP4_136G ,Color Palette 4_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP4_136B ,Color Palette 4_136 Blue" line.long 0x224 "CP4_137R,Color Palette 4 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP4_137A ,Color Palette 4_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP4_137R ,Color Palette 4_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP4_137G ,Color Palette 4_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP4_137B ,Color Palette 4_137 Blue" line.long 0x228 "CP4_138R,Color Palette 4 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP4_138A ,Color Palette 4_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP4_138R ,Color Palette 4_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP4_138G ,Color Palette 4_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP4_138B ,Color Palette 4_138 Blue" line.long 0x22C "CP4_139R,Color Palette 4 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP4_139A ,Color Palette 4_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP4_139R ,Color Palette 4_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP4_139G ,Color Palette 4_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP4_139B ,Color Palette 4_139 Blue" line.long 0x230 "CP4_140R,Color Palette 4 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP4_140A ,Color Palette 4_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP4_140R ,Color Palette 4_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP4_140G ,Color Palette 4_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP4_140B ,Color Palette 4_140 Blue" line.long 0x234 "CP4_141R,Color Palette 4 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP4_141A ,Color Palette 4_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP4_141R ,Color Palette 4_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP4_141G ,Color Palette 4_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP4_141B ,Color Palette 4_141 Blue" line.long 0x238 "CP4_142R,Color Palette 4 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP4_142A ,Color Palette 4_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP4_142R ,Color Palette 4_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP4_142G ,Color Palette 4_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP4_142B ,Color Palette 4_142 Blue" line.long 0x23C "CP4_143R,Color Palette 4 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP4_143A ,Color Palette 4_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP4_143R ,Color Palette 4_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP4_143G ,Color Palette 4_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP4_143B ,Color Palette 4_143 Blue" line.long 0x240 "CP4_144R,Color Palette 4 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP4_144A ,Color Palette 4_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP4_144R ,Color Palette 4_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP4_144G ,Color Palette 4_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP4_144B ,Color Palette 4_144 Blue" line.long 0x244 "CP4_145R,Color Palette 4 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP4_145A ,Color Palette 4_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP4_145R ,Color Palette 4_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP4_145G ,Color Palette 4_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP4_145B ,Color Palette 4_145 Blue" line.long 0x248 "CP4_146R,Color Palette 4 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP4_146A ,Color Palette 4_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP4_146R ,Color Palette 4_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP4_146G ,Color Palette 4_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP4_146B ,Color Palette 4_146 Blue" line.long 0x24C "CP4_147R,Color Palette 4 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP4_147A ,Color Palette 4_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP4_147R ,Color Palette 4_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP4_147G ,Color Palette 4_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP4_147B ,Color Palette 4_147 Blue" line.long 0x250 "CP4_148R,Color Palette 4 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP4_148A ,Color Palette 4_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP4_148R ,Color Palette 4_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP4_148G ,Color Palette 4_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP4_148B ,Color Palette 4_148 Blue" line.long 0x254 "CP4_149R,Color Palette 4 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP4_149A ,Color Palette 4_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP4_149R ,Color Palette 4_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP4_149G ,Color Palette 4_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP4_149B ,Color Palette 4_149 Blue" line.long 0x258 "CP4_150R,Color Palette 4 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP4_150A ,Color Palette 4_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP4_150R ,Color Palette 4_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP4_150G ,Color Palette 4_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP4_150B ,Color Palette 4_150 Blue" line.long 0x25C "CP4_151R,Color Palette 4 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP4_151A ,Color Palette 4_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP4_151R ,Color Palette 4_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP4_151G ,Color Palette 4_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP4_151B ,Color Palette 4_151 Blue" line.long 0x260 "CP4_152R,Color Palette 4 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP4_152A ,Color Palette 4_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP4_152R ,Color Palette 4_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP4_152G ,Color Palette 4_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP4_152B ,Color Palette 4_152 Blue" line.long 0x264 "CP4_153R,Color Palette 4 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP4_153A ,Color Palette 4_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP4_153R ,Color Palette 4_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP4_153G ,Color Palette 4_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP4_153B ,Color Palette 4_153 Blue" line.long 0x268 "CP4_154R,Color Palette 4 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP4_154A ,Color Palette 4_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP4_154R ,Color Palette 4_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP4_154G ,Color Palette 4_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP4_154B ,Color Palette 4_154 Blue" line.long 0x26C "CP4_155R,Color Palette 4 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP4_155A ,Color Palette 4_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP4_155R ,Color Palette 4_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP4_155G ,Color Palette 4_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP4_155B ,Color Palette 4_155 Blue" line.long 0x270 "CP4_156R,Color Palette 4 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP4_156A ,Color Palette 4_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP4_156R ,Color Palette 4_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP4_156G ,Color Palette 4_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP4_156B ,Color Palette 4_156 Blue" line.long 0x274 "CP4_157R,Color Palette 4 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP4_157A ,Color Palette 4_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP4_157R ,Color Palette 4_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP4_157G ,Color Palette 4_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP4_157B ,Color Palette 4_157 Blue" line.long 0x278 "CP4_158R,Color Palette 4 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP4_158A ,Color Palette 4_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP4_158R ,Color Palette 4_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP4_158G ,Color Palette 4_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP4_158B ,Color Palette 4_158 Blue" line.long 0x27C "CP4_159R,Color Palette 4 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP4_159A ,Color Palette 4_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP4_159R ,Color Palette 4_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP4_159G ,Color Palette 4_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP4_159B ,Color Palette 4_159 Blue" line.long 0x280 "CP4_160R,Color Palette 4 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP4_160A ,Color Palette 4_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP4_160R ,Color Palette 4_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP4_160G ,Color Palette 4_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP4_160B ,Color Palette 4_160 Blue" line.long 0x284 "CP4_161R,Color Palette 4 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP4_161A ,Color Palette 4_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP4_161R ,Color Palette 4_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP4_161G ,Color Palette 4_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP4_161B ,Color Palette 4_161 Blue" line.long 0x288 "CP4_162R,Color Palette 4 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP4_162A ,Color Palette 4_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP4_162R ,Color Palette 4_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP4_162G ,Color Palette 4_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP4_162B ,Color Palette 4_162 Blue" line.long 0x28C "CP4_163R,Color Palette 4 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP4_163A ,Color Palette 4_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP4_163R ,Color Palette 4_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP4_163G ,Color Palette 4_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP4_163B ,Color Palette 4_163 Blue" line.long 0x290 "CP4_164R,Color Palette 4 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP4_164A ,Color Palette 4_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP4_164R ,Color Palette 4_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP4_164G ,Color Palette 4_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP4_164B ,Color Palette 4_164 Blue" line.long 0x294 "CP4_165R,Color Palette 4 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP4_165A ,Color Palette 4_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP4_165R ,Color Palette 4_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP4_165G ,Color Palette 4_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP4_165B ,Color Palette 4_165 Blue" line.long 0x298 "CP4_166R,Color Palette 4 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP4_166A ,Color Palette 4_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP4_166R ,Color Palette 4_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP4_166G ,Color Palette 4_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP4_166B ,Color Palette 4_166 Blue" line.long 0x29C "CP4_167R,Color Palette 4 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP4_167A ,Color Palette 4_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP4_167R ,Color Palette 4_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP4_167G ,Color Palette 4_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP4_167B ,Color Palette 4_167 Blue" line.long 0x2A0 "CP4_168R,Color Palette 4 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP4_168A ,Color Palette 4_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP4_168R ,Color Palette 4_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP4_168G ,Color Palette 4_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP4_168B ,Color Palette 4_168 Blue" line.long 0x2A4 "CP4_169R,Color Palette 4 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP4_169A ,Color Palette 4_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP4_169R ,Color Palette 4_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP4_169G ,Color Palette 4_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP4_169B ,Color Palette 4_169 Blue" line.long 0x2A8 "CP4_170R,Color Palette 4 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP4_170A ,Color Palette 4_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP4_170R ,Color Palette 4_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP4_170G ,Color Palette 4_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP4_170B ,Color Palette 4_170 Blue" line.long 0x2AC "CP4_171R,Color Palette 4 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP4_171A ,Color Palette 4_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP4_171R ,Color Palette 4_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP4_171G ,Color Palette 4_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP4_171B ,Color Palette 4_171 Blue" line.long 0x2B0 "CP4_172R,Color Palette 4 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP4_172A ,Color Palette 4_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP4_172R ,Color Palette 4_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP4_172G ,Color Palette 4_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP4_172B ,Color Palette 4_172 Blue" line.long 0x2B4 "CP4_173R,Color Palette 4 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP4_173A ,Color Palette 4_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP4_173R ,Color Palette 4_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP4_173G ,Color Palette 4_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP4_173B ,Color Palette 4_173 Blue" line.long 0x2B8 "CP4_174R,Color Palette 4 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP4_174A ,Color Palette 4_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP4_174R ,Color Palette 4_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP4_174G ,Color Palette 4_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP4_174B ,Color Palette 4_174 Blue" line.long 0x2BC "CP4_175R,Color Palette 4 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP4_175A ,Color Palette 4_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP4_175R ,Color Palette 4_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP4_175G ,Color Palette 4_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP4_175B ,Color Palette 4_175 Blue" line.long 0x2C0 "CP4_176R,Color Palette 4 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP4_176A ,Color Palette 4_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP4_176R ,Color Palette 4_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP4_176G ,Color Palette 4_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP4_176B ,Color Palette 4_176 Blue" line.long 0x2C4 "CP4_177R,Color Palette 4 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP4_177A ,Color Palette 4_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP4_177R ,Color Palette 4_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP4_177G ,Color Palette 4_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP4_177B ,Color Palette 4_177 Blue" line.long 0x2C8 "CP4_178R,Color Palette 4 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP4_178A ,Color Palette 4_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP4_178R ,Color Palette 4_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP4_178G ,Color Palette 4_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP4_178B ,Color Palette 4_178 Blue" line.long 0x2CC "CP4_179R,Color Palette 4 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP4_179A ,Color Palette 4_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP4_179R ,Color Palette 4_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP4_179G ,Color Palette 4_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP4_179B ,Color Palette 4_179 Blue" line.long 0x2D0 "CP4_180R,Color Palette 4 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP4_180A ,Color Palette 4_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP4_180R ,Color Palette 4_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP4_180G ,Color Palette 4_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP4_180B ,Color Palette 4_180 Blue" line.long 0x2D4 "CP4_181R,Color Palette 4 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP4_181A ,Color Palette 4_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP4_181R ,Color Palette 4_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP4_181G ,Color Palette 4_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP4_181B ,Color Palette 4_181 Blue" line.long 0x2D8 "CP4_182R,Color Palette 4 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP4_182A ,Color Palette 4_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP4_182R ,Color Palette 4_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP4_182G ,Color Palette 4_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP4_182B ,Color Palette 4_182 Blue" line.long 0x2DC "CP4_183R,Color Palette 4 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP4_183A ,Color Palette 4_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP4_183R ,Color Palette 4_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP4_183G ,Color Palette 4_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP4_183B ,Color Palette 4_183 Blue" line.long 0x2E0 "CP4_184R,Color Palette 4 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP4_184A ,Color Palette 4_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP4_184R ,Color Palette 4_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP4_184G ,Color Palette 4_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP4_184B ,Color Palette 4_184 Blue" line.long 0x2E4 "CP4_185R,Color Palette 4 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP4_185A ,Color Palette 4_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP4_185R ,Color Palette 4_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP4_185G ,Color Palette 4_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP4_185B ,Color Palette 4_185 Blue" line.long 0x2E8 "CP4_186R,Color Palette 4 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP4_186A ,Color Palette 4_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP4_186R ,Color Palette 4_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP4_186G ,Color Palette 4_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP4_186B ,Color Palette 4_186 Blue" line.long 0x2EC "CP4_187R,Color Palette 4 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP4_187A ,Color Palette 4_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP4_187R ,Color Palette 4_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP4_187G ,Color Palette 4_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP4_187B ,Color Palette 4_187 Blue" line.long 0x2F0 "CP4_188R,Color Palette 4 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP4_188A ,Color Palette 4_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP4_188R ,Color Palette 4_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP4_188G ,Color Palette 4_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP4_188B ,Color Palette 4_188 Blue" line.long 0x2F4 "CP4_189R,Color Palette 4 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP4_189A ,Color Palette 4_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP4_189R ,Color Palette 4_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP4_189G ,Color Palette 4_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP4_189B ,Color Palette 4_189 Blue" line.long 0x2F8 "CP4_190R,Color Palette 4 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP4_190A ,Color Palette 4_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP4_190R ,Color Palette 4_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP4_190G ,Color Palette 4_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP4_190B ,Color Palette 4_190 Blue" line.long 0x2FC "CP4_191R,Color Palette 4 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP4_191A ,Color Palette 4_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP4_191R ,Color Palette 4_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP4_191G ,Color Palette 4_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP4_191B ,Color Palette 4_191 Blue" line.long 0x300 "CP4_192R,Color Palette 4 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP4_192A ,Color Palette 4_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP4_192R ,Color Palette 4_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP4_192G ,Color Palette 4_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP4_192B ,Color Palette 4_192 Blue" line.long 0x304 "CP4_193R,Color Palette 4 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP4_193A ,Color Palette 4_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP4_193R ,Color Palette 4_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP4_193G ,Color Palette 4_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP4_193B ,Color Palette 4_193 Blue" line.long 0x308 "CP4_194R,Color Palette 4 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP4_194A ,Color Palette 4_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP4_194R ,Color Palette 4_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP4_194G ,Color Palette 4_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP4_194B ,Color Palette 4_194 Blue" line.long 0x30C "CP4_195R,Color Palette 4 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP4_195A ,Color Palette 4_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP4_195R ,Color Palette 4_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP4_195G ,Color Palette 4_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP4_195B ,Color Palette 4_195 Blue" line.long 0x310 "CP4_196R,Color Palette 4 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP4_196A ,Color Palette 4_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP4_196R ,Color Palette 4_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP4_196G ,Color Palette 4_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP4_196B ,Color Palette 4_196 Blue" line.long 0x314 "CP4_197R,Color Palette 4 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP4_197A ,Color Palette 4_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP4_197R ,Color Palette 4_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP4_197G ,Color Palette 4_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP4_197B ,Color Palette 4_197 Blue" line.long 0x318 "CP4_198R,Color Palette 4 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP4_198A ,Color Palette 4_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP4_198R ,Color Palette 4_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP4_198G ,Color Palette 4_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP4_198B ,Color Palette 4_198 Blue" line.long 0x31C "CP4_199R,Color Palette 4 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP4_199A ,Color Palette 4_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP4_199R ,Color Palette 4_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP4_199G ,Color Palette 4_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP4_199B ,Color Palette 4_199 Blue" line.long 0x320 "CP4_200R,Color Palette 4 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP4_200A ,Color Palette 4_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP4_200R ,Color Palette 4_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP4_200G ,Color Palette 4_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP4_200B ,Color Palette 4_200 Blue" line.long 0x324 "CP4_201R,Color Palette 4 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP4_201A ,Color Palette 4_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP4_201R ,Color Palette 4_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP4_201G ,Color Palette 4_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP4_201B ,Color Palette 4_201 Blue" line.long 0x328 "CP4_202R,Color Palette 4 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP4_202A ,Color Palette 4_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP4_202R ,Color Palette 4_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP4_202G ,Color Palette 4_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP4_202B ,Color Palette 4_202 Blue" line.long 0x32C "CP4_203R,Color Palette 4 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP4_203A ,Color Palette 4_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP4_203R ,Color Palette 4_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP4_203G ,Color Palette 4_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP4_203B ,Color Palette 4_203 Blue" line.long 0x330 "CP4_204R,Color Palette 4 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP4_204A ,Color Palette 4_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP4_204R ,Color Palette 4_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP4_204G ,Color Palette 4_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP4_204B ,Color Palette 4_204 Blue" line.long 0x334 "CP4_205R,Color Palette 4 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP4_205A ,Color Palette 4_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP4_205R ,Color Palette 4_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP4_205G ,Color Palette 4_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP4_205B ,Color Palette 4_205 Blue" line.long 0x338 "CP4_206R,Color Palette 4 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP4_206A ,Color Palette 4_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP4_206R ,Color Palette 4_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP4_206G ,Color Palette 4_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP4_206B ,Color Palette 4_206 Blue" line.long 0x33C "CP4_207R,Color Palette 4 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP4_207A ,Color Palette 4_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP4_207R ,Color Palette 4_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP4_207G ,Color Palette 4_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP4_207B ,Color Palette 4_207 Blue" line.long 0x340 "CP4_208R,Color Palette 4 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP4_208A ,Color Palette 4_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP4_208R ,Color Palette 4_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP4_208G ,Color Palette 4_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP4_208B ,Color Palette 4_208 Blue" line.long 0x344 "CP4_209R,Color Palette 4 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP4_209A ,Color Palette 4_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP4_209R ,Color Palette 4_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP4_209G ,Color Palette 4_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP4_209B ,Color Palette 4_209 Blue" line.long 0x348 "CP4_210R,Color Palette 4 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP4_210A ,Color Palette 4_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP4_210R ,Color Palette 4_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP4_210G ,Color Palette 4_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP4_210B ,Color Palette 4_210 Blue" line.long 0x34C "CP4_211R,Color Palette 4 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP4_211A ,Color Palette 4_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP4_211R ,Color Palette 4_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP4_211G ,Color Palette 4_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP4_211B ,Color Palette 4_211 Blue" line.long 0x350 "CP4_212R,Color Palette 4 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP4_212A ,Color Palette 4_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP4_212R ,Color Palette 4_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP4_212G ,Color Palette 4_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP4_212B ,Color Palette 4_212 Blue" line.long 0x354 "CP4_213R,Color Palette 4 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP4_213A ,Color Palette 4_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP4_213R ,Color Palette 4_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP4_213G ,Color Palette 4_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP4_213B ,Color Palette 4_213 Blue" line.long 0x358 "CP4_214R,Color Palette 4 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP4_214A ,Color Palette 4_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP4_214R ,Color Palette 4_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP4_214G ,Color Palette 4_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP4_214B ,Color Palette 4_214 Blue" line.long 0x35C "CP4_215R,Color Palette 4 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP4_215A ,Color Palette 4_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP4_215R ,Color Palette 4_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP4_215G ,Color Palette 4_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP4_215B ,Color Palette 4_215 Blue" line.long 0x360 "CP4_216R,Color Palette 4 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP4_216A ,Color Palette 4_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP4_216R ,Color Palette 4_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP4_216G ,Color Palette 4_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP4_216B ,Color Palette 4_216 Blue" line.long 0x364 "CP4_217R,Color Palette 4 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP4_217A ,Color Palette 4_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP4_217R ,Color Palette 4_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP4_217G ,Color Palette 4_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP4_217B ,Color Palette 4_217 Blue" line.long 0x368 "CP4_218R,Color Palette 4 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP4_218A ,Color Palette 4_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP4_218R ,Color Palette 4_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP4_218G ,Color Palette 4_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP4_218B ,Color Palette 4_218 Blue" line.long 0x36C "CP4_219R,Color Palette 4 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP4_219A ,Color Palette 4_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP4_219R ,Color Palette 4_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP4_219G ,Color Palette 4_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP4_219B ,Color Palette 4_219 Blue" line.long 0x370 "CP4_220R,Color Palette 4 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP4_220A ,Color Palette 4_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP4_220R ,Color Palette 4_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP4_220G ,Color Palette 4_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP4_220B ,Color Palette 4_220 Blue" line.long 0x374 "CP4_221R,Color Palette 4 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP4_221A ,Color Palette 4_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP4_221R ,Color Palette 4_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP4_221G ,Color Palette 4_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP4_221B ,Color Palette 4_221 Blue" line.long 0x378 "CP4_222R,Color Palette 4 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP4_222A ,Color Palette 4_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP4_222R ,Color Palette 4_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP4_222G ,Color Palette 4_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP4_222B ,Color Palette 4_222 Blue" line.long 0x37C "CP4_223R,Color Palette 4 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP4_223A ,Color Palette 4_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP4_223R ,Color Palette 4_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP4_223G ,Color Palette 4_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP4_223B ,Color Palette 4_223 Blue" line.long 0x380 "CP4_224R,Color Palette 4 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP4_224A ,Color Palette 4_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP4_224R ,Color Palette 4_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP4_224G ,Color Palette 4_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP4_224B ,Color Palette 4_224 Blue" line.long 0x384 "CP4_225R,Color Palette 4 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP4_225A ,Color Palette 4_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP4_225R ,Color Palette 4_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP4_225G ,Color Palette 4_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP4_225B ,Color Palette 4_225 Blue" line.long 0x388 "CP4_226R,Color Palette 4 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP4_226A ,Color Palette 4_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP4_226R ,Color Palette 4_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP4_226G ,Color Palette 4_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP4_226B ,Color Palette 4_226 Blue" line.long 0x38C "CP4_227R,Color Palette 4 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP4_227A ,Color Palette 4_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP4_227R ,Color Palette 4_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP4_227G ,Color Palette 4_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP4_227B ,Color Palette 4_227 Blue" line.long 0x390 "CP4_228R,Color Palette 4 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP4_228A ,Color Palette 4_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP4_228R ,Color Palette 4_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP4_228G ,Color Palette 4_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP4_228B ,Color Palette 4_228 Blue" line.long 0x394 "CP4_229R,Color Palette 4 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP4_229A ,Color Palette 4_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP4_229R ,Color Palette 4_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP4_229G ,Color Palette 4_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP4_229B ,Color Palette 4_229 Blue" line.long 0x398 "CP4_230R,Color Palette 4 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP4_230A ,Color Palette 4_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP4_230R ,Color Palette 4_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP4_230G ,Color Palette 4_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP4_230B ,Color Palette 4_230 Blue" line.long 0x39C "CP4_231R,Color Palette 4 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP4_231A ,Color Palette 4_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP4_231R ,Color Palette 4_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP4_231G ,Color Palette 4_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP4_231B ,Color Palette 4_231 Blue" line.long 0x3A0 "CP4_232R,Color Palette 4 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP4_232A ,Color Palette 4_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP4_232R ,Color Palette 4_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP4_232G ,Color Palette 4_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP4_232B ,Color Palette 4_232 Blue" line.long 0x3A4 "CP4_233R,Color Palette 4 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP4_233A ,Color Palette 4_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP4_233R ,Color Palette 4_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP4_233G ,Color Palette 4_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP4_233B ,Color Palette 4_233 Blue" line.long 0x3A8 "CP4_234R,Color Palette 4 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP4_234A ,Color Palette 4_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP4_234R ,Color Palette 4_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP4_234G ,Color Palette 4_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP4_234B ,Color Palette 4_234 Blue" line.long 0x3AC "CP4_235R,Color Palette 4 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP4_235A ,Color Palette 4_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP4_235R ,Color Palette 4_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP4_235G ,Color Palette 4_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP4_235B ,Color Palette 4_235 Blue" line.long 0x3B0 "CP4_236R,Color Palette 4 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP4_236A ,Color Palette 4_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP4_236R ,Color Palette 4_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP4_236G ,Color Palette 4_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP4_236B ,Color Palette 4_236 Blue" line.long 0x3B4 "CP4_237R,Color Palette 4 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP4_237A ,Color Palette 4_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP4_237R ,Color Palette 4_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP4_237G ,Color Palette 4_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP4_237B ,Color Palette 4_237 Blue" line.long 0x3B8 "CP4_238R,Color Palette 4 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP4_238A ,Color Palette 4_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP4_238R ,Color Palette 4_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP4_238G ,Color Palette 4_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP4_238B ,Color Palette 4_238 Blue" line.long 0x3BC "CP4_239R,Color Palette 4 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP4_239A ,Color Palette 4_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP4_239R ,Color Palette 4_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP4_239G ,Color Palette 4_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP4_239B ,Color Palette 4_239 Blue" line.long 0x3C0 "CP4_240R,Color Palette 4 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP4_240A ,Color Palette 4_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP4_240R ,Color Palette 4_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP4_240G ,Color Palette 4_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP4_240B ,Color Palette 4_240 Blue" line.long 0x3C4 "CP4_241R,Color Palette 4 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP4_241A ,Color Palette 4_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP4_241R ,Color Palette 4_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP4_241G ,Color Palette 4_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP4_241B ,Color Palette 4_241 Blue" line.long 0x3C8 "CP4_242R,Color Palette 4 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP4_242A ,Color Palette 4_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP4_242R ,Color Palette 4_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP4_242G ,Color Palette 4_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP4_242B ,Color Palette 4_242 Blue" line.long 0x3CC "CP4_243R,Color Palette 4 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP4_243A ,Color Palette 4_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP4_243R ,Color Palette 4_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP4_243G ,Color Palette 4_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP4_243B ,Color Palette 4_243 Blue" line.long 0x3D0 "CP4_244R,Color Palette 4 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP4_244A ,Color Palette 4_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP4_244R ,Color Palette 4_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP4_244G ,Color Palette 4_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP4_244B ,Color Palette 4_244 Blue" line.long 0x3D4 "CP4_245R,Color Palette 4 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP4_245A ,Color Palette 4_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP4_245R ,Color Palette 4_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP4_245G ,Color Palette 4_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP4_245B ,Color Palette 4_245 Blue" line.long 0x3D8 "CP4_246R,Color Palette 4 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP4_246A ,Color Palette 4_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP4_246R ,Color Palette 4_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP4_246G ,Color Palette 4_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP4_246B ,Color Palette 4_246 Blue" line.long 0x3DC "CP4_247R,Color Palette 4 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP4_247A ,Color Palette 4_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP4_247R ,Color Palette 4_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP4_247G ,Color Palette 4_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP4_247B ,Color Palette 4_247 Blue" line.long 0x3E0 "CP4_248R,Color Palette 4 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP4_248A ,Color Palette 4_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP4_248R ,Color Palette 4_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP4_248G ,Color Palette 4_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP4_248B ,Color Palette 4_248 Blue" line.long 0x3E4 "CP4_249R,Color Palette 4 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP4_249A ,Color Palette 4_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP4_249R ,Color Palette 4_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP4_249G ,Color Palette 4_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP4_249B ,Color Palette 4_249 Blue" line.long 0x3E8 "CP4_250R,Color Palette 4 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP4_250A ,Color Palette 4_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP4_250R ,Color Palette 4_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP4_250G ,Color Palette 4_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP4_250B ,Color Palette 4_250 Blue" line.long 0x3EC "CP4_251R,Color Palette 4 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP4_251A ,Color Palette 4_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP4_251R ,Color Palette 4_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP4_251G ,Color Palette 4_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP4_251B ,Color Palette 4_251 Blue" line.long 0x3F0 "CP4_252R,Color Palette 4 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP4_252A ,Color Palette 4_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP4_252R ,Color Palette 4_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP4_252G ,Color Palette 4_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP4_252B ,Color Palette 4_252 Blue" line.long 0x3F4 "CP4_253R,Color Palette 4 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP4_253A ,Color Palette 4_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP4_253R ,Color Palette 4_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP4_253G ,Color Palette 4_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP4_253B ,Color Palette 4_253 Blue" line.long 0x3F8 "CP4_254R,Color Palette 4 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP4_254A ,Color Palette 4_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP4_254R ,Color Palette 4_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP4_254G ,Color Palette 4_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP4_254B ,Color Palette 4_254 Blue" line.long 0x3FC "CP4_255R,Color Palette 4 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP4_255A ,Color Palette 4_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP4_255R ,Color Palette 4_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP4_255G ,Color Palette 4_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP4_255B ,Color Palette 4_255 Blue" tree.end width 9. base ad:0xFEB10000 tree "External Synchronization Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_0,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" group.long 0x1000++0x3 line.long 0x00 "DORCR_0,Display Unit Output Route Control Register" bitfld.long 0x00 30. " PG_1_T ,Pin Generate 1 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 28. " DK_1_S ,Dot Clock Select 1" "Generator 0,Generator 1" textline " " bitfld.long 0x00 24.--25. " PG_1_D ,Pin Generate 1 Input Data Select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" bitfld.long 0x00 21. " DR_0_D ,Display Output Route 0 Data Select" "Pin controller 1,Pin controller 1 at rising edge/Pin controller 2 at falling edge" textline " " bitfld.long 0x00 16.--17. " PG_0_D ,Pin Generate 0 Input Data Select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" textline " " bitfld.long 0x00 4. " RGPV ,R-GP_2 V Blank Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 0. " DPRS ,Display Priority Register Select" "DPPR,DS_1_PR/DS_2_PR" group.long 0x1004++0x7 line.long 0x00 "DPTSR_0,Display Unit Plane Timing Select Register" bitfld.long 0x00 24. " P9DK ,Plane 9 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 23. " P8DK ,Plane 8 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 22. " P7DK ,Plane 7 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 21. " P6DK ,Plane 6 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 20. " P5DK ,Plane 5 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 19. " P4DK ,Plane 4 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 18. " P3DK ,Plane 3 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 17. " P2DK ,Plane 2 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 16. " P1DK ,Plane 1 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 8. " P9TS ,Plane 9 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 7. " P8TS ,Plane 8 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 6. " P7TS ,Plane 7 Timing Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 5. " P6TS ,Plane 6 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 4. " P5TS ,Plane 5 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 3. " P4TS ,Plane 4 Timing Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 2. " P3TS ,Plane 3 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 1. " P2TS ,Plane 2 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 0. " P1TS ,Plane 1 Timing Select" "Generator 0,Generator 1" line.long 0x04 "DAPTSR_0,Display Unit Alpha Plane Timing Select Register" bitfld.long 0x04 18. " AP_3_DK ,Alpha Plane 3 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x04 17. " AP_2_DK ,Alpha Plane 2 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x04 16. " AP_1_DK ,Alpha Plane 1 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x04 2. " AP_3_TS ,Alpha Plane 3 Timing Select" "Generator 0,Generator 1" bitfld.long 0x04 1. " AP_2_TS ,Alpha Plane 2 Timing Select" "Generator 0,Generator 1" bitfld.long 0x04 0. " AP_1_TS ,Alpha Plane 1 Timing Select" "Generator 0,Generator 1" group.long 0x1020++0x3 line.long 0x00 "DS_0_PR,Display Superimpose 0 Priority Register" bitfld.long 0x00 28.--31. " S0S8 ,Display Superimposition 0 Priority 8 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 24.--27. " S0S7 ,Display Superimposition 0 Priority 7 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 20.--23. " S0S6 ,Display Superimposition 0 Priority 6 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 16.--19. " S0S5 ,Display Superimposition 0 Priority 5 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 12.--15. " S0S4 ,Display Superimposition 0 Priority 4 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 8.--11. " S0S3 ,Display Superimposition 0 Priority 3 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 4.--7. " S0S2 ,Display Superimposition 0 Priority 2 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 0.--3. " S0S1 ,Display Superimposition 0 Priority 1 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." group.long 0x1024++0x3 line.long 0x00 "DS_1_PR,Display Superimpose 1 Priority Register" bitfld.long 0x00 28.--31. " S1S8 ,Display Superimposition 1 Priority 8 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 24.--27. " S1S7 ,Display Superimposition 1 Priority 7 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 20.--23. " S1S6 ,Display Superimposition 1 Priority 6 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 16.--19. " S1S5 ,Display Superimposition 1 Priority 5 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 12.--15. " S1S4 ,Display Superimposition 1 Priority 4 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 8.--11. " S1S3 ,Display Superimposition 1 Priority 3 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." textline " " bitfld.long 0x00 4.--7. " S1S2 ,Display Superimposition 1 Priority 2 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." bitfld.long 0x00 0.--3. " S12S1 ,Display Superimposition 1 Priority 1 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,Plane 9,?..." tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" group.long 0x1080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree "YC-RGB Conversion After Superpositioning" group.long 0x4080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree.end tree "RGB-YC Conversion Coefficient Registers" base ad:0xFEB14000 group.long 0x00++0x2F line.long 0x00 "YCLRP,Y Calculation R Coefficient Register" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,Y Calculation R Coefficient" line.long 0x04 "YCLGP,Y Calculation G Coefficient Register" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,Y Calculation G Coefficient" line.long 0x08 "YCLBP,Y Calculation B Coefficient Register" hexmask.long.word 0x08 0.--12. 1. " YCLBP ,Y Calculation B Coefficient" line.long 0x0C "YCLAP,Y Calculation Addition Constant Register" hexmask.long.word 0x0C 0.--12. 1. " YCLAP ,Y Calculation Addition Constant" line.long 0x10 "CBCLRP,Cb Calculation R Coefficient Register" hexmask.long.word 0x10 0.--12. 1. " CBCLRP ,Cb Calculation R Coefficient" line.long 0x14 "CBCLGP,Cb Calculation G Coefficient Register" hexmask.long.word 0x14 0.--12. 1. " CBCLGP ,Cb Calculation G Coefficient" line.long 0x18 "CBCLBP,Cb Calculation B Coefficient Register" hexmask.long.word 0x18 0.--12. 1. " CBCLBP ,Cb Calculation B Coefficient" line.long 0x1C "CBCLAP,Cb Calculation Addition Constant Register" hexmask.long.byte 0x1C 0.--7. 1. " CBCLAP ,Cb Calculation Addition Constant" line.long 0x20 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x20 0.--12. 1. " CRCLRP ,Cr Calculation R Coefficient" line.long 0x24 "CRCLGP,Cr Calculation G Coefficient Register" hexmask.long.word 0x24 0.--12. 1. " CRCLGP ,Cr Calculation G Coefficient" line.long 0x28 "CRCLBP,Cr Calculation B Coefficient Register" hexmask.long.word 0x28 0.--12. 1. " CRCLBP ,Cr Calculation B Coefficient" line.long 0x2C "CRCLAP,Cr Calculation Addition Constant Register" hexmask.long.byte 0x2C 0.--7. 1. " CRCLAP ,Cr Calculation Addition Constant" tree.end width 0xb tree.end tree "DU 1" base ad:0xFEB30000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB30000+0x20))&0x01)==0x01) if (((per.l(ad:0xFEB30000+0x00))&0x300)==0x200) group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" else group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,No" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif else group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." textline " " bitfld.long 0x00 4.--5. " SCM ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif textline " " group.long 0x04++0x03 line.long 0x00 "DSMR_1,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC Pin Mode" "VSYNC signal,CSYNC signal" bitfld.long 0x00 27. " ODPM ,ODDF Pin Mode" "ODDF signal,CLAMP signal" bitfld.long 0x00 25.--26. " DIPM ,DISP Pin Mode" "DISP signal,CSYNC signal,,DE signal" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC Pin Mode" "CSYNC signal,HSYNC signal" bitfld.long 0x00 19. " DIL ,DISP Polarity Selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC Polarity Selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC Polarity Selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP Output Disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE Polarity Selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE Output Mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE Disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD Signal Polarity Selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC Mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_1,Display Status Register" bitfld.long 0x00 22. " DFB12 ,Display Frame Buffer 12 Flag" "AP3DSA0R,AP3DSA1R" bitfld.long 0x00 16. " DFB11 ,Display Frame Buffer 11 Flag" "P9DSA0R,P9DSA1R" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" textline " " bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" textline " " bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_1,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x03 line.long 0x00 "DIER_1,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "DEFR_1,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR Enabling Code [0x7773]" bitfld.long 0x00 12. " EXSL ,External Sync Signal Select" "Post-divison clocks,Pre-divison clocks" bitfld.long 0x00 11. " EXVL ,External Vsync Latch Select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 8.--9. " DODF1 ,Display Output Data Format" "RGB,,Non-multiplexed YC,Multiplexed YC" bitfld.long 0x00 4. " VCUP1 ,Vertical cycle register update timing select" "Falling,Rising" base ad:0xFEB28000 rgroup.long 0x08++0x3 line.long 0x00 "DD_1_SSR_1,Display Unit Domain 1 Status Register 1" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame Flag" "Not occurred,Occurred" bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Not occurred,Occurred" wgroup.long 0x0C++0x03 line.long 0x00 "DD_1_DSRCR_1,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_1,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR Enabling Code" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 Pad Dot Clock Select" "DU1_DOTCLKIN,DU0_DOTCLKIN,DU1_DOTCLKIN,?..." textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 Pad Dot Clock Select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU0_DOTCLKIN,?..." if (((per.l(ad:0xFEB28000+0x2C))&0x02)==0x02) group.long 0x2C++0x03 line.long 0x00 "DEF9R,Display Unit Extensional Function Control 9 Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF9R Enabling Code" bitfld.long 0x00 4.--5. " DRCCS ,DRC Channel Select" "Proc0. -> DRC0/Proc1. -> DRC1,Proc0. -> DRC0/DRC1,Proc1. -> DRC0/DRC1,?..." bitfld.long 0x00 1. " DRCPS ,DRC/YCRGB Priority Mode" "DEF5R,DYCRGBCR" else group.long 0x2C++0x03 line.long 0x00 "DEF9R,Display Unit Extensional Function Control 9 Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF9R Enabling Code" bitfld.long 0x00 1. " DRCPS ,DRC/YCRGB Priority Mode" "DEF5R,DYCRGBCR" endif group.long 0x30++0x03 line.long 0x00 "DDRCCR,Display Unit DRC Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DDRCCR Enabling Code" bitfld.long 0x00 12.--14. " DRC11 ,DRC Select 11 (Superposition processor 1)" "No DRC processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 8.--10. " DRC10 ,DRC Select 10 (Superposition processor 1)" "No DRC processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." textline " " bitfld.long 0x00 4.--6. " DRC01 ,DRC Select 01 (Superposition processor 0)" "No DRC processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 0.--2. " DRC00 ,DRC Select 00 (Superposition processor 0)" "No DRC processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." group.long 0x34++0x03 line.long 0x00 "DYCRGBCR,Display Unit YCRGB Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DYCRGBCR Enabling Code" bitfld.long 0x00 12.--14. " YCRGB11 ,YCRGB Select 11 (Superposition processor 1)" "No YCRGB processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 8.--10. " YCRGB10 ,YCRGB Select 10 (Superposition processor 1)" "No YCRGB processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." textline " " bitfld.long 0x00 4.--6. " YCRGB01 ,YCRGB Select 01 (Superposition processor 0)" "No YCRGB processing,,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." bitfld.long 0x00 0.--2. " YCRGB00 ,YCRGB Select 00 (Superposition processor 0)" "No YCRGB processing,Priority 1 with 2,Priority 2 with 3,Priority 3 with 4,,Priority 5 with 6,?..." tree.end base ad:0xFEB30000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_1,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal Display Start" line.long 0x04 "HDER_1,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal Display End" line.long 0x08 "VDSR_1,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical Display Start" line.long 0x0c "VDER_1,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical Display End" line.long 0x10 "HCR_1,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal Cycle" line.long 0x14 "HSWR_1,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal Sync Width" line.long 0x18 "VCR_1,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical Cycle" line.long 0x1c "VSPR_1,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical Sync Point" if (((per.l(ad:0xFEB30000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_1,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal Pulse Width" line.long 0x04 "SPWR_1,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration Width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_1,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_1,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_1,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP Signal Start" line.long 0x04 "CLAMPWR_1,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP Signal Width" line.long 0x08 "DESR_1,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE Signal Start" line.long 0x0c "DEWR_1,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE Signal Width" tree.end width 11. tree "Display Attribute Registers" group.long 0x90++0xF line.long 0x00 "DOOR_1,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display Off Mode Output Red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display Off Mode Output Green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display Off Mode Output Blue" line.long 0x04 "CDER_1,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color Detection Red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color Detection Green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color Detection Blue" line.long 0x08 "BPOR_1,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background Plane Output Red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background Plane Output Green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background Plane Output Blue" line.long 0x0c "RINTOFSR_1,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster Interrupt Offset" tree.end tree "Alpha-Ratio Planes 1-8" tree.end base ad:0xFEB30000 tree "Display Capture Registers" tree.end tree "Color Palette 1 Registers" tree.end tree "Color Palette 2 Registers" tree.end tree "Color Palette 3 Registers" tree.end tree "Color Palette 4 Registers" tree.end width 9. base ad:0xFEB30000 tree "External Synchronization Control Registers" if (((per.l(ad:0xFEB30000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_1,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" tree.end tree "YC-RGB Conversion After Superpositioning" tree.end tree.end width 0xb tree.end tree.end tree.open "VIN (Video Input Module)" tree "Channel 0" base ad:0xE6EF0000 width 9. group.long 0x00++0x03 line.long 0x00 "V0MC,Video 0 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V0MS,Video 0 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V0FC,Video 0 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V0SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V0ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V0SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V0EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V0SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V0ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V0SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V0EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V0IS,Video 0 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V0MB1,Video 0 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V0MB2,Video 0 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V0MB3,Video 0 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V0LC,Video 0 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V0IE,Video 0 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V0INTS,Video 0 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V0SI,Video 0 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF0000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V0YS,Video 0 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V0XS,Video 0 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V0DMR,Video 0 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V0DMR2,Video 0 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V0UVAOF,Video 0 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V0CSCE1,Video 0 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V0CSCE2,Video 0 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V0CSCE3,Video 0 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V0CSCE4,Video 0 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V0SRCSEL,Video 0 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 1" base ad:0xE6EF1000 width 9. group.long 0x00++0x03 line.long 0x00 "V1MC,Video 1 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V1MS,Video 1 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V1FC,Video 1 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V1SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V1ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V1SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V1EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V1SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V1ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V1SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V1EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V1IS,Video 1 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V1MB1,Video 1 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V1MB2,Video 1 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V1MB3,Video 1 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V1LC,Video 1 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V1IE,Video 1 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V1INTS,Video 1 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V1SI,Video 1 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF1000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V1YS,Video 1 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V1XS,Video 1 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V1DMR,Video 1 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V1DMR2,Video 1 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V1UVAOF,Video 1 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V1CSCE1,Video 1 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V1CSCE2,Video 1 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V1CSCE3,Video 1 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V1CSCE4,Video 1 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V1SRCSEL,Video 1 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 2" base ad:0xE6EF2000 width 9. group.long 0x00++0x03 line.long 0x00 "V2MC,Video 2 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V2MS,Video 2 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V2FC,Video 2 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V2SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V2ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V2SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V2EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V2SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V2ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V2SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V2EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V2IS,Video 2 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V2MB1,Video 2 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V2MB2,Video 2 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V2MB3,Video 2 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V2LC,Video 2 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V2IE,Video 2 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V2INTS,Video 2 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V2SI,Video 2 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF2000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V2YS,Video 2 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V2XS,Video 2 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V2DMR,Video 2 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V2DMR2,Video 2 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V2UVAOF,Video 2 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V2CSCC1,Video 2 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V2CSCC2,Video 2 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V2CSCC3,Video 2 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V2CSCC1,Video 2 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V2CSCC2,Video 2 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V2CSCC3,Video 2 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V2C1A,Video 2 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C1B,Video 2 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C1C,Video 2 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V2C2A,Video 2 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C2B,Video 2 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C2C,Video 2 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V2C3A,Video 2 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C3B,Video 2 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C3C,Video 2 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V2C4A,Video 2 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C4B,Video 2 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C4C,Video 2 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V2C5A,Video 2 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C5B,Video 2 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C5C,Video 2 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V2C6A,Video 2 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C6B,Video 2 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C6C,Video 2 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V2C7A,Video 2 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C7B,Video 2 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C7C,Video 2 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V2C8A,Video 2 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C8B,Video 2 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C8C,Video 2 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V2C1A,Video 2 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C1B,Video 2 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C1C,Video 2 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V2C2A,Video 2 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C2B,Video 2 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C2C,Video 2 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V2C3A,Video 2 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C3B,Video 2 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C3C,Video 2 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V2C4A,Video 2 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C4B,Video 2 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C4C,Video 2 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V2C5A,Video 2 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C5B,Video 2 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C5C,Video 2 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V2C6A,Video 2 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C6B,Video 2 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C6C,Video 2 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V2C7A,Video 2 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C7B,Video 2 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C7C,Video 2 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V2LUTP,Video 2 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V2LUTD,Video 2 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else group.long 0x100++0x07 line.long 0x00 "V2LUTP,Video 2 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V2LUTD,Video 2 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V2YCCR1,Video 2 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V2YCCR2,Video 2 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V2YCCR3,Video 2 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V2CBCCR1,Video 2 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V2CBCCR2,Video 2 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V2CBCCR3,Video 2 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V2CRCCR1,Video 2 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V2CRCCR2,Video 2 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V2CRCCR3,Video 2 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V2SRCSEL,Video 2 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 3" base ad:0xE6EF3000 width 9. group.long 0x00++0x03 line.long 0x00 "V3MC,Video 3 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V3MS,Video 3 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V3FC,Video 3 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V3SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V3ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V3SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V3EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V3SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V3ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V3SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V3EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V3IS,Video 3 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V3MB1,Video 3 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V3MB2,Video 3 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V3MB3,Video 3 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V3LC,Video 3 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V3IE,Video 3 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V3INTS,Video 3 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V3SI,Video 3 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF3000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V3YS,Video 3 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V3XS,Video 3 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V3DMR,Video 3 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V3DMR2,Video 3 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V3UVAOF,Video 3 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") else group.long 0x64++0x0B line.long 0x00 "V3CSCC1,Video 3 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V3CSCC2,Video 3 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V3CSCC3,Video 3 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V3C1A,Video 3 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C1B,Video 3 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C1C,Video 3 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V3C2A,Video 3 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C2B,Video 3 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C2C,Video 3 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V3C3A,Video 3 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C3B,Video 3 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C3C,Video 3 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V3C4A,Video 3 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C4B,Video 3 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C4C,Video 3 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V3C5A,Video 3 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C5B,Video 3 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C5C,Video 3 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V3C6A,Video 3 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C6B,Video 3 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C6C,Video 3 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V3C7A,Video 3 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C7B,Video 3 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C7C,Video 3 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V3C8A,Video 3 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C8B,Video 3 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C8C,Video 3 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V3C1A,Video 3 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C1B,Video 3 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C1C,Video 3 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V3C2A,Video 3 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C2B,Video 3 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C2C,Video 3 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V3C3A,Video 3 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C3B,Video 3 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C3C,Video 3 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V3C4A,Video 3 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C4B,Video 3 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C4C,Video 3 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V3C5A,Video 3 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C5B,Video 3 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C5C,Video 3 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V3C6A,Video 3 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C6B,Video 3 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C6C,Video 3 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V3C7A,Video 3 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C7B,Video 3 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C7C,Video 3 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V3LUTP,Video 3 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V3LUTD,Video 3 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else endif sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V3SRCSEL,Video 3 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 4" base ad:0xE6EF4000 width 9. group.long 0x00++0x03 line.long 0x00 "V4MC,Video 4 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V4MS,Video 4 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V4FC,Video 4 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V4SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V4ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V4SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V4EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V4SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V4ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V4SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V4EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V4IS,Video 4 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V4MB1,Video 4 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V4MB2,Video 4 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V4MB3,Video 4 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V4LC,Video 4 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V4IE,Video 4 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V4INTS,Video 4 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V4SI,Video 4 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF4000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V4MTC,Video 4 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V4MTC,Video 4 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V4MTC,Video 4 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V4MTC,Video 4 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V4YS,Video 4 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V4XS,Video 4 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V4DMR,Video 4 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V4DMR2,Video 4 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V4UVAOF,Video 4 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V4CSCC1,Video 4 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V4CSCC2,Video 4 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V4CSCC3,Video 4 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V4CSCC1,Video 4 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V4CSCC2,Video 4 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V4CSCC3,Video 4 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V4C1A,Video 4 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C1B,Video 4 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C1C,Video 4 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V4C2A,Video 4 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C2B,Video 4 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C2C,Video 4 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V4C3A,Video 4 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C3B,Video 4 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C3C,Video 4 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V4C4A,Video 4 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C4B,Video 4 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C4C,Video 4 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V4C5A,Video 4 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C5B,Video 4 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C5C,Video 4 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V4C6A,Video 4 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C6B,Video 4 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C6C,Video 4 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V4C7A,Video 4 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C7B,Video 4 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C7C,Video 4 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V4C8A,Video 4 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C8B,Video 4 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C8C,Video 4 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V4C1A,Video 4 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C1B,Video 4 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C1C,Video 4 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V4C2A,Video 4 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C2B,Video 4 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C2C,Video 4 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V4C3A,Video 4 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C3B,Video 4 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C3C,Video 4 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V4C4A,Video 4 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C4B,Video 4 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C4C,Video 4 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V4C5A,Video 4 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C5B,Video 4 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C5C,Video 4 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V4C6A,Video 4 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C6B,Video 4 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C6C,Video 4 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V4C7A,Video 4 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V4C7B,Video 4 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V4C7C,Video 4 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V4LUTP,Video 4 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V4LUTD,Video 4 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else group.long 0x100++0x07 line.long 0x00 "V4LUTP,Video 4 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V4LUTD,Video 4 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V4YCCR1,Video 4 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V4YCCR2,Video 4 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V4YCCR3,Video 4 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V4CBCCR1,Video 4 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V4CBCCR2,Video 4 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V4CBCCR3,Video 4 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V4CRCCR1,Video 4 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V4CRCCR2,Video 4 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V4CRCCR3,Video 4 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V4CSCE1,Video 4 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V4CSCE2,Video 4 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V4CSCE3,Video 4 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V4CSCE4,Video 4 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V4SRCSEL,Video 4 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 5" base ad:0xE6EF5000 width 9. group.long 0x00++0x03 line.long 0x00 "V5MC,Video 5 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V5MS,Video 5 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V5FC,Video 5 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V5SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V5ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V5SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V5EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V5SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V5ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V5SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V5EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V5IS,Video 5 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V5MB1,Video 5 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V5MB2,Video 5 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V5MB3,Video 5 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V5LC,Video 5 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V5IE,Video 5 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V5INTS,Video 5 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V5SI,Video 5 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF5000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V5MTC,Video 5 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V5MTC,Video 5 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V5MTC,Video 5 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V5MTC,Video 5 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V5YS,Video 5 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V5XS,Video 5 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V5DMR,Video 5 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V5DMR2,Video 5 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V5UVAOF,Video 5 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V5CSCC1,Video 5 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V5CSCC2,Video 5 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V5CSCC3,Video 5 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V5CSCC1,Video 5 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V5CSCC2,Video 5 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V5CSCC3,Video 5 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V5C1A,Video 5 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C1B,Video 5 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C1C,Video 5 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V5C2A,Video 5 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C2B,Video 5 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C2C,Video 5 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V5C3A,Video 5 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C3B,Video 5 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C3C,Video 5 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V5C4A,Video 5 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C4B,Video 5 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C4C,Video 5 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V5C5A,Video 5 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C5B,Video 5 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C5C,Video 5 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V5C6A,Video 5 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C6B,Video 5 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C6C,Video 5 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V5C7A,Video 5 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C7B,Video 5 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C7C,Video 5 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V5C8A,Video 5 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C8B,Video 5 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C8C,Video 5 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V5C1A,Video 5 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C1B,Video 5 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C1C,Video 5 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V5C2A,Video 5 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C2B,Video 5 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C2C,Video 5 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V5C3A,Video 5 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C3B,Video 5 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C3C,Video 5 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V5C4A,Video 5 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C4B,Video 5 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C4C,Video 5 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V5C5A,Video 5 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C5B,Video 5 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C5C,Video 5 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V5C6A,Video 5 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C6B,Video 5 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C6C,Video 5 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V5C7A,Video 5 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V5C7B,Video 5 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V5C7C,Video 5 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V5LUTP,Video 5 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V5LUTD,Video 5 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else group.long 0x100++0x07 line.long 0x00 "V5LUTP,Video 5 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V5LUTD,Video 5 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V5YCCR1,Video 5 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V5YCCR2,Video 5 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V5YCCR3,Video 5 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V5CBCCR1,Video 5 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V5CBCCR2,Video 5 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V5CBCCR3,Video 5 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V5CRCCR1,Video 5 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V5CRCCR2,Video 5 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V5CRCCR3,Video 5 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V5CSCE1,Video 5 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V5CSCE2,Video 5 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V5CSCE3,Video 5 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V5CSCE4,Video 5 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V5SRCSEL,Video 5 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree.end tree.open "IMR-LSX3 (Distortion Correction Engine)" tree "Channel 0" base ad:0xFE840000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 1" base ad:0xFE850000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 2" base ad:0xFE860000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 3" base ad:0xFE870000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 4" base ad:0xFE880000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 5" base ad:0xFE890000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree.end tree "IMR-LX3 (Distortion Correction Engine)" base ad:0xFEAD0000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 5. " REN ,Rendering-in-Progress Flag" "Not in progress,In progress" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 0. " TRA ,Trap- rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" bitfld.long 0x00 2. " INTCLR ,Clear the INT bit in SR" "No effect,Cleared" bitfld.long 0x00 1. " IERCLR ,Clear the IER bit in SR" "No effect,Cleared" textline " " bitfld.long 0x00 0. " TRACLR ,Clear the TRA bit in SR" "No effect,Cleared" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 6.--31. 0x20 " DSA ,Destination Start Address" group.long 0x38++0x0b line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 6.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x0b line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.byte 0x00 7.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.byte 0x04 7.--12. 1. " SSTR ,Memory width of the SRC area" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y processed,UV processed" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Specifies the precision of luminance processing of source data" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Specifies the precision of luminance processing of source data" "8-bpp/12-bpp,10-bpp" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Set this bit when Y data is output in 12-bpp precision" "8-bpp/10-bpp,12-bpp" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Set this bit when Y data is output in 10-bpp precision" "8-bpp/12-bpp,10-bpp" setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV_set/clr ,Specifies the precision of color difference processing of source data" "8-bpp,10-bpp,12-bpp," setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV_set/clr ,Specifies the precision of color difference of output data" "8-bpp,10-bpp,12-bpp," textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE_set/clr ,Hue Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE_set/clr ,Luminance Correction Enable" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE_set/clr ,Lookup table enable" "Disabled,Enabled" group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM ,Triangle Clockwise Mode" "Counterclockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM ,Relative Source Specification Mode" "Not added,Added" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM ,Relative Destination Specification Mode" "Not added,Added" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE ,Bilinear Filter Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME ,Texture Mapping Enable" "Single color,Texture mapping" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 26.--27. " TCY3 ,Specifies bits 11 and 10 of Y for single-color drawing with the TRI instruction" "0,1,2,3" bitfld.long 0x00 24.--25. " TCY2 ,Specifies bits 9 and 8 of Y for single-color drawing with the TRI instruction" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2" bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp, specifies bits 11 and 10 of color V for single-color drawing with the TRI instruction" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When V is to be output in 10/12 bpp, specifies bits 9 to 0 of color V for single-color drawing with the TRI instruction" bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp, specifies bits 11 and 10 of color U for single-color drawing with the TRI instruction" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp, specifies bits 9 to 0 of color U for single-color drawing with the TRI instruction" group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SYVWRW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVSR ,Height (vertical size) of the source" group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" hexmask.long.word 0x0c 0.--12. 1. " YMAX ,Y Clip MAX" line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" group.long 0xB0++0x17 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Specifies the minimum luminance value when luminance correction is applied" line.long 0x04 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x04 0.--11. 1. " UBMIN ,Specifies the minimum U value when hue correction is applied" line.long 0x08 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x08 0.--11. 1. " VRMIN ,Specifies the minimum V value when hue correction is applied" line.long 0x0C "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x0C 0.--11. 1. " YLMAX ,Specifies the maximum luminance value when luminance correction is applied" line.long 0x10 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x10 0.--11. 1. " UBMAX ,Specifies the maximum U value when hue correction is applied" line.long 0x14 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x14 0.--11. 1. " VRMAX ,Specifies the maximum V value when hue correction is applied" group.long 0xD0++0x0F line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Specifies the number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Specifies the number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Specifies the number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" line.long 0x04 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x04 8.--15. 1. " LSCAL ,Specifies the scale parameter" hexmask.long.byte 0x04 0.--7. 1. " LOFST ,Specifies the offset parameter" line.long 0x08 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x08 8.--15. 1. " UBSCL ,Specifies the U value scale parameter" hexmask.long.byte 0x08 0.--7. 1. " UBOFS ,Specifies the U value offset parameter" line.long 0x0C "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x0C 8.--15. 1. " VRSCL ,Specifies the V value scale parameter" hexmask.long.byte 0x0C 0.--7. 1. " VROFS ,Specifies the V value offset parameter" tree.end tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (ad:0xFEAD0000+0x1000)--(ad:0xFEAD0000+0x1FFC) /long" tree.end width 0xb tree.end tree.open "STB (Stream Buffer for iVDP1C)" tree "Channel 0" base ad:0xEE000000 sif cpuis("R8J7795*")||cpuis("R8A7795*") width 7. wgroup.long 0x00++0x03 line.long 0x00 "S0WDT,STB 0 Write Data" textfld " " button " Write Data" "d ad:0xFE8A0000++0x0F /LONG" else width 12. wgroup.quad 0x00++0x0F line.quad 0x00 "S0WDT_LOW,STB 0 Write Data LOW" hexmask.quad 0x00 0.--63. 1. " WDT[63:0] ,Write Data[63:0]" line.quad 0x08 "S0WDT_HIGH,STB 0 Write Data HIGH" hexmask.quad 0x08 0.--63. 1. " WDT[127:64] ,Write Data[127:64]" endif textline "" group.long 0x100++0x03 line.long 0x00 "S0RPI,STB 0 Read Pointer Increment" hexmask.long.byte 0x00 5.--11. 0x20 " RPA ,Read Pointer Address" group.long 0x180++0x03 line.long 0x00 "S0MC,STB 0 Main Control" hexmask.long.byte 0x00 8.--12. 1. " RPN ,Read Pointer N Value" bitfld.long 0x00 2. " OAE ,Offset Address Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RPR ,Read Pointer Reset" "No effect,Reset" bitfld.long 0x00 0. " WPA ,Write Pointer Alignment" "No effect,Align" rgroup.long 0x190++0x03 line.long 0x00 "S0WP,STB 0 Write Pointer" hexmask.long.word 0x00 16.--28. 1. " WP ,Write Pointer Value" hexmask.long.word 0x00 0.--11. 1. " WPA ,Write Pointer Alignment Value" group.long 0x1A0++0x03 line.long 0x00 "S0RRA,STB 0 Relative Read Address" hexmask.long.byte 0x00 4.--11. 0x10 " RA ,Relative Address" rgroup.long 0x1B0++0x03 line.long 0x00 "S0IS,STB 0 Interrupt Status" bitfld.long 0x00 1. " RER ,Read Pointer Error Flag" "No error,Error" bitfld.long 0x00 0. " WER ,Write Pointer Error Flag" "No error,Error" group.long 0x1C0++0x03 line.long 0x00 "S0IC,STB 0 Interrupt Clear" bitfld.long 0x00 1. " RCL ,Read Pointer Error Flag Clear" "Not cleared,Cleared" bitfld.long 0x00 0. " WCL ,Write Pointer Error Flag Clear" "Not cleared,Cleared" wgroup.long 0x1D0++0x03 line.long 0x00 "S0IE,STB 0 Interrupt Enable" bitfld.long 0x00 1. " REE ,Read Pointer Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " WEE ,Write Pointer Error Interrupt Enable" "Disabled,Enabled" width 0x0b tree.end tree "Channel 1" base ad:0xEE010000 sif cpuis("R8J7795*")||cpuis("R8A7795*") width 7. wgroup.long 0x00++0x03 line.long 0x00 "S1WDT,STB 1 Write Data" textfld " " button " Write Data" "d ad:0xFE8A0000++0x0F /LONG" else width 12. wgroup.quad 0x00++0x0F line.quad 0x00 "S1WDT_LOW,STB 1 Write Data LOW" hexmask.quad 0x00 0.--63. 1. " WDT[63:0] ,Write Data[63:0]" line.quad 0x08 "S1WDT_HIGH,STB 1 Write Data HIGH" hexmask.quad 0x08 0.--63. 1. " WDT[127:64] ,Write Data[127:64]" endif textline "" group.long 0x100++0x03 line.long 0x00 "S1RPI,STB 1 Read Pointer Increment" hexmask.long.byte 0x00 5.--11. 0x20 " RPA ,Read Pointer Address" group.long 0x180++0x03 line.long 0x00 "S1MC,STB 1 Main Control" hexmask.long.byte 0x00 8.--12. 1. " RPN ,Read Pointer N Value" bitfld.long 0x00 2. " OAE ,Offset Address Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RPR ,Read Pointer Reset" "No effect,Reset" bitfld.long 0x00 0. " WPA ,Write Pointer Alignment" "No effect,Align" rgroup.long 0x190++0x03 line.long 0x00 "S1WP,STB 1 Write Pointer" hexmask.long.word 0x00 16.--28. 1. " WP ,Write Pointer Value" hexmask.long.word 0x00 0.--11. 1. " WPA ,Write Pointer Alignment Value" group.long 0x1A0++0x03 line.long 0x00 "S1RRA,STB 1 Relative Read Address" hexmask.long.byte 0x00 4.--11. 0x10 " RA ,Relative Address" rgroup.long 0x1B0++0x03 line.long 0x00 "S1IS,STB 1 Interrupt Status" bitfld.long 0x00 1. " RER ,Read Pointer Error Flag" "No error,Error" bitfld.long 0x00 0. " WER ,Write Pointer Error Flag" "No error,Error" group.long 0x1C0++0x03 line.long 0x00 "S1IC,STB 1 Interrupt Clear" bitfld.long 0x00 1. " RCL ,Read Pointer Error Flag Clear" "Not cleared,Cleared" bitfld.long 0x00 0. " WCL ,Write Pointer Error Flag Clear" "Not cleared,Cleared" wgroup.long 0x1D0++0x03 line.long 0x00 "S1IE,STB 1 Interrupt Enable" bitfld.long 0x00 1. " REE ,Read Pointer Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " WEE ,Write Pointer Error Interrupt Enable" "Disabled,Enabled" width 0x0b tree.end tree "Channel 2" base ad:0xEE020000 sif cpuis("R8J7795*")||cpuis("R8A7795*") width 7. wgroup.long 0x00++0x03 line.long 0x00 "S2WDT,STB 2 Write Data" textfld " " button " Write Data" "d ad:0xFE8A0000++0x0F /LONG" else width 12. wgroup.quad 0x00++0x0F line.quad 0x00 "S2WDT_LOW,STB 2 Write Data LOW" hexmask.quad 0x00 0.--63. 1. " WDT[63:0] ,Write Data[63:0]" line.quad 0x08 "S2WDT_HIGH,STB 2 Write Data HIGH" hexmask.quad 0x08 0.--63. 1. " WDT[127:64] ,Write Data[127:64]" endif textline "" group.long 0x100++0x03 line.long 0x00 "S2RPI,STB 2 Read Pointer Increment" hexmask.long.byte 0x00 5.--11. 0x20 " RPA ,Read Pointer Address" group.long 0x180++0x03 line.long 0x00 "S2MC,STB 2 Main Control" hexmask.long.byte 0x00 8.--12. 1. " RPN ,Read Pointer N Value" bitfld.long 0x00 2. " OAE ,Offset Address Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RPR ,Read Pointer Reset" "No effect,Reset" bitfld.long 0x00 0. " WPA ,Write Pointer Alignment" "No effect,Align" rgroup.long 0x190++0x03 line.long 0x00 "S2WP,STB 2 Write Pointer" hexmask.long.word 0x00 16.--28. 1. " WP ,Write Pointer Value" hexmask.long.word 0x00 0.--11. 1. " WPA ,Write Pointer Alignment Value" group.long 0x1A0++0x03 line.long 0x00 "S2RRA,STB 2 Relative Read Address" hexmask.long.byte 0x00 4.--11. 0x10 " RA ,Relative Address" rgroup.long 0x1B0++0x03 line.long 0x00 "S2IS,STB 2 Interrupt Status" bitfld.long 0x00 1. " RER ,Read Pointer Error Flag" "No error,Error" bitfld.long 0x00 0. " WER ,Write Pointer Error Flag" "No error,Error" group.long 0x1C0++0x03 line.long 0x00 "S2IC,STB 2 Interrupt Clear" bitfld.long 0x00 1. " RCL ,Read Pointer Error Flag Clear" "Not cleared,Cleared" bitfld.long 0x00 0. " WCL ,Write Pointer Error Flag Clear" "Not cleared,Cleared" wgroup.long 0x1D0++0x03 line.long 0x00 "S2IE,STB 2 Interrupt Enable" bitfld.long 0x00 1. " REE ,Read Pointer Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " WEE ,Write Pointer Error Interrupt Enable" "Disabled,Enabled" width 0x0b tree.end tree "Channel 3" base ad:0xEE030000 sif cpuis("R8J7795*")||cpuis("R8A7795*") width 7. wgroup.long 0x00++0x03 line.long 0x00 "S3WDT,STB 3 Write Data" textfld " " button " Write Data" "d ad:0xFE8A0000++0x0F /LONG" else width 12. wgroup.quad 0x00++0x0F line.quad 0x00 "S3WDT_LOW,STB 3 Write Data LOW" hexmask.quad 0x00 0.--63. 1. " WDT[63:0] ,Write Data[63:0]" line.quad 0x08 "S3WDT_HIGH,STB 3 Write Data HIGH" hexmask.quad 0x08 0.--63. 1. " WDT[127:64] ,Write Data[127:64]" endif textline "" group.long 0x100++0x03 line.long 0x00 "S3RPI,STB 3 Read Pointer Increment" hexmask.long.byte 0x00 5.--11. 0x20 " RPA ,Read Pointer Address" group.long 0x180++0x03 line.long 0x00 "S3MC,STB 3 Main Control" hexmask.long.byte 0x00 8.--12. 1. " RPN ,Read Pointer N Value" bitfld.long 0x00 2. " OAE ,Offset Address Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RPR ,Read Pointer Reset" "No effect,Reset" bitfld.long 0x00 0. " WPA ,Write Pointer Alignment" "No effect,Align" rgroup.long 0x190++0x03 line.long 0x00 "S3WP,STB 3 Write Pointer" hexmask.long.word 0x00 16.--28. 1. " WP ,Write Pointer Value" hexmask.long.word 0x00 0.--11. 1. " WPA ,Write Pointer Alignment Value" group.long 0x1A0++0x03 line.long 0x00 "S3RRA,STB 3 Relative Read Address" hexmask.long.byte 0x00 4.--11. 0x10 " RA ,Relative Address" rgroup.long 0x1B0++0x03 line.long 0x00 "S3IS,STB 3 Interrupt Status" bitfld.long 0x00 1. " RER ,Read Pointer Error Flag" "No error,Error" bitfld.long 0x00 0. " WER ,Write Pointer Error Flag" "No error,Error" group.long 0x1C0++0x03 line.long 0x00 "S3IC,STB 3 Interrupt Clear" bitfld.long 0x00 1. " RCL ,Read Pointer Error Flag Clear" "Not cleared,Cleared" bitfld.long 0x00 0. " WCL ,Write Pointer Error Flag Clear" "Not cleared,Cleared" wgroup.long 0x1D0++0x03 line.long 0x00 "S3IE,STB 3 Interrupt Enable" bitfld.long 0x00 1. " REE ,Read Pointer Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " WEE ,Write Pointer Error Interrupt Enable" "Disabled,Enabled" width 0x0b tree.end tree "Channel 4" base ad:0xEE040000 sif cpuis("R8J7795*")||cpuis("R8A7795*") width 7. wgroup.long 0x00++0x03 line.long 0x00 "S4WDT,STB 4 Write Data" textfld " " button " Write Data" "d ad:0xFE8A0000++0x0F /LONG" else width 12. wgroup.quad 0x00++0x0F line.quad 0x00 "S4WDT_LOW,STB 4 Write Data LOW" hexmask.quad 0x00 0.--63. 1. " WDT[63:0] ,Write Data[63:0]" line.quad 0x08 "S4WDT_HIGH,STB 4 Write Data HIGH" hexmask.quad 0x08 0.--63. 1. " WDT[127:64] ,Write Data[127:64]" endif textline "" group.long 0x100++0x03 line.long 0x00 "S4RPI,STB 4 Read Pointer Increment" hexmask.long.byte 0x00 5.--11. 0x20 " RPA ,Read Pointer Address" group.long 0x180++0x03 line.long 0x00 "S4MC,STB 4 Main Control" hexmask.long.byte 0x00 8.--12. 1. " RPN ,Read Pointer N Value" bitfld.long 0x00 2. " OAE ,Offset Address Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RPR ,Read Pointer Reset" "No effect,Reset" bitfld.long 0x00 0. " WPA ,Write Pointer Alignment" "No effect,Align" rgroup.long 0x190++0x03 line.long 0x00 "S4WP,STB 4 Write Pointer" hexmask.long.word 0x00 16.--28. 1. " WP ,Write Pointer Value" hexmask.long.word 0x00 0.--11. 1. " WPA ,Write Pointer Alignment Value" group.long 0x1A0++0x03 line.long 0x00 "S4RRA,STB 4 Relative Read Address" hexmask.long.byte 0x00 4.--11. 0x10 " RA ,Relative Address" rgroup.long 0x1B0++0x03 line.long 0x00 "S4IS,STB 4 Interrupt Status" bitfld.long 0x00 1. " RER ,Read Pointer Error Flag" "No error,Error" bitfld.long 0x00 0. " WER ,Write Pointer Error Flag" "No error,Error" group.long 0x1C0++0x03 line.long 0x00 "S4IC,STB 4 Interrupt Clear" bitfld.long 0x00 1. " RCL ,Read Pointer Error Flag Clear" "Not cleared,Cleared" bitfld.long 0x00 0. " WCL ,Write Pointer Error Flag Clear" "Not cleared,Cleared" wgroup.long 0x1D0++0x03 line.long 0x00 "S4IE,STB 4 Interrupt Enable" bitfld.long 0x00 1. " REE ,Read Pointer Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " WEE ,Write Pointer Error Interrupt Enable" "Disabled,Enabled" width 0x0b tree.end tree.end tree.open "VSP1" tree "VSPS" base ad:0xFE928000 width 18. tree "General Control Registers" group.long (0x00+0x0)++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x4)++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x8)++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0xC)++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic Clock Stop Control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic Clock Stop Control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 Software Reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " SRST1 ,WPF1 Software Reset" "No reset,Reset" bitfld.long 0x00 0. " SRST0 ,WPF0 Software Reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 Operating Status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 Operating Status" "Stopped,Operated" textline " " bitfld.long 0x00 9. " SYS1_ACT ,WPF1 Operating Status" "Stopped,Operated" bitfld.long 0x00 8. " SYS0_ACT ,WPF0 Operating Status" "Stopped,Operated" group.long 0x48++0x7 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (Frame End)" "No interrupt,Interrupt" group.long 0x54++0x7 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (Frame End)" "No interrupt,Interrupt" group.long 0x60++0x7 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (Frame End)" "No interrupt,Interrupt" group.long 0x6C++0x7 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (Frame End)" "No interrupt,Interrupt" group.long 0x78++0x7 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for Display Start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for Display Read Data End" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 Line Data Read End of RFP4" "Disabled,Enabled" bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 Line Data Read End of RFP3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 Line Data Read End of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 Line Data Read End of RFP1" "Disabled,Enabled" bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 Line Data Read End of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for Display Start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for Display Read Data End" "No interrupt,Interrupt" bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 Line Data Read End of RFP3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 Line Data Read End of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 Line Data Read End of RFP1" "No interrupt,Interrupt" bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 Line Data Read End of RFP0" "No interrupt,Interrupt" group.long 0x84++0xF line.long 0x0 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x0 0.--20. 1. " LINE_CNT ,Number of WPF0 Output Lines" line.long 0x4 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x4 0.--20. 1. " LINE_CNT ,Number of WPF1 Output Lines" line.long 0x8 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x8 0.--20. 1. " LINE_CNT ,Number of WPF2 Output Lines" line.long 0xC "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0xC 0.--20. 1. " LINE_CNT ,Number of WPF3 Output Lines" tree.end tree "Display List Control Registers" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display List Control Setting" bitfld.long 0x00 12. " DC2 ,Display List Control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display List Control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display List Control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous Frame Mode for Header-less Display List" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less Display List Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display List Enable/Disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display List Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display List Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display List DataSwapping in Byte Units" "Disabled,Enabled" group.long 0x11C++0x7 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No Wait for Polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended Display List Command Control" ",,2,?..." bitfld.long 0x00 5. " DLPRI ,Display List Control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display List Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended Display List" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display List Body Size Register 0" bitfld.long 0x04 24. " UPD0 ,Update Flag" "Not updated,Updated" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less Display List Body Size" tree.end width 22. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" group.long 0x700++0x4B "RPF 4" line.long 0x00 "VI6_RPF4_SRC_BSIZE,RPF4 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF4_SRC_ESIZE,RPF4 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF4_INFMT,RPF4 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF4_DSWAP,RPF4 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF4_LOC,RPF4 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF4_ALPH_SEL,RPF4 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF4_VRTCOL_SET,RPF4 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF4_MSKCTRL,RPF4 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF4_MSKSET0,RPF4 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF4_MSKSET1,RPF4 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF4_CKEY_CTRL,RPF4 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF4_CKEY_SET0,RPF4 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF4_CKEY_SET1,RPF4 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF4_SRCM_PSTRIDE,RPF4 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF4_SRCM_ASTRIDE,RPF4 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF4_SRCM_ADDR_Y,RPF4 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF4_SRCM_ADDR_C0,RPF4 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF4_SRCM_ADDR_C1,RPF4 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF4_SRCM_ADDR_AI,RPF4 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0xB line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1000+0x0C)++0x3 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" bitfld.long 0x00 16. " FLP ,Vertical flipping Select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1000+0x10)++0x7 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1100++0xB line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1100+0x0C)++0x3 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1100+0x10)++0x7 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1200++0xB line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1200+0x0C)++0x3 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1200+0x10)++0x7 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1300++0xB line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1300+0x0C)++0x3 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1300+0x10)++0x7 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif tree.end width 22. tree "DPR Control Registers" group.long 0x2000++0x23 line.long 0x0 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x0 0.--5. " RT_RPF0 ,RPF0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x4 0.--5. " RT_RPF1 ,RPF1 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x8 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x8 0.--5. " RT_RPF2 ,RPF2 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0xC "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0xC 0.--5. " RT_RPF3 ,RPF3 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x14 8.--13. " FP_WPF0 ,WPF0 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x18 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x18 8.--13. " FP_WPF1 ,WPF1 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x1C "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x1C 8.--13. " FP_WPF2 ,WPF2 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x20 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x20 8.--13. " FP_WPF3 ,WPF3 Internal Operation Timing Setting" ",,,,,5,?..." group.long 0x2024++0x3 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,SRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x3 line.long 0x00 "VI6_DPR_UDS_ROUTE,UDS Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,UDS Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x3 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,LUT Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x3 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HST Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x3 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HSI Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x3 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,BRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" ;no description on memory map group.long 0x2054++0x7 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF Index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target Node Index for HGO Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF Index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target Node Index for HGT Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. tree "SRU Control Registers" group.long 0x2200++0xB line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super Resolution Parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super Resolution Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,Super Resolution Mode" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super Resolution Parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super Resolution Parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super Resolution Parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super Resolution Processing Enable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super Resolution Parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super Resolution Parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super Resolution Parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super Resolution Parameter 8" tree.end width 22. tree "UDS Control Registers" if (((per.l(ad:0xFE928000+0x2300))&0x100000)==0x000000) // THIS[BC] == 0 (Bilinear/Nearest neighbour) group.long 0x2300++0x3 line.long 0x00 "VI6_UDS_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest Neighbour Interpolation Characteristic Control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 18. " NE_RCR ,R/Cr Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 17. " NE_GY ,G/Y Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC Function Enable" "Disabled,Enabled" else group.long 0x2300++0x3 line.long 0x00 "VI6_UDS$2_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest NeighborInterpolation Characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" endif group.long 0x2304++0xF line.long 0x00 "VI6_UDS_SCALE,Scaling Factor Register" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (Integral Part) of Horizontal Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (Fractional Part) of Horizontal Scaling Factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (Integral Part) of Vertical Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (Fractional Part) of Vertical Scaling Factor" line.long 0x04 "VI6_UDS_ALPTH,Alpha Data Threshold Setting Register" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha Data Threshold Setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha Data Threshold Setting 0" line.long 0x08 "VI6_UDS_ALPVAL,Alpha Data Replacing Value Setting Register" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing Alpha Value Setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing Alpha Value Setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing Alpha Value Setting 0" line.long 0x0C "VI6_UDS_PASS_BWIDTH,Passband Register" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal Signal Passband at Image Scale-Up/Down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical Signal Passband at Image Scale-Up/Down" group.long 0x2318++0x3 line.long 0x00 "VI6_UDS_IPC,2D IPC Setting Register" bitfld.long 0x00 27. " FIELD ,Top/Bottom Field Select" "Top,Bottom" group.long 0x2324++0x7 line.long 0x00 "VI6_UDS_CLIP_SIZE,UDS Output Size Clipping Register" hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping Size of Horizontal Pixel Count after Scale-Up/-Down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping Size of Vertical Pixel Count after Scale-Up/-Down" line.long 0x04 "VI6_UDS_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr Component of Fill Color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y Component of Fill Color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb Component of Fill Color" tree.end width 14. tree "LUT Control Register" group.long 0x2800++0x3 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable" "Disabled,Enabled" tree.end width 14. tree "HST Control Register" group.long 0x2A00++0x3 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV Conversion Enable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x3 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV Conversion Enable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color Data Normalization" "Disabled,Enabled" bitfld.long 0x00 19. " D3ON ,Dithering Enable of BRU Input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering Enable of BRU Input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering Enable of BRU Input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering Enable of BRU Input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF Horizontal Size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF Vertical Size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal Coordinate of Virtual RPF Location on Master Layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical Coordinate of Virtual RPF Location on Master Layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed Alpha of Virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of Virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of Virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of Virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation Type of Blending/ROP Unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input Selection for DST Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x10 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x14 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,CMDX x DST - ACMDXY x SRC" bitfld.long 0x14 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation Type of Blending/ROP Unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x18 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x1C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x24 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x24 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x2C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input Selection for DST Side of ROP Unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x30 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" tree.end width 15. tree "LIF Control Registers" group.long 0x3B00++0x7 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer Threshold for Start Ready Notification to Display Module" bitfld.long 0x00 4. " CFMT ,Chroma Format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External Display Module Selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Data Output to External Display Module Enable" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer Threshold for Clock Stop in Dynamic Clock Control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer Threshold for Clock Start in Dynamic Clock Control" tree.end width 18. tree "Security Control Registers" group.long 0x3D00++0x7 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure Attribute for Display List 3 Registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure Attribute for Display List 2 Registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure Attribute for Display List 1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure Attribute for Display List 0 Registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure Attribute for WPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure Attribute for WPF2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure Attribute for WPF1 Registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure Attribute for WPF0 Registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure Attribute for RPF4 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure Attribute for RPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure Attribute for RPF2 Registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure Attribute for RPF1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure Attribute for RPF0 Registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure Attribute for LIF Registers" "Non-secure,Secure" bitfld.long 0x04 10. " SCBRU ,Secure Attribute for BRU Registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure Attribute for HSI Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 8. " SCHST ,Secure Attribute for HST Registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure Attribute for LUT Registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure Attribute for UDS0 Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 0. " SCSRU ,Secure Attribute for SRU Registers" "Non-secure,Secure" tree.end width 15. tree "CLUT/LUT" group.long 0x4000++0x3 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" group.long 0x4400++0x3 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE928000+0x4400)--(ad:0xFE928000+0x47FF) /long" group.long 0x4800++0x3 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE928000+0x4800)--(ad:0xFE928000+0x4BFF) /long" group.long 0x4C00++0x3 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE928000+0x4C00)--(ad:0xFE928000+0x4FFF) /long" group.long 0x7000++0x3 line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE928000+0x7000)--(ad:0xFE928000+0x73FF) /long" tree.end width 0xb tree.end tree "VSPD0" base ad:0xFE930000 width 18. tree "General Control Registers" group.long (0x00+0x0)++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x4)++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x8)++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0xC)++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic Clock Stop Control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic Clock Stop Control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 Software Reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " SRST1 ,WPF1 Software Reset" "No reset,Reset" bitfld.long 0x00 0. " SRST0 ,WPF0 Software Reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 Operating Status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 Operating Status" "Stopped,Operated" textline " " bitfld.long 0x00 9. " SYS1_ACT ,WPF1 Operating Status" "Stopped,Operated" bitfld.long 0x00 8. " SYS0_ACT ,WPF0 Operating Status" "Stopped,Operated" group.long 0x48++0x7 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (Frame End)" "No interrupt,Interrupt" group.long 0x54++0x7 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (Frame End)" "No interrupt,Interrupt" group.long 0x60++0x7 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (Frame End)" "No interrupt,Interrupt" group.long 0x6C++0x7 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (Frame End)" "No interrupt,Interrupt" group.long 0x78++0x7 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for Display Start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for Display Read Data End" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 Line Data Read End of RFP4" "Disabled,Enabled" bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 Line Data Read End of RFP3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 Line Data Read End of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 Line Data Read End of RFP1" "Disabled,Enabled" bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 Line Data Read End of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for Display Start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for Display Read Data End" "No interrupt,Interrupt" bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 Line Data Read End of RFP3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 Line Data Read End of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 Line Data Read End of RFP1" "No interrupt,Interrupt" bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 Line Data Read End of RFP0" "No interrupt,Interrupt" group.long 0x84++0xF line.long 0x0 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x0 0.--20. 1. " LINE_CNT ,Number of WPF0 Output Lines" line.long 0x4 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x4 0.--20. 1. " LINE_CNT ,Number of WPF1 Output Lines" line.long 0x8 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x8 0.--20. 1. " LINE_CNT ,Number of WPF2 Output Lines" line.long 0xC "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0xC 0.--20. 1. " LINE_CNT ,Number of WPF3 Output Lines" tree.end tree "Display List Control Registers" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display List Control Setting" bitfld.long 0x00 12. " DC2 ,Display List Control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display List Control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display List Control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous Frame Mode for Header-less Display List" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less Display List Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display List Enable/Disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display List Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display List Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display List DataSwapping in Byte Units" "Disabled,Enabled" group.long 0x11C++0x7 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No Wait for Polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended Display List Command Control" ",,2,?..." bitfld.long 0x00 5. " DLPRI ,Display List Control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display List Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended Display List" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display List Body Size Register 0" bitfld.long 0x04 24. " UPD0 ,Update Flag" "Not updated,Updated" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less Display List Body Size" tree.end width 22. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0xB line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1000+0x0C)++0x3 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" bitfld.long 0x00 16. " FLP ,Vertical flipping Select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1000+0x10)++0x7 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1100++0xB line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1100+0x0C)++0x3 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1100+0x10)++0x7 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1200++0xB line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1200+0x0C)++0x3 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1200+0x10)++0x7 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1300++0xB line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1300+0x0C)++0x3 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1300+0x10)++0x7 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif tree.end width 22. tree "DPR Control Registers" group.long 0x2000++0x23 line.long 0x0 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x0 0.--5. " RT_RPF0 ,RPF0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x4 0.--5. " RT_RPF1 ,RPF1 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x8 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x8 0.--5. " RT_RPF2 ,RPF2 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0xC "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0xC 0.--5. " RT_RPF3 ,RPF3 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x14 8.--13. " FP_WPF0 ,WPF0 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x18 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x18 8.--13. " FP_WPF1 ,WPF1 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x1C "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x1C 8.--13. " FP_WPF2 ,WPF2 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x20 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x20 8.--13. " FP_WPF3 ,WPF3 Internal Operation Timing Setting" ",,,,,5,?..." group.long 0x2024++0x3 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,SRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x3 line.long 0x00 "VI6_DPR_UDS_ROUTE,UDS Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,UDS Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x3 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,LUT Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x3 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HST Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x3 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HSI Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x3 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,BRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" ;no description on memory map group.long 0x2054++0x7 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF Index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target Node Index for HGO Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF Index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target Node Index for HGT Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. tree "SRU Control Registers" group.long 0x2200++0xB line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super Resolution Parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super Resolution Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,Super Resolution Mode" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super Resolution Parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super Resolution Parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super Resolution Parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super Resolution Processing Enable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super Resolution Parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super Resolution Parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super Resolution Parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super Resolution Parameter 8" tree.end width 22. tree "UDS Control Registers" if (((per.l(ad:0xFE930000+0x2300))&0x100000)==0x000000) // THIS[BC] == 0 (Bilinear/Nearest neighbour) group.long 0x2300++0x3 line.long 0x00 "VI6_UDS_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest Neighbour Interpolation Characteristic Control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 18. " NE_RCR ,R/Cr Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 17. " NE_GY ,G/Y Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC Function Enable" "Disabled,Enabled" else group.long 0x2300++0x3 line.long 0x00 "VI6_UDS$2_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest NeighborInterpolation Characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" endif group.long 0x2304++0xF line.long 0x00 "VI6_UDS_SCALE,Scaling Factor Register" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (Integral Part) of Horizontal Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (Fractional Part) of Horizontal Scaling Factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (Integral Part) of Vertical Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (Fractional Part) of Vertical Scaling Factor" line.long 0x04 "VI6_UDS_ALPTH,Alpha Data Threshold Setting Register" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha Data Threshold Setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha Data Threshold Setting 0" line.long 0x08 "VI6_UDS_ALPVAL,Alpha Data Replacing Value Setting Register" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing Alpha Value Setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing Alpha Value Setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing Alpha Value Setting 0" line.long 0x0C "VI6_UDS_PASS_BWIDTH,Passband Register" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal Signal Passband at Image Scale-Up/Down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical Signal Passband at Image Scale-Up/Down" group.long 0x2318++0x3 line.long 0x00 "VI6_UDS_IPC,2D IPC Setting Register" bitfld.long 0x00 27. " FIELD ,Top/Bottom Field Select" "Top,Bottom" group.long 0x2324++0x7 line.long 0x00 "VI6_UDS_CLIP_SIZE,UDS Output Size Clipping Register" hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping Size of Horizontal Pixel Count after Scale-Up/-Down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping Size of Vertical Pixel Count after Scale-Up/-Down" line.long 0x04 "VI6_UDS_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr Component of Fill Color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y Component of Fill Color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb Component of Fill Color" tree.end width 14. tree "LUT Control Register" group.long 0x2800++0x3 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable" "Disabled,Enabled" tree.end width 14. tree "HST Control Register" group.long 0x2A00++0x3 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV Conversion Enable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x3 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV Conversion Enable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color Data Normalization" "Disabled,Enabled" bitfld.long 0x00 19. " D3ON ,Dithering Enable of BRU Input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering Enable of BRU Input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering Enable of BRU Input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering Enable of BRU Input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF Horizontal Size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF Vertical Size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal Coordinate of Virtual RPF Location on Master Layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical Coordinate of Virtual RPF Location on Master Layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed Alpha of Virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of Virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of Virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of Virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation Type of Blending/ROP Unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input Selection for DST Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x10 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x14 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,CMDX x DST - ACMDXY x SRC" bitfld.long 0x14 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation Type of Blending/ROP Unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x18 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x1C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x24 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x24 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x2C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input Selection for DST Side of ROP Unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x30 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" tree.end width 15. tree "LIF Control Registers" group.long 0x3B00++0x7 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer Threshold for Start Ready Notification to Display Module" bitfld.long 0x00 4. " CFMT ,Chroma Format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External Display Module Selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Data Output to External Display Module Enable" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer Threshold for Clock Stop in Dynamic Clock Control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer Threshold for Clock Start in Dynamic Clock Control" tree.end width 18. tree "Security Control Registers" group.long 0x3D00++0x7 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure Attribute for Display List 3 Registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure Attribute for Display List 2 Registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure Attribute for Display List 1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure Attribute for Display List 0 Registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure Attribute for WPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure Attribute for WPF2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure Attribute for WPF1 Registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure Attribute for WPF0 Registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure Attribute for RPF4 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure Attribute for RPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure Attribute for RPF2 Registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure Attribute for RPF1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure Attribute for RPF0 Registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure Attribute for LIF Registers" "Non-secure,Secure" bitfld.long 0x04 10. " SCBRU ,Secure Attribute for BRU Registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure Attribute for HSI Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 8. " SCHST ,Secure Attribute for HST Registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure Attribute for LUT Registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure Attribute for UDS0 Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 0. " SCSRU ,Secure Attribute for SRU Registers" "Non-secure,Secure" tree.end width 15. tree "CLUT/LUT" group.long 0x4000++0x3 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" group.long 0x4400++0x3 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE930000+0x4400)--(ad:0xFE930000+0x47FF) /long" group.long 0x4800++0x3 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE930000+0x4800)--(ad:0xFE930000+0x4BFF) /long" group.long 0x4C00++0x3 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE930000+0x4C00)--(ad:0xFE930000+0x4FFF) /long" group.long 0x7000++0x3 line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE930000+0x7000)--(ad:0xFE930000+0x73FF) /long" tree.end width 0xb tree.end tree "VSPD1" base ad:0xFE938000 width 18. tree "General Control Registers" group.long (0x00+0x0)++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x4)++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0x8)++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long (0x00+0xC)++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic Clock Stop Control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic Clock Stop Control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 Software Reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " SRST1 ,WPF1 Software Reset" "No reset,Reset" bitfld.long 0x00 0. " SRST0 ,WPF0 Software Reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 Operating Status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 Operating Status" "Stopped,Operated" textline " " bitfld.long 0x00 9. " SYS1_ACT ,WPF1 Operating Status" "Stopped,Operated" bitfld.long 0x00 8. " SYS0_ACT ,WPF0 Operating Status" "Stopped,Operated" group.long 0x48++0x7 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (Frame End)" "No interrupt,Interrupt" group.long 0x54++0x7 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (Frame End)" "No interrupt,Interrupt" group.long 0x60++0x7 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (Frame End)" "No interrupt,Interrupt" group.long 0x6C++0x7 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (Frame End)" "No interrupt,Interrupt" group.long 0x78++0x7 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for Display Start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for Display Read Data End" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 Line Data Read End of RFP4" "Disabled,Enabled" bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 Line Data Read End of RFP3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 Line Data Read End of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 Line Data Read End of RFP1" "Disabled,Enabled" bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 Line Data Read End of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for Display Start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for Display Read Data End" "No interrupt,Interrupt" bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 Line Data Read End of RFP3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 Line Data Read End of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 Line Data Read End of RFP1" "No interrupt,Interrupt" bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 Line Data Read End of RFP0" "No interrupt,Interrupt" group.long 0x84++0xF line.long 0x0 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x0 0.--20. 1. " LINE_CNT ,Number of WPF0 Output Lines" line.long 0x4 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x4 0.--20. 1. " LINE_CNT ,Number of WPF1 Output Lines" line.long 0x8 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x8 0.--20. 1. " LINE_CNT ,Number of WPF2 Output Lines" line.long 0xC "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0xC 0.--20. 1. " LINE_CNT ,Number of WPF3 Output Lines" tree.end tree "Display List Control Registers" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display List Control Setting" bitfld.long 0x00 12. " DC2 ,Display List Control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display List Control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display List Control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous Frame Mode for Header-less Display List" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less Display List Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display List Enable/Disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display List Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display List Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display List DataSwapping in Byte Units" "Disabled,Enabled" group.long 0x11C++0x7 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No Wait for Polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended Display List Command Control" ",,2,?..." bitfld.long 0x00 5. " DLPRI ,Display List Control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display List Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended Display List" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display List Body Size Register 0" bitfld.long 0x04 24. " UPD0 ,Update Flag" "Not updated,Updated" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less Display List Body Size" tree.end width 22. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 22.--23. " YBL ,Y Bit Length" "8 bits,10 bits,12 bits,?..." bitfld.long 0x08 20.--21. " CBL ,C Bit Length" "8 bits,10 bits,12 bits,?..." textline " " bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbour,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0xB line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1000+0x0C)++0x3 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" bitfld.long 0x00 16. " FLP ,Vertical flipping Select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1000+0x10)++0x7 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1100++0xB line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1100+0x0C)++0x3 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1100+0x10)++0x7 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1200++0xB line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1200+0x0C)++0x3 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1200+0x10)++0x7 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif group.long 0x1300++0xB line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1300+0x0C)++0x3 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1300+0x10)++0x7 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) // VI6_LIF_CTRL[LIF_EN] == 1 group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" else hgroup.long 0x1034++0x3 hide.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" endif tree.end width 22. tree "DPR Control Registers" group.long 0x2000++0x23 line.long 0x0 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x0 0.--5. " RT_RPF0 ,RPF0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x4 0.--5. " RT_RPF1 ,RPF1 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x8 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x8 0.--5. " RT_RPF2 ,RPF2 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0xC "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0xC 0.--5. " RT_RPF3 ,RPF3 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x14 8.--13. " FP_WPF0 ,WPF0 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x18 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x18 8.--13. " FP_WPF1 ,WPF1 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x1C "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x1C 8.--13. " FP_WPF2 ,WPF2 Internal Operation Timing Setting" ",,,,,5,?..." line.long 0x20 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x20 8.--13. " FP_WPF3 ,WPF3 Internal Operation Timing Setting" ",,,,,5,?..." group.long 0x2024++0x3 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,SRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x3 line.long 0x00 "VI6_DPR_UDS_ROUTE,UDS Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,UDS Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x3 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,LUT Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x3 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HST Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x3 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,HSI Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x3 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU Internal Operation Timing Setting" "0,?..." bitfld.long 0x00 0.--5. " RT ,BRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" ;no description on memory map group.long 0x2054++0x7 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF Index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target Node Index for HGO Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF Index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target Node Index for HGT Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,,,,,,,,,,,,,SRU,UDS,,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. tree "SRU Control Registers" group.long 0x2200++0xB line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super Resolution Parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super Resolution Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,Super Resolution Mode" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super Resolution Parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super Resolution Parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super Resolution Parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super Resolution Processing Enable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super Resolution Parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super Resolution Parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super Resolution Parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super Resolution Parameter 8" tree.end width 22. tree "UDS Control Registers" if (((per.l(ad:0xFE938000+0x2300))&0x100000)==0x000000) // THIS[BC] == 0 (Bilinear/Nearest neighbour) group.long 0x2300++0x3 line.long 0x00 "VI6_UDS_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest Neighbour Interpolation Characteristic Control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 18. " NE_RCR ,R/Cr Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 17. " NE_GY ,G/Y Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb Interpolation Method When Bilinear/Nearest Neighbour Interpolation is Selected" "Bilinear,Nearest neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC Function Enable" "Disabled,Enabled" else group.long 0x2300++0x3 line.long 0x00 "VI6_UDS$2_CTRL,Scaling Control Register" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest NeighborInterpolation Characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbour,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest Neighbour" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" endif group.long 0x2304++0xF line.long 0x00 "VI6_UDS_SCALE,Scaling Factor Register" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (Integral Part) of Horizontal Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (Fractional Part) of Horizontal Scaling Factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (Integral Part) of Vertical Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (Fractional Part) of Vertical Scaling Factor" line.long 0x04 "VI6_UDS_ALPTH,Alpha Data Threshold Setting Register" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha Data Threshold Setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha Data Threshold Setting 0" line.long 0x08 "VI6_UDS_ALPVAL,Alpha Data Replacing Value Setting Register" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing Alpha Value Setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing Alpha Value Setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing Alpha Value Setting 0" line.long 0x0C "VI6_UDS_PASS_BWIDTH,Passband Register" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal Signal Passband at Image Scale-Up/Down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical Signal Passband at Image Scale-Up/Down" group.long 0x2318++0x3 line.long 0x00 "VI6_UDS_IPC,2D IPC Setting Register" bitfld.long 0x00 27. " FIELD ,Top/Bottom Field Select" "Top,Bottom" group.long 0x2324++0x7 line.long 0x00 "VI6_UDS_CLIP_SIZE,UDS Output Size Clipping Register" hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping Size of Horizontal Pixel Count after Scale-Up/-Down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping Size of Vertical Pixel Count after Scale-Up/-Down" line.long 0x04 "VI6_UDS_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr Component of Fill Color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y Component of Fill Color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb Component of Fill Color" tree.end width 14. tree "LUT Control Register" group.long 0x2800++0x3 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable" "Disabled,Enabled" tree.end width 14. tree "HST Control Register" group.long 0x2A00++0x3 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV Conversion Enable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x3 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV Conversion Enable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color Data Normalization" "Disabled,Enabled" bitfld.long 0x00 19. " D3ON ,Dithering Enable of BRU Input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering Enable of BRU Input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering Enable of BRU Input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering Enable of BRU Input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF Horizontal Size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF Vertical Size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal Coordinate of Virtual RPF Location on Master Layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical Coordinate of Virtual RPF Location on Master Layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed Alpha of Virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of Virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of Virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of Virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation Type of Blending/ROP Unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input Selection for DST Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x10 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x14 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,CMDX x DST - ACMDXY x SRC" bitfld.long 0x14 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation Type of Blending/ROP Unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x18 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x1C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x24 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x24 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending Expression Selection" "CCMDX x DST + CCMDY x SRC,CCMDX x DST - CCMDY x SRC" bitfld.long 0x2C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending Alpha Creation Expression" "ACMDX x DST + ACMDXY x SRC,ACMDX x DST - ACMDXY x SRC" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input Selection for DST Side of ROP Unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" bitfld.long 0x30 0.--3. " AROP ,Alpha Data ROP Operator" "NOP(D),AND(S&D),AND_REVERSE(S&~D),COPY(S),AND_INVERTED(~S&D),CLEAR(0),XOR(S^D),OR(S|D),NOR(~(S|D)),EQUIV(~(S^D)),INVERT(~D),OR_REVERSE(S|~D),COPY_INVERTED(~D),OR_INVERTED(~S|D),NAND(~(S&D)),SET(all1)" tree.end width 15. tree "LIF Control Registers" group.long 0x3B00++0x7 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer Threshold for Start Ready Notification to Display Module" bitfld.long 0x00 4. " CFMT ,Chroma Format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External Display Module Selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Data Output to External Display Module Enable" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer Threshold for Clock Stop in Dynamic Clock Control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer Threshold for Clock Start in Dynamic Clock Control" tree.end width 18. tree "Security Control Registers" group.long 0x3D00++0x7 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure Attribute for Display List 3 Registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure Attribute for Display List 2 Registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure Attribute for Display List 1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure Attribute for Display List 0 Registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure Attribute for WPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure Attribute for WPF2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure Attribute for WPF1 Registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure Attribute for WPF0 Registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure Attribute for RPF4 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure Attribute for RPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure Attribute for RPF2 Registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure Attribute for RPF1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure Attribute for RPF0 Registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure Attribute for LIF Registers" "Non-secure,Secure" bitfld.long 0x04 10. " SCBRU ,Secure Attribute for BRU Registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure Attribute for HSI Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 8. " SCHST ,Secure Attribute for HST Registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure Attribute for LUT Registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure Attribute for UDS0 Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 0. " SCSRU ,Secure Attribute for SRU Registers" "Non-secure,Secure" tree.end width 15. tree "CLUT/LUT" group.long 0x4000++0x3 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE938000+0x4000)--(ad:0xFE938000+0x43FF) /long" group.long 0x4400++0x3 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE938000+0x4400)--(ad:0xFE938000+0x47FF) /long" group.long 0x4800++0x3 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE938000+0x4800)--(ad:0xFE938000+0x4BFF) /long" group.long 0x4C00++0x3 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE938000+0x4C00)--(ad:0xFE938000+0x4FFF) /long" group.long 0x7000++0x3 line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE938000+0x7000)--(ad:0xFE938000+0x73FF) /long" tree.end width 0xb tree.end tree.end tree "JPU (JPEG Processing Unit)" base ad:0xFE980000 width 0xa group.long 0x00++0x07 line.long 0x00 "JCMOD,JPEG Code Mode Register" bitfld.long 0x00 8. " SOIC ,SOI Marker Delete" "Exists,Deleted" bitfld.long 0x00 7. " PCTR ,Image Data Input Control" "0,1" bitfld.long 0x00 5.--6. " MSKIP ,Marker Skip Mode" "Marker,No marker,?..." textline " " bitfld.long 0x00 4. " CCNT ,Code Amount Count Mode" "Disabled,Enabled" bitfld.long 0x00 3. " DSP ,Encoding/Decoding Set" "Encoding,Decoding" bitfld.long 0x00 0.--2. " REDU ,Subsampling Set" ",4:2:2,4:2:0,?..." line.long 0x04 "JCCMD,JPEG Code Command Register" bitfld.long 0x04 12. " SRST ,Software Reset" "No reset,Reset" bitfld.long 0x04 11. " RWCMD ,Reload Buffer Write Restart Command" "Not restarted,Restarted" bitfld.long 0x04 10. " RRCMD ,Reload Buffer Read Restart Command" "Not restarted,Restarted" textline " " bitfld.long 0x04 9. " LCMD1 ,External Line Buffer Processing Restart Command" "Not restarted,Restarted" bitfld.long 0x04 8. " LCMD2 ,External Line Buffer Process Restart Command" "Not restarted,Restarted" bitfld.long 0x04 7. " BRST ,Bus Reset" "No reset,Reset" textline " " bitfld.long 0x04 2. " JEND ,Interrupt Signal Clear Command" "Not Cleared,Cleared" bitfld.long 0x04 1. " JRST ,JPEG Core Processing-Stopped Revoke Command" "Not Cleared,Cleared" bitfld.long 0x04 0. " JSRT ,JPEG Core Process Start Command" "Not started,Started" rgroup.long 0x08++0x03 line.long 0x00 "JCSTS,JPEG Code Status Register" bitfld.long 0x00 0. " STS ,Operating State" "Not in operation,Encoding or decoding" group.long 0x0c++0x1f line.long 0x00 "JCQTN,JPEG Code Quantization Table Number Register" bitfld.long 0x00 4.--5. " QT3 ,Quantization table number for the third color component" "0,1,2,3" bitfld.long 0x00 2.--3. " QT2 ,Quantization table number for the second color component" "0,1,2,3" bitfld.long 0x00 0.--1. " QT1 ,Quantization table number for the first color component" "0,1,2,3" line.long 0x04 "JCHTN,JPEG Code Huffman Table Number Register" bitfld.long 0x04 5. " HTA3 ,Huffman table number (AC) for the third color component" "0,1" bitfld.long 0x04 4. " HTD3 ,Huffman table number (DC) for the third color component" "0,1" bitfld.long 0x04 3. " HTA2 ,Huffman table number (AC) for the second color component" "0,1" bitfld.long 0x04 2. " HTD2 ,Huffman table number (DC) for the second color component" "0,1" bitfld.long 0x04 1. " HTA1 ,Huffman table number (AC) for the first color component" "0,1" bitfld.long 0x04 0. " HTD1 ,Huffman table number (DC) for the first color component" "0,1" line.long 0x08 "JCDRIU,JPEG Code DRI Upper Register" hexmask.long.byte 0x08 0.--7. 1. " DRIU ,Upper Bytes of MCUs Preceding RST Marker" line.long 0x0c "JCDRID,JPEG Code DRI Lower Register" hexmask.long.byte 0x0c 0.--7. 1. " DRID ,Lower Bytes of MCUs Preceding RST Marker" line.long 0x10 "JCVSZU,JPEG Code Vertical Size Upper Register" hexmask.long.byte 0x10 0.--7. 1. " VSZU ,Upper Bytes of Vertical Image Size" line.long 0x14 "JCVSZD,JPEG Code Vertical Size Lower Register" hexmask.long.byte 0x14 0.--7. 1. " VSZD ,Lower Bytes of Vertical Image Size" line.long 0x18 "JCHSZU,JPEG Code Horizontal Size Upper Register" hexmask.long.byte 0x18 0.--7. 1. " HSZU ,Upper Bytes of Horizontal Image Size" line.long 0x1c "JCHSZD,JPEG Coded Horizontal Size Lower Register" hexmask.long.byte 0x1c 0.--7. 1. " HSZD ,Lower Bytes of Horizontal Image Size" rgroup.long 0x2c++0xb line.long 0x00 "JCDTCU,JPEG Code Data Count Upper Register" hexmask.long.byte 0x00 0.--7. 1. " DCU ,Upper bytes for the counted amount of data to be encoded" line.long 0x04 "JCDTCM,JPEG Code Data Count Middle Register" hexmask.long.byte 0x04 0.--7. 1. " DCM ,Middle bytes for the counted amount of data to be encoded" line.long 0x08 "JCDTCD,JPEG Code Data Count Lower Register" hexmask.long.byte 0x08 0.--7. 1. " DCD ,Lower bytes of the counted amount of data to be encoded" group.long 0x38++0xb line.long 0x00 "JINTE,JPEG Interrupt Enable Register" bitfld.long 0x00 14. " INT14 ,Interrupt is generated at every address reloading for coded data reading" "Not generated,Generated" bitfld.long 0x00 13. " INT13 ,Interrupt is generated at every address reloading for coded data writing" "Not generated,Generated" bitfld.long 0x00 12. " INT12 ,Interrupt is generated at every transmission completion of Y in multiples of 16 lines" "Not generated,Generated" textline " " bitfld.long 0x00 11. " INT11 ,Interrupt is generated at every transmission completion of Y in multiples of 8 lines" "Not generated,Generated" bitfld.long 0x00 10. " INT10 ,Interrupt of transfer to the external buffer end is generated" "Not generated,Generated" bitfld.long 0x00 7. " INT7 ,Interrupt is generated when the number of data in the restart interval is not correct" "Not generated,Generated" textline " " bitfld.long 0x00 6. " INT6 ,Interrupt is generated when the total number is not correct" "Not generated,Generated" bitfld.long 0x00 5. " INT5 ,Interrupt is generated when the last MCU number is not correct" "Not generated,Generated" bitfld.long 0x00 3. " INT3 ,Interrupt is generated when the image size and the subsampling setting can be read" "Not generated,Generated" line.long 0x04 "JINTS,JPEG Interrupt Status Register" bitfld.long 0x04 14. " INS14 ,Address is reloaded during stream data reading" "Not reloaded,Reloaded" bitfld.long 0x04 13. " INS13 ,Address is reloaded during stream data writing" "Not reloaded,Reloaded" bitfld.long 0x04 12. " INS12 ,Transfer of Y in multiples of 16 lines is completed" "Not completed,Completed" bitfld.long 0x04 11. " INS11 ,Transfer of Y in multiples of 8 lines is completed" "Not completed,Completed" textline " " bitfld.long 0x04 10. " INS10 ,All result data have been completely transferred" "Not transferred,transferred" bitfld.long 0x04 6. " INS6 ,JPEG completes the encoding process normally" "Not completed,completed" bitfld.long 0x04 5. " INS5 ,Encoded data error occurs" "Not occurred,occurred" bitfld.long 0x04 3. " INS3 ,image size and subsampling setting can be read" "Not readable,Readable" line.long 0x08 "JCDERR,JPEG Code Decode Error Register" bitfld.long 0x08 0.--3. " ERR ,Error Code" "Normal,SIO not detected: SIO not detected until EOI detected,SOF1 to SOFF detected,Subsampling setting other than YCbCr 4:4:4,SOF accuracy error: Other than 8 detected,DQT accuracy error: Other than 0 detected,Component error 1,Component error 2,SOF0/DQT/DHT not detected when SOS detected,SOS not detected: SOS not detected until EOI detected,EOI not detected,Restart interval data number error detected,Image size error detected,Last MCU data number error detected,Block data number error detected,?..." rgroup.long 0x44++0x3 line.long 0x00 "JCRST,JPEG Code Reset Register" bitfld.long 0x00 0. " RST ,Operating State" "Not suspended,Suspended" if (((per.l(ad:0xFE980000+0x70))&0x02)==0x02) group.long 0x70++0x03 line.long 0x00 "JIFECNT,JPEG Interface Encoding Control Register" hexmask.long.word 0x00 16.--27. 1. " PU ,Processing Unit" bitfld.long 0x00 6. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" textline " " bitfld.long 0x00 2.--3. " ROT ,Rotated Read Mode" "0,90,180,270" bitfld.long 0x00 1. " BUF ,Buffer Mode" "Frame buffer,Line buffer" bitfld.long 0x00 0. " INFT ,Subsampling Setting" "YCbCr 4:2:2,YCbCr 4:2:0" else group.long 0x70++0x03 line.long 0x00 "JIFECNT,JPEG Interface Encoding Control Register" bitfld.long 0x00 6. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" textline " " bitfld.long 0x00 2.--3. " ROT ,Rotated Read Mode" "0,90,180,270" bitfld.long 0x00 1. " BUF ,Buffer Mode" "Frame buffer,Line buffer" bitfld.long 0x00 0. " INFT ,Subsampling Setting" "YCbCr 4:2:2,YCbCr 4:2:0" endif group.long 0x74++0x27 line.long 0x00 "JIFESYA1,JPEG Interface Encode Source Y Address Register 1" hexmask.long 0x00 3.--31. 0x08 " ESCA1 ,Y component source address" line.long 0x04 "JIFESCA1,JPEG Interface Encode Source C Address Register 1" hexmask.long 0x04 3.--31. 0x08 " ESCA1 ,C component source address" line.long 0x08 "JIFESYA2,JPEG Interface Encode Source Y Address Register 2" hexmask.long 0x08 3.--31. 0x08 " ESCA2 ,Y component source address" line.long 0x0C "JIFESCA2,JPEG Interface Encode Source C Address Register 2" hexmask.long 0x0C 3.--31. 0x08 " ESCA2 ,C component source address" line.long 0x10 "JIFESMW,JPEG Interface Encode Source Memory Width Register" hexmask.long.word 0x10 0.--11. 1. " ESMW ,Buffer memory width in which image data is stored" line.long 0x14 "JIFESVSZ,JPEG Interface Encode Source Vertical Size Register" hexmask.long.word 0x14 0.--11. 1. " ESVSZ ,Vertical size of the image transferred from the external buffer" line.long 0x18 "JIFESHSZ,JPEG Interface Encode Source Horizontal Size Register" hexmask.long.word 0x18 0.--11. 1. " ESHSZ ,Horizontal size of the image transferred from the external buffer" line.long 0x1C "JIFEDA1,JPEG Interface Encode Destination Address Register 1" hexmask.long 0x1C 3.--31. 0x08 " EDA1 ,Coded Data Destination Address" line.long 0x20 "JIFEDA2,JPEG Interface Encode Destination Address Register 2" hexmask.long 0x20 3.--31. 0x08 " EDA2 ,Coded Data Destination Address" line.long 0x24 "JIFEDRSZ,JPEG Interface Encode Data Reload Size Register" hexmask.long.tbyte 0x24 8.--25. 1. " EDRSZ ,Coded data destination address" if (((per.l(ad:0xFE980000+0x70))&0x02)==0x02) group.long 0xa0++0x03 line.long 0x00 "JIFDCNT,JPEG Interface Decoding Control Register" hexmask.long.word 0x00 16.--27. 1. " PU ,Processing Unit" bitfld.long 0x00 3. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" bitfld.long 0x00 0. " BMS ,Buffer Mode" "Frame buffer,Line buffer" else group.long 0xa0++0x03 line.long 0x00 "JIFDCNT,JPEG Interface Decoding Control Register" bitfld.long 0x00 3. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" bitfld.long 0x00 0. " BMS ,Buffer Mode" "Frame buffer,Line buffer" endif group.long 0xA4++0x0F line.long 0x00 "JIFDSA1,JPEG Interface Decode Source Address Register 1" hexmask.long 0x00 3.--31. 0x8 " DSA1 ,Coded data source address" line.long 0x04 "JIFDSA2,JPEG Interface Decode Source Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DSA2 ,Coded data source address" line.long 0x08 "JIFDDRSZ,JPEG Interface Decode Data Reload Size Register" hexmask.long.tbyte 0x08 8.--25. 1. " DDRSZ ,Number of data to be transferred before the address is changed" line.long 0x0C "JIFDDMW,JPEG Interface Decode Destination Memory Width Register" hexmask.long 0x0C 3.--31. 1. " DDMW ,Memory width of image data stored in external buffer" rgroup.long 0xb4++0x7 line.long 0x00 "JIFDDVSZ,JPEG Interface Decode Destination Vertical Size Register" hexmask.long.word 0x00 0.--15. 1. " DDVSZ ,Vertical size of image written to external buffer" line.long 0x04 "JIFDDHSZ,JPEG Interface Decode Destination Horizontal Size Register" hexmask.long.word 0x04 0.--15. 1. " DDHSZ ,Horizontal size of image written to external buffer" group.long 0xbc++0xf line.long 0x00 "JIFDDYA1,JPEG Interface Decode Destination Y Address Register 1" hexmask.long 0x00 3.--31. 0x8 " DDYA1 ,Y component destination address" line.long 0x04 "JIFDDCA1,JPEG Interface Decode Destination C Address Register 1" hexmask.long 0x04 3.--31. 0x8 " DDCA1 ,C component destination address" line.long 0x08 "JIFDDYA2,JPEG Interface Decode Destination Y Address Register 2" hexmask.long 0x08 3.--31. 0x8 " DDYA2 ,Y component destination address" line.long 0x0c "JIFDDCA2,JPEG Interface Decode Destination C Address Register 2" hexmask.long 0x0c 3.--31. 0x8 " DDCA2 ,C component destination address" group.long 0x10000++0x03 line.long 0x00 "JCQTBL0,JPEG code quantization table 0 register" button "JCQTBL0 Table" "d ad:0xFE980000--(ad:0xFE980000+0x3C) /LONG" group.long 0x10040++0x03 line.long 0x00 "JCQTBL1,JPEG code quantization table 1 register" button "JCQTBL1 Table" "d (ad:0xFE980000+0x40)--(ad:0xFE980000+0x7C) /LONG" group.long 0x10080++0x03 line.long 0x00 "JCQTBL2,JPEG code quantization table 2 register" button "JCQTBL2 Table" "d (ad:0xFE980000+0x80)--(ad:0xFE980000+0xBC) /LONG" group.long 0x100c0++0x03 line.long 0x00 "JCQTBL3,JPEG code quantization table 3 register" button "JCQTBL3 Table" "d (ad:0xFE980000+0xC0)--(ad:0xFE980000+0xFC) /LONG" group.long 0x10100++0x03 line.long 0x00 "JCHTBD0,JPEG code Huffman table DC0 register" button "JCHTBD0 Table" "d (ad:0xFE980000+0x100)--(ad:0xFE980000+0x10C) /LONG" group.long 0x10110++0x03 line.long 0x00 "JCHTBD0,JPEG code Huffman table DC0 register" button "JCHTBD0 Table" "d (ad:0xFE980000+0x110)--(ad:0xFE980000+0x11C) /LONG" group.long 0x10200++0x03 line.long 0x00 "JCHTBD1,JPEG code Huffman table DC1 register" button "JCHTBD1 Table" "d (ad:0xFE980000+0x200)--(ad:0xFE980000+0x20C) /LONG" group.long 0x10210++0x03 line.long 0x00 "JCHTBD1,JPEG code Huffman table DC1 register" button "JCHTBD1 Table" "d (ad:0xFE980000+0x210)--(ad:0xFE980000+0x21C) /LONG" group.long 0x10220++0x03 line.long 0x00 "JCHTBA1,JPEG code Huffman table DC1 register" button "JCHTBA1 Table" "d (ad:0xFE980000+0x220)--(ad:0xFE980000+0x22C) /LONG" group.long 0x10230++0x03 line.long 0x00 "JCHTBA1,JPEG code Huffman table DC1 register" button "JCHTBA1 Table" "d (ad:0xFE980000+0x230)--(ad:0xFE980000+0x2D0) /LONG" width 0x0b tree.end tree.open "SSIU (Serial Sound Interface Unit)" tree "SSIU BUSIF 3" base ad:0xEC540180 width 24. group.long 0x00++0x0B line.long 0x00 "SSI3_BUSIF_MODE,SSI3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI3_BUSIF_ADINR,SSI3 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI3_BUSIF_DALIGN,SSI3 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI3_CONTROL,SSI3 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR3_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR3_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR3_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR3_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR3_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR3_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI3_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI3_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI3_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI3_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC103000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC403000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 4" base ad:0xEC540200 width 24. group.long 0x00++0x0B line.long 0x00 "SSI4_BUSIF_MODE,SSI4 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI4_BUSIF_ADINR,SSI4 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI4_BUSIF_DALIGN,SSI4 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI4_CONTROL,SSI4 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR4_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR4_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR4_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR4_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR4_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR4_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI4_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI4_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI4_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI4_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC104000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC)" base ad:0xEC404000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU" base ad:0xEC540800 width 13. sif !cpuis("R8A7792X") group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 25. " IND_WORD_SWAP9 ,Word order swap 9" "Not swapped,Swapped" bitfld.long 0x00 24. " IND_WORD_SWAP8 ,Word order swap 8" "Not swapped,Swapped" bitfld.long 0x00 23. " IND_WORD_SWAP7 ,Word order swap 7" "Not swapped,Swapped" textline " " bitfld.long 0x00 22. " IND_WORD_SWAP6 ,Word order swap 6" "Not swapped,Swapped" bitfld.long 0x00 21. " IND_WORD_SWAP5 ,Word order swap 5" "Not swapped,Swapped" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" textline " " bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" bitfld.long 0x00 18. " IND_WORD_SWAP2 ,Word order swap 2" "Not swapped,Swapped" bitfld.long 0x00 17. " IND_WORD_SWAP1 ,Word order swap 1" "Not swapped,Swapped" textline " " bitfld.long 0x00 16. " IND_WORD_SWAP0 ,Word order swap 0" "Not swapped,Swapped" bitfld.long 0x00 9. " IND9 ,Independent SSI transfer status 9" "Not performed,Performed" bitfld.long 0x00 8. " IND8 ,Independent SSI transfer status 8" "Not performed,Performed" textline " " bitfld.long 0x00 7. " IND7 ,Independent SSI transfer status 7" "Not performed,Performed" bitfld.long 0x00 6. " IND6 ,Independent SSI transfer status 6" "Not performed,Performed" bitfld.long 0x00 5. " IND5 ,Independent SSI transfer status 5" "Not performed,Performed" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" bitfld.long 0x00 2. " IND2 ,Independent SSI transfer status 2" "Not performed,Performed" textline " " bitfld.long 0x00 1. " IND1 ,Independent SSI transfer status 1" "Not performed,Performed" bitfld.long 0x00 0. " IND0 ,Independent SSI transfer status 0" "Not performed,Performed" else group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" endif group.long 0x04++0x03 line.long 0x00 "SSI_MODE1,SSI Mode Register 1" bitfld.long 0x00 20. " SSI34_SYNC ,SSI3 and SSI4 synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 16.--17. " SSI4_PIN ,SSI4 pin mode" "Own pins,Slaves,Master/Slave,?..." sif !cpuis("R8A7792X") bitfld.long 0x00 4. " SSI012_3MOD ,Use SSI0/SSI1/SSI2 together as six channels" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " SSI2_PIN ,SS2 pin mode" "Own pins,Slaves,Master/Slave,?..." bitfld.long 0x00 0.--1. " SSI1_PIN ,SS1 pin mode" "Own pins,Slaves,Master/Slave,?..." endif sif !cpuis("R8A7792X") group.long 0x08++0x07 line.long 0x00 "SSI_MODE2,SSI Mode Register 2" bitfld.long 0x00 4. " SSI0129_4MOD ,Use SSI0/SSI1/SSI2/SSI9 together as eight channels" "Disabled,Enabled" bitfld.long 0x00 0.--2. " SSI9_PIN ,SSI9 pin mode" "Own pins,Slaves,Master/Slave,,,Slaves,Master/Slave,?..." line.long 0x04 "SSI_MODE3,SSI Mode Register 3" bitfld.long 0x04 0.--1. " SSI3_PIN ,SSI3 pin mode" "Own pins,Slaves,Master/Slave,?..." endif group.long 0x10++0x03 line.long 0x00 "SSI_CONTROL,SSI Control Register" bitfld.long 0x00 4. " SSI34 ,SSI34 enable" "Disabled,Enabled" sif !cpuis("R8A7792X") bitfld.long 0x00 0. " SSI0129 ,SSI0129 enable" "Disabled,Enabled" endif textline " " width 24. sif !cpuis("R8A7792X") group.long 0x40++0x1F line.long 0x00 "SSI_SYSTEM_STATUS0,SSI SYSTEM Status Register 0" eventfld.long 0x00 11. " OF2-3 ,Buffer overflow 2-3" "Not occurred,Occurred" eventfld.long 0x00 10. " OF2-2 ,Buffer overflow 2-2" "Not occurred,Occurred" eventfld.long 0x00 9. " OF2-1 ,Buffer overflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " OF2-0 ,Buffer overflow 2-0" "Not occurred,Occurred" eventfld.long 0x00 7. " OF1-3 ,Buffer overflow 1-3" "Not occurred,Occurred" eventfld.long 0x00 6. " OF1-2 ,Buffer overflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " OF1-1 ,Buffer overflow 1-1" "Not occurred,Occurred" eventfld.long 0x00 4. " OF1-0 ,Buffer overflow 1-0" "Not occurred,Occurred" eventfld.long 0x00 3. " OF0-3 ,Buffer overflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " OF0-2 ,Buffer overflow 0-2" "Not occurred,Occurred" eventfld.long 0x00 1. " OF0-1 ,Buffer overflow 0-1" "Not occurred,Occurred" eventfld.long 0x00 0. " OF0-0 ,Buffer overflow 0-0" "Not occurred,Occurred" line.long 0x04 "SSI_SYSTEM_STATUS1,SSI SYSTEM Status Register 1" eventfld.long 0x04 7. " OF9-3 ,Buffer overflow 9-3" "Not occurred,Occurred" eventfld.long 0x04 6. " OF9-2 ,Buffer overflow 9-2" "Not occurred,Occurred" eventfld.long 0x04 5. " OF9-1 ,Buffer overflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x04 4. " OF9-0 ,Buffer overflow 9-0" "Not occurred,Occurred" line.long 0x08 "SSI_SYSTEM_STATUS2,SSI SYSTEM Status Register 2" eventfld.long 0x08 11. " UF2-3 ,Buffer underflow 2-3" "Not occurred,Occurred" eventfld.long 0x08 10. " UF2-2 ,Buffer underflow 2-2" "Not occurred,Occurred" eventfld.long 0x08 9. " UF2-1 ,Buffer underflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x08 8. " UF2-0 ,Buffer underflow 2-0" "Not occurred,Occurred" eventfld.long 0x08 7. " UF1-3 ,Buffer underflow 1-3" "Not occurred,Occurred" eventfld.long 0x08 6. " UF1-2 ,Buffer underflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x08 5. " UF1-1 ,Buffer underflow 1-1" "Not occurred,Occurred" eventfld.long 0x08 4. " UF1-0 ,Buffer underflow 1-0" "Not occurred,Occurred" eventfld.long 0x08 3. " UF0-3 ,Buffer underflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x08 2. " UF0-2 ,Buffer underflow 0-2" "Not occurred,Occurred" eventfld.long 0x08 1. " UF0-1 ,Buffer underflow 0-1" "Not occurred,Occurred" eventfld.long 0x08 0. " UF0-0 ,Buffer underflow 0-0" "Not occurred,Occurred" line.long 0x0C "SSI_SYSTEM_STATUS3,SSI SYSTEM Status Register 3" eventfld.long 0x0C 7. " UF9-3 ,Buffer underflow 9-3" "Not occurred,Occurred" eventfld.long 0x0C 6. " UF9-2 ,Buffer underflow 9-2" "Not occurred,Occurred" eventfld.long 0x0C 5. " UF9-1 ,Buffer underflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x0C 4. " UF9-0 ,Buffer underflow 9-0" "Not occurred,Occurred" textline " " line.long 0x10 "SSI_SYSTEM_INT_ENABLE0,SSI SYSTEM Interrupt Enable Register 0" bitfld.long 0x10 11. " OF2-3_IE ,Buffer overflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 10. " OF2-2_IE ,Buffer overflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 9. " OF2-1_IE ,Buffer overflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " OF2-0_IE ,Buffer overflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 7. " OF1-3_IE ,Buffer overflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " OF1-2_IE ,Buffer overflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " OF1-1_IE ,Buffer overflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 4. " OF1-0_IE ,Buffer overflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 3. " OF0-3_IE ,Buffer overflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " OF0-2_IE ,Buffer overflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 1. " OF0-1_IE ,Buffer overflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 0. " OF0-0_IE ,Buffer overflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x14 "SSI_SYSTEM_INT_ENABLE1,SSI SYSTEM Interrupt Enable Register 1" bitfld.long 0x14 7. " OF9-3 ,Buffer overflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " OF9-2 ,Buffer overflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " OF9-1 ,Buffer overflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " OF9-0 ,Buffer overflow 9-0 interrupt enable" "Disabled,Enabled" line.long 0x18 "SSI_SYSTEM_INT_ENABLE2,SSI SYSTEM Interrupt Enable Register 2" bitfld.long 0x18 11. " UF2-3_IE ,Buffer underflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 10. " UF2-2_IE ,Buffer underflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 9. " UF2-1_IE ,Buffer underflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " UF2-0_IE ,Buffer underflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 7. " UF1-3_IE ,Buffer underflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " UF1-2_IE ,Buffer underflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UF1-1_IE ,Buffer underflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 4. " UF1-0_IE ,Buffer underflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 3. " UF0-3_IE ,Buffer underflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " UF0-2_IE ,Buffer underflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 1. " UF0-1_IE ,Buffer underflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 0. " UF0-0_IE ,Buffer underflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x1C "SSI_SYSTEM_INT_ENABLE3,SSI SYSTEM Interrupt Enable Register 3" bitfld.long 0x1C 7. " UF9-3_IE ,Buffer underflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " UF9-2_IE ,Buffer underflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " UF9-1_IE ,Buffer underflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " UF9-0_IE ,Buffer underflow 9-0 interrupt enable" "Disabled,Enabled" endif width 0x0B tree.end tree.end tree.open "SSI (Serial Sound Interface)" tree "Channel 3" base ad:0xEC5410C0 width 15. if (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC5410C0))&0x02)==0x00)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC5410C0))&0x02)==0x02)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC5410C0))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR3,Transmit Data Register 3" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR3,Receive Data Register 3" if (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC5410C0))&0xc000)==0xc000)||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC5410C0+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR3,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR3,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE3,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 4" base ad:0xEC541100 width 15. if (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541100))&0x02)==0x00)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541100))&0x02)==0x02)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541100))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR4,Transmit Data Register 4" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR4,Receive Data Register 4" if (((per.l(ad:0xEC541100+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541100))&0xc000)==0xc000)||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541100+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR4,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR4,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE4,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree.end tree "ADG (Audio Clock Generator)" base ad:0xEC5A0000 width 16. group.long 0x00++0x13 line.long 0x00 "BRRA,BRGA Baud Rate Set Register" bitfld.long 0x00 8.--9. " CKS ,Clock Source Select for Baud Rate Generator A" "ACLK_A,ACLK_A/4,ACLK_A/16,ACLK_A/64" hexmask.long.byte 0x00 0.--7. 1. " BRRA ,Dividing Factor Set" line.long 0x04 "BRRB,BRGB Baud Rate Set Register" bitfld.long 0x04 8.--9. " CKS ,Clock Source Select for Baud Rate Generator B" "ACLK_B,ACLK_B/4,ACLK_B/16,ACLK_B/64" hexmask.long.byte 0x04 0.--7. 1. " BRRB ,Dividing Factor Set" line.long 0x08 "SSICKR,Clock Select Register" bitfld.long 0x08 31. " SSICKR_31 ,Selects the clock output to the external pin AUDIO_CLKOUT" "BRGA output,BRGB output" bitfld.long 0x08 20.--22. " SSICKR_[22:20] ,Selects the clock input to the BRGA" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,Fixed at 0,Fixed at 0,Fixed at 0,Fixed at 0" bitfld.long 0x08 16.--18. " SSICKR_[18:16] ,Selects the clock input to the BRGB" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,Fixed at 0,Fixed at 0,Fixed at 0,Fixed at 0" line.long 0x0c "AUDIO_CLK_SEL0,Audio Clock Select Register 0" bitfld.long 0x0c 30.--31. 27. " DIVSEL_SSI3 ,SSI3 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 28.--29. " ACLK_SEL_SSI3 ,SSI3 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 24.--26. " DIVCLK_SEL_SSI3 ,SSI3 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." line.long 0x10 "AUDIO_CLK_SEL1,Audio Clock Select Register 1" bitfld.long 0x10 6.--7. 3. " DIVSEL_SSI4 ,SSI4 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 4.--5. " ACLK_SEL_SSI4 ,SSI4 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 0.--2. " DIVCLK_SEL_SSI4 ,SSI4 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." width 0xb tree.end tree.open "Audio-DMAC (Audio-Direct Memory Access Controller)" tree "Low channels" base ad:0xEC700000 width 15. rgroup.long 0x20++0x03 line.long 0x00 "DMAISTA_L,DMA Interrupt Status Register for Lower-Numbered Channels" bitfld.long 0x00 1. " I1 ,Interrupt State in Channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Interrupt State in Channel 0" "No interrupt,Interrupt" group.long 0x30++0x03 line.long 0x00 "DMASEC_L,DMA Secure Control Register for Lower-Numbered Channels" bitfld.long 0x00 1. " S1 ,Secure Mode Setting for Channel 0" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Secure Mode Setting for Channel 0" "Non-secure,Secure" group.word 0x60++0x01 line.word 0x00 "DMAOR_L,DMA Operation Register for Lower-Numbered Channel" bitfld.word 0x00 8.--9. " PR ,Priority Mode" "Fixed,,,Round-robin" bitfld.word 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x03 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register for Lower-Numbered Channels" bitfld.long 0x00 1. " CLR[1] ,Channel 1 registers clear" "No effect,Clear" bitfld.long 0x00 0. " CLR[0] ,Channel 0 registers clear" "No effect,Clear" group.long 0xA0++0x03 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Lower-Numbered Channels" bitfld.long 0x0 31. " SEC ,Security Attribute Setting for Descriptor Memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Security Attribute Setting for Base Address of Descriptor Memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Security Attribute Setting for Base Address Mask of Descriptor Memory" textline " " group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for $2 Channels" button "DESCRIPTORMEM" "d (ad:0xEC700000+0xA000)--(ad:0xEC700000+0xA7FC) /long" width 0xb tree.end tree "Channel 0" base ad:0xEC708000 width 15. group.long 0x00++0x07 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Registers 0" group.long 0x08++0x03 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Number of Rounds of DMA Transfer" group.long 0x18++0x3 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Number of rounds of DMA transfer" group.long 0x28++0x03 line.long 0x00 "DMATSR_0, DMA Transfer Size Register 0" group.long 0x38++0x03 line.long 0x00 "DMATSRB_0, DMA Transfer Size Register B 0" group.long 0x0C++0x03 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Channel Address Error Flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel Address Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Operating Mode of Descriptor Memory" "Disabled,Normal mode,Repeat mode,Read-out/Infinite repeat mode" textline " " bitfld.long 0x00 27. " RPT[2] ,Enables or disables updating of the source address register" "Disabled,Enabled" bitfld.long 0x00 26. " RPT[1] ,Enables or disables updating of the destination address register" "Disabled,Enabled" bitfld.long 0x00 25. " RPT[0] ,Enables or disables updating of the transfer count register" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor Start" "Started with values,Started after first read out" bitfld.long 0x00 3.--4. 20.--21. " TS[3:0] ,DMA Transfer Size" "byte,2-byte,4-byte,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor Stage End" "Running/Aborted,Completed" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor Stage End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource Selection" ",,,,Auto request,,,Selected by DMA selector,?..." bitfld.long 0x00 2. " IE ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TE ,Transfer End Flag" "Running/Aborted,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Completed" group.long 0x1C++0x03 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of Stages of Descriptor Memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor Pointer" bitfld.long 0x00 15. " DRST ,Descriptor Reset" "No effect,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total Size Transmission Under Descriptor Control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Low-Speed Mode" "Normal Mode,,,,,,,,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0x48++0x03 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Registers 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum Burst Unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper Limit on Buffer Size" group.long 0x40++0x03 line.long 0x00 "DMARS_0,DMA Extended Resource Selector 0" hexmask.long.byte 0x00 2.--7. 1. " MID ,DMA Request Source Adoption ID5 to ID0 (MID)" bitfld.long 0x00 0.--1. " RID ,DMA Request Source Adoption ID1 and ID0 (RID)" "0,1,2,3" group.long 0x50++0x03 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Registers 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base Address of Descriptor Memory" bitfld.long 0x00 0. " SEL ,Descriptor Memory Selection" "Built-in,External" group.long 0x54++0x03 line.long 0x00 "DMADPCR_0,DMA Descriptor Control Registers 0" hexmask.long.byte 0x00 24.--31. 1. " DIPT ,Descriptor Read-out Interrupt Pointer" group.long 0x10++0x03 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Most Significant 8 Bits of the 40-bit Source Address" group.long 0x14++0x03 line.long 0x00 "DMAFIXDAR_0,DMA Fixed Destination Address Registers 0" hexmask.long.byte 0x00 0.--7. 1. " DAR ,Most significant 8 Bits of the 40-bit Destination Address" group.long 0x60++0x03 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Registers 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,Most Significant 8 Bits of the 40-bit Descriptor Base Address" textline " " group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for $2 Channels" button "DESCRIPTORMEM" "d (ad:0xEC708000+0xA000)--(ad:0xEC708000+0xA7FC) /long" width 0xb tree.end tree "Channel 1" base ad:0xEC708080 width 15. group.long 0x00++0x07 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Registers 1" group.long 0x08++0x03 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Number of Rounds of DMA Transfer" group.long 0x18++0x3 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Number of rounds of DMA transfer" group.long 0x28++0x03 line.long 0x00 "DMATSR_1, DMA Transfer Size Register 1" group.long 0x38++0x03 line.long 0x00 "DMATSRB_1, DMA Transfer Size Register B 1" group.long 0x0C++0x03 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Channel Address Error Flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel Address Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Operating Mode of Descriptor Memory" "Disabled,Normal mode,Repeat mode,Read-out/Infinite repeat mode" textline " " bitfld.long 0x00 27. " RPT[2] ,Enables or disables updating of the source address register" "Disabled,Enabled" bitfld.long 0x00 26. " RPT[1] ,Enables or disables updating of the destination address register" "Disabled,Enabled" bitfld.long 0x00 25. " RPT[0] ,Enables or disables updating of the transfer count register" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor Start" "Started with values,Started after first read out" bitfld.long 0x00 3.--4. 20.--21. " TS[3:0] ,DMA Transfer Size" "byte,2-byte,4-byte,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor Stage End" "Running/Aborted,Completed" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor Stage End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource Selection" ",,,,Auto request,,,Selected by DMA selector,?..." bitfld.long 0x00 2. " IE ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TE ,Transfer End Flag" "Running/Aborted,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Completed" group.long 0x1C++0x03 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of Stages of Descriptor Memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor Pointer" bitfld.long 0x00 15. " DRST ,Descriptor Reset" "No effect,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total Size Transmission Under Descriptor Control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Low-Speed Mode" "Normal Mode,,,,,,,,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.long 0x48++0x03 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Registers 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum Burst Unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper Limit on Buffer Size" group.long 0x40++0x03 line.long 0x00 "DMARS_1,DMA Extended Resource Selector 1" hexmask.long.byte 0x00 2.--7. 1. " MID ,DMA Request Source Adoption ID5 to ID0 (MID)" bitfld.long 0x00 0.--1. " RID ,DMA Request Source Adoption ID1 and ID0 (RID)" "0,1,2,3" group.long 0x50++0x03 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Registers 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base Address of Descriptor Memory" bitfld.long 0x00 0. " SEL ,Descriptor Memory Selection" "Built-in,External" group.long 0x54++0x03 line.long 0x00 "DMADPCR_1,DMA Descriptor Control Registers 1" hexmask.long.byte 0x00 24.--31. 1. " DIPT ,Descriptor Read-out Interrupt Pointer" group.long 0x10++0x03 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Most Significant 8 Bits of the 40-bit Source Address" group.long 0x14++0x03 line.long 0x00 "DMAFIXDAR_1,DMA Fixed Destination Address Registers 1" hexmask.long.byte 0x00 0.--7. 1. " DAR ,Most significant 8 Bits of the 40-bit Destination Address" group.long 0x60++0x03 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Registers 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,Most Significant 8 Bits of the 40-bit Descriptor Base Address" textline " " group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for $2 Channels" button "DESCRIPTORMEM" "d (ad:0xEC708080+0xA000)--(ad:0xEC708080+0xA7FC) /long" width 0xb tree.end tree.end tree.open "EthernetAVB" base ad:0xE6800000 tree "AVB DMAC" width 9. if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x000++0x03 line.long 0x00 "CCC,AVB-DMAC Mode Register" bitfld.long 0x00 24. " LBME ,Loopback mode enable" "Enabled,Disabled" bitfld.long 0x00 16.--17. " CSEL[1:0] ,gPTP clock select" ",High speed per. clk,Ethernet TX clk,GMII ref. clk" bitfld.long 0x00 8. " DSTR ,Data transmission suspend request" "Normal operation,Request suspension" bitfld.long 0x00 0.--1. " OPC[1:0] ,Operation mode configuration" "Reset mode,Configuration mode,Operation mode,?..." group.long 0x004++0x03 line.long 0x00 "DBAT,Descriptor Base Address Table Register" hexmask.long 0x00 2.--31. 0x04 " TA ,Descriptor Base Table Address" else group.long 0x000++0x03 line.long 0x00 "CCC,AVB-DMAC Mode Register" rbitfld.long 0x00 24. " LBME ,Loopback mode enable" "Enabled,Disabled" rbitfld.long 0x00 16.--17. " CSEL[1:0] ,gPTP clock select" ",High speed per. clk,Ethernet TX clk,GMII ref. clk" bitfld.long 0x00 8. " DSTR ,Data transmission suspend request" "Normal operation,Request suspension" bitfld.long 0x00 0.--1. " OPC[1:0] ,Operation mode configuration" "Reset mode,Configuration mode,Operation mode,?..." rgroup.long 0x004++0x03 line.long 0x00 "DBAT,Descriptor Base Address Table Register" hexmask.long 0x00 2.--31. 0x04 " TA ,Descriptor Base Table Address" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x4) group.long 0x000++0x03 line.long 0x00 "DLR,Descriptor Base Address Load Request Register" bitfld.long 0x00 21. " LBA_21 ,Base address load request (Rx17: Stream 15)" "No effect,Load" bitfld.long 0x00 20. " LBA_20 ,Base address load request (Rx16: Stream 14)" "No effect,Load" bitfld.long 0x00 19. " LBA_19 ,Base address load request (Rx15: Stream 13)" "No effect,Load" bitfld.long 0x00 18. " LBA_18 ,Base address load request (Rx14: Stream 12)" "No effect,Load" bitfld.long 0x00 17. " LBA_17 ,Base address load request (Rx13: Stream 11)" "No effect,Load" bitfld.long 0x00 16. " LBA_16 ,Base address load request (Rx12: Stream 10)" "No effect,Load" textline " " bitfld.long 0x00 15. " LBA_15 ,Base address load request (Rx11: Stream 9)" "No effect,Load" bitfld.long 0x00 14. " LBA_14 ,Base address load request (Rx10: Stream 8)" "No effect,Load" bitfld.long 0x00 13. " LBA_13 ,Base address load request (Rx9: Stream 7)" "No effect,Load" bitfld.long 0x00 12. " LBA_12 ,Base address load request (Rx8: Stream 6)" "No effect,Load" bitfld.long 0x00 11. " LBA_11 ,Base address load request (Rx7: Stream 5)" "No effect,Load" bitfld.long 0x00 10. " LBA_10 ,Base address load request (Rx6: Stream 4)" "No effect,Load" textline " " bitfld.long 0x00 9. " LBA_9 ,Base address load request (Rx5: Stream 3)" "No effect,Load" bitfld.long 0x00 8. " LBA_8 ,Base address load request (Rx4: Stream 2)" "No effect,Load" bitfld.long 0x00 7. " LBA_7 ,Base address load request (Rx3: Stream 1)" "No effect,Load" bitfld.long 0x00 6. " LBA_6 ,Base address load request (Rx2: Stream 0)" "No effect,Load" bitfld.long 0x00 5. " LBA_5 ,Base address load request (Rx1: Network Control)" "No effect,Load" bitfld.long 0x00 4. " LBA_4 ,Base address load request (Rx0: Best Effort)" "No effect,Load" textline " " bitfld.long 0x00 3. " LBA_3 ,Base address load request (Tx3: Stream Class A)" "No effect,Load" bitfld.long 0x00 2. " LBA_2 ,Base address load request (TX2: Stream Class B)" "No effect,Load" bitfld.long 0x00 1. " LBA_1 ,Base address load request (Tx1: SNetwork Control)" "No effect,Load" bitfld.long 0x00 0. " LBA_0 ,Base address load request (Tx0: Best Effort)" "No effect,Load" else rgroup.long 0x000++0x03 line.long 0x00 "DLR,Descriptor Base Address Load Request Register" bitfld.long 0x00 21. " LBA_21 ,Base address load request (Rx17: Stream 15)" "No effect,Load" bitfld.long 0x00 20. " LBA_20 ,Base address load request (Rx16: Stream 14)" "No effect,Load" bitfld.long 0x00 19. " LBA_19 ,Base address load request (Rx15: Stream 13)" "No effect,Load" bitfld.long 0x00 18. " LBA_18 ,Base address load request (Rx14: Stream 12)" "No effect,Load" bitfld.long 0x00 17. " LBA_17 ,Base address load request (Rx13: Stream 11)" "No effect,Load" bitfld.long 0x00 16. " LBA_16 ,Base address load request (Rx12: Stream 10)" "No effect,Load" textline " " bitfld.long 0x00 15. " LBA_15 ,Base address load request (Rx11: Stream 9)" "No effect,Load" bitfld.long 0x00 14. " LBA_14 ,Base address load request (Rx10: Stream 8)" "No effect,Load" bitfld.long 0x00 13. " LBA_13 ,Base address load request (Rx9: Stream 7)" "No effect,Load" bitfld.long 0x00 12. " LBA_12 ,Base address load request (Rx8: Stream 6)" "No effect,Load" bitfld.long 0x00 11. " LBA_11 ,Base address load request (Rx7: Stream 5)" "No effect,Load" bitfld.long 0x00 10. " LBA_10 ,Base address load request (Rx6: Stream 4)" "No effect,Load" textline " " bitfld.long 0x00 9. " LBA_9 ,Base address load request (Rx5: Stream 3)" "No effect,Load" bitfld.long 0x00 8. " LBA_8 ,Base address load request (Rx4: Stream 2)" "No effect,Load" bitfld.long 0x00 7. " LBA_7 ,Base address load request (Rx3: Stream 1)" "No effect,Load" bitfld.long 0x00 6. " LBA_6 ,Base address load request (Rx2: Stream 0)" "No effect,Load" bitfld.long 0x00 5. " LBA_5 ,Base address load request (Rx1: Network Control)" "No effect,Load" bitfld.long 0x00 4. " LBA_4 ,Base address load request (Rx0: Best Effort)" "No effect,Load" textline " " bitfld.long 0x00 3. " LBA_3 ,Base address load request (Tx3: Stream Class A)" "No effect,Load" bitfld.long 0x00 2. " LBA_2 ,Base address load request (TX2: Stream Class B)" "No effect,Load" bitfld.long 0x00 1. " LBA_1 ,Base address load request (Tx1: SNetwork Control)" "No effect,Load" bitfld.long 0x00 0. " LBA_0 ,Base address load request (Tx0: Best Effort)" "No effect,Load" endif textline " " rgroup.long 0x008++0x03 line.long 0x00 "CSR,AVB-DMAC Status Register" bitfld.long 0x00 20. " RPO ,Receive process status" "Normal operation,Reception" bitfld.long 0x00 19. " TPO_3 ,Transmit process status 3 (Stream Class A)" "Normal operation,Transmission" bitfld.long 0x00 18. " TPO_2 ,Transmit process status 2 (Stream Class B)" "Normal operation,Transmission" bitfld.long 0x00 17. " TPO_1 ,Transmit process status 1 (Network control)" "Normal operation,Transmission" textline " " bitfld.long 0x00 16. " TPO_0 ,Transmit process status 0 (Best Effort)" "Normal operation,Transmission" bitfld.long 0x00 8. " DTS ,Data transmission suspended status" "Normal operation,Suspended" bitfld.long 0x00 0.--3. " OPS[3:0] ,Operating mode status" ",Reset mode,Configuration mode,,Operation mode,?..." rgroup.long 0x10++0x03 line.long 0x00 "CDAR_0,Current Descriptor Address Register 0" rgroup.long 0x14++0x03 line.long 0x00 "CDAR_1,Current Descriptor Address Register 1" rgroup.long 0x18++0x03 line.long 0x00 "CDAR_2,Current Descriptor Address Register 2" rgroup.long 0x1C++0x03 line.long 0x00 "CDAR_3,Current Descriptor Address Register 3" rgroup.long 0x20++0x03 line.long 0x00 "CDAR_4,Current Descriptor Address Register 4" rgroup.long 0x24++0x03 line.long 0x00 "CDAR_5,Current Descriptor Address Register 5" rgroup.long 0x28++0x03 line.long 0x00 "CDAR_6,Current Descriptor Address Register 6" rgroup.long 0x2C++0x03 line.long 0x00 "CDAR_7,Current Descriptor Address Register 7" rgroup.long 0x30++0x03 line.long 0x00 "CDAR_8,Current Descriptor Address Register 8" rgroup.long 0x34++0x03 line.long 0x00 "CDAR_9,Current Descriptor Address Register 9" rgroup.long 0x38++0x03 line.long 0x00 "CDAR_10,Current Descriptor Address Register 10" rgroup.long 0x3C++0x03 line.long 0x00 "CDAR_11,Current Descriptor Address Register 11" rgroup.long 0x40++0x03 line.long 0x00 "CDAR_12,Current Descriptor Address Register 12" rgroup.long 0x44++0x03 line.long 0x00 "CDAR_13,Current Descriptor Address Register 13" rgroup.long 0x48++0x03 line.long 0x00 "CDAR_14,Current Descriptor Address Register 14" rgroup.long 0x4C++0x03 line.long 0x00 "CDAR_15,Current Descriptor Address Register 15" rgroup.long 0x50++0x03 line.long 0x00 "CDAR_16,Current Descriptor Address Register 16" rgroup.long 0x54++0x03 line.long 0x00 "CDAR_17,Current Descriptor Address Register 17" rgroup.long 0x58++0x03 line.long 0x00 "CDAR_18,Current Descriptor Address Register 18" rgroup.long 0x5C++0x03 line.long 0x00 "CDAR_19,Current Descriptor Address Register 19" rgroup.long 0x60++0x03 line.long 0x00 "CDAR_20,Current Descriptor Address Register 20" rgroup.long 0x88++0x03 line.long 0x00 "ESR,Error Status Register" bitfld.long 0x00 12. " EIL ,Error information lost" "Not lost,Lost" bitfld.long 0x00 8.--11. " ET[3:0] ,Error type" "Read descriptor from URAM,Write descriptor to URAM,Interpret data descriptor,Tx-buffer is corrupted,Read data from URAM,Write data or timestamp to URAM,Reading from Rx-FIFO,Rx-FIFO is corrupted,Frame size error during RX detected,Frame size error during TX detected,Tx-buffer overflow,?..." textline " " bitfld.long 0x00 0.--4. " EQN[4:0] ,Error Queue Number" "TX queue 0,TX queue 1,TX queue 2,TX queue 3,Rx queue 0,Rx queue 1,Rx queue 2,Rx queue 3,Rx queue 4,Rx queue 5,Rx queue 6,Rx queue 7,Rx queue 8,Rx queue 9,Rx queue 10,Rx queue 11,Rx queue 12,Rx queue 13,Rx queue 14,Rx queue 15,Rx queue 16,Rx queue 17,?..." if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x90++0x03 line.long 0x00 "RCR,Receive Configuration Register" hexmask.long.word 0x00 16.--28. 1. " RFCL[12:0] ,Receive FIFO Caution Level" bitfld.long 0x00 5. " ETS_2 ,Time stamp enable (stream)" "Disabled,Enabled" bitfld.long 0x00 4. " ETS_0 ,Time stamp enable (best effort)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " ESF[1:0] ,Stream filtering select. Settings for reception queues 2 to 17" "Disabled,Filter both. Non-matching to queue 0,AVB separating. Non-matching discarded,AVB separating. Non-matching to queue 0" textline " " bitfld.long 0x00 1. " ENCF ,Network control filtering enable" "Disabled,Enabled" bitfld.long 0x00 0. " EFFS ,Error frame enable" "Disabled,Enabled" else rgroup.long 0x90++0x03 line.long 0x00 "RCR,Receive Configuration Register" hexmask.long.word 0x00 16.--28. 1. " RFCL[12:0] ,Receive FIFO Caution Level" bitfld.long 0x00 5. " ETS_2 ,Time stamp enable (stream)" "Disabled,Enabled" bitfld.long 0x00 4. " ETS_0 ,Time stamp enable (best effort)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " ESF[1:0] ,Stream filtering select. Settings for reception queues 2 to 17" "Disabled,Filter both. Non-matching to queue 0,AVB separating. Non-matching discarded,AVB separating. Non-matching to queue 0" textline " " bitfld.long 0x00 1. " ENCF ,Network control filtering enable" "Disabled,Enabled" bitfld.long 0x00 0. " EFFS ,Error frame enable" "Disabled,Enabled" endif textline "" if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x94++0x03 line.long 0x00 "RQC_0,Receive Queue Configuration Register 0" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 3)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 3)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 2)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 2)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 1)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 1)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 0)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 0)" "Write-back,,," else rgroup.long 0x94++0x03 line.long 0x00 "RQC_0,Receive Queue Configuration Register 0" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 3)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 3)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 2)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 2)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 1)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 1)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 0)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 0)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x98++0x03 line.long 0x00 "RQC_1,Receive Queue Configuration Register 1" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 7)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 7)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 6)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 6)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 5)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 5)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 4)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 4)" "Write-back,,," else rgroup.long 0x98++0x03 line.long 0x00 "RQC_1,Receive Queue Configuration Register 1" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 7)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 7)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 6)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 6)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 5)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 5)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 4)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 4)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x9C++0x03 line.long 0x00 "RQC_2,Receive Queue Configuration Register 2" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 11)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 11)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 10)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 10)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 9)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 9)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 8)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 8)" "Write-back,,," else rgroup.long 0x9C++0x03 line.long 0x00 "RQC_2,Receive Queue Configuration Register 2" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 11)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 11)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 10)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 10)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 9)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 9)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 8)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 8)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xA0++0x03 line.long 0x00 "RQC_3,Receive Queue Configuration Register 3" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 15)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 15)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 14)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 14)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 13)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 13)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 12)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 12)" "Write-back,,," else rgroup.long 0xA0++0x03 line.long 0x00 "RQC_3,Receive Queue Configuration Register 3" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 15)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 15)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 14)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 14)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 13)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 13)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 12)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 12)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xA4++0x03 line.long 0x00 "RQC_4,Receive Queue Configuration Register 4" bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 17)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 17)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 16)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 16)" "Write-back,,," else rgroup.long 0xA4++0x03 line.long 0x00 "RQC_4,Receive Queue Configuration Register 4" bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 17)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 17)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 16)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 16)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xB0++0x03 line.long 0x00 "RPC,Receive Padding Configuration Register" hexmask.long.byte 0x00 16.--23. 1. " DCNT[7:0] ,Store data counter" bitfld.long 0x00 8.--10. " PCNT[2:0] ,Stored Padding Counter" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes" textline "" group.long 0xBC++0x07 line.long 0x00 "UFCW,Unread Frame Counter Warning Level Configuration Register" bitfld.long 0x00 24.--29. " WL_3[5:0] ,Warning level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " WL_2[5:0] ,Warning level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " WL_1[5:0] ,Warning level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " WL_0[5:0] ,Warning level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "UFCS,Unread Frame Counter Stop Level Configuration Register" bitfld.long 0x04 24.--29. " SL_3[5:0] ,Stop level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " SL_2[5:0] ,Stop level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " SL_1[5:0] ,Stop level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SL_0[5:0] ,Stop level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0xB0++0x03 line.long 0x00 "RPC,Receive Padding Configuration Register" hexmask.long.byte 0x00 16.--23. 1. " DCNT[7:0] ,Store data counter" bitfld.long 0x00 8.--10. " PCNT[2:0] ,Stored Padding Counter" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes" textline "" group.long 0xBC++0x07 line.long 0x00 "UFCW,Unread Frame Counter Warning Level Configuration Register" bitfld.long 0x00 24.--29. " WL_3[5:0] ,Warning level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " WL_2[5:0] ,Warning level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " WL_1[5:0] ,Warning level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " WL_0[5:0] ,Warning level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "UFCS,Unread Frame Counter Stop Level Configuration Register" bitfld.long 0x04 24.--29. " SL_3[5:0] ,Stop level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " SL_2[5:0] ,Stop level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " SL_1[5:0] ,Stop level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SL_0[5:0] ,Stop level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rgroup.long (0xC4+0x0)++0x03 line.long 0x00 "UFCV_0,Unread Frame Counter Register 0" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x4)++0x03 line.long 0x00 "UFCV_1,Unread Frame Counter Register 1" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x8)++0x03 line.long 0x00 "UFCV_2,Unread Frame Counter Register 2" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0xC)++0x03 line.long 0x00 "UFCV_3,Unread Frame Counter Register 3" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x10)++0x03 line.long 0x00 "UFCV_4,Unread Frame Counter Register 4" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x0)++0x03 line.long 0x00 "UFCD_0,Unread Frame Counter Decrement Register 0" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x4)++0x03 line.long 0x00 "UFCD_1,Unread Frame Counter Decrement Register 1" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x8)++0x03 line.long 0x00 "UFCD_2,Unread Frame Counter Decrement Register 2" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0xC)++0x03 line.long 0x00 "UFCD_3,Unread Frame Counter Decrement Register 3" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x10)++0x03 line.long 0x00 "UFCD_4,Unread Frame Counter Decrement Register 4" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xFC++0x03 line.long 0x00 "SFO,Separation Filter Offset Register" bitfld.long 0x00 0.--5. " FBP[5:0] ,First byte position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0xFC++0x03 line.long 0x00 "SFO,Separation Filter Offset Register" bitfld.long 0x00 0.--5. " FBP[5:0] ,First byte position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x100++0x03 line.long 0x00 "SFP_0,Separation Filter Pattern Register $3" else rgroup.long 0x100++0x03 line.long 0x00 "SFP_0,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x104++0x03 line.long 0x00 "SFP_1,Separation Filter Pattern Register $3" else rgroup.long 0x104++0x03 line.long 0x00 "SFP_1,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x108++0x03 line.long 0x00 "SFP_2,Separation Filter Pattern Register $3" else rgroup.long 0x108++0x03 line.long 0x00 "SFP_2,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x10C++0x03 line.long 0x00 "SFP_3,Separation Filter Pattern Register $3" else rgroup.long 0x10C++0x03 line.long 0x00 "SFP_3,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x110++0x03 line.long 0x00 "SFP_4,Separation Filter Pattern Register $3" else rgroup.long 0x110++0x03 line.long 0x00 "SFP_4,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x114++0x03 line.long 0x00 "SFP_5,Separation Filter Pattern Register $3" else rgroup.long 0x114++0x03 line.long 0x00 "SFP_5,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x118++0x03 line.long 0x00 "SFP_6,Separation Filter Pattern Register $3" else rgroup.long 0x118++0x03 line.long 0x00 "SFP_6,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x11C++0x03 line.long 0x00 "SFP_7,Separation Filter Pattern Register $3" else rgroup.long 0x11C++0x03 line.long 0x00 "SFP_7,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x120++0x03 line.long 0x00 "SFP_8,Separation Filter Pattern Register $3" else rgroup.long 0x120++0x03 line.long 0x00 "SFP_8,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x124++0x03 line.long 0x00 "SFP_9,Separation Filter Pattern Register $3" else rgroup.long 0x124++0x03 line.long 0x00 "SFP_9,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x128++0x03 line.long 0x00 "SFP_10,Separation Filter Pattern Register $3" else rgroup.long 0x128++0x03 line.long 0x00 "SFP_10,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x12C++0x03 line.long 0x00 "SFP_11,Separation Filter Pattern Register $3" else rgroup.long 0x12C++0x03 line.long 0x00 "SFP_11,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x130++0x03 line.long 0x00 "SFP_12,Separation Filter Pattern Register $3" else rgroup.long 0x130++0x03 line.long 0x00 "SFP_12,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x134++0x03 line.long 0x00 "SFP_13,Separation Filter Pattern Register $3" else rgroup.long 0x134++0x03 line.long 0x00 "SFP_13,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x138++0x03 line.long 0x00 "SFP_14,Separation Filter Pattern Register $3" else rgroup.long 0x138++0x03 line.long 0x00 "SFP_14,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x13C++0x03 line.long 0x00 "SFP_15,Separation Filter Pattern Register $3" else rgroup.long 0x13C++0x03 line.long 0x00 "SFP_15,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x140++0x03 line.long 0x00 "SFP_16,Separation Filter Pattern Register $3" else rgroup.long 0x140++0x03 line.long 0x00 "SFP_16,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x144++0x03 line.long 0x00 "SFP_17,Separation Filter Pattern Register $3" else rgroup.long 0x144++0x03 line.long 0x00 "SFP_17,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x148++0x03 line.long 0x00 "SFP_18,Separation Filter Pattern Register $3" else rgroup.long 0x148++0x03 line.long 0x00 "SFP_18,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x14C++0x03 line.long 0x00 "SFP_19,Separation Filter Pattern Register $3" else rgroup.long 0x14C++0x03 line.long 0x00 "SFP_19,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x150++0x03 line.long 0x00 "SFP_20,Separation Filter Pattern Register $3" else rgroup.long 0x150++0x03 line.long 0x00 "SFP_20,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x154++0x03 line.long 0x00 "SFP_21,Separation Filter Pattern Register $3" else rgroup.long 0x154++0x03 line.long 0x00 "SFP_21,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x158++0x03 line.long 0x00 "SFP_22,Separation Filter Pattern Register $3" else rgroup.long 0x158++0x03 line.long 0x00 "SFP_22,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x15C++0x03 line.long 0x00 "SFP_23,Separation Filter Pattern Register $3" else rgroup.long 0x15C++0x03 line.long 0x00 "SFP_23,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x160++0x03 line.long 0x00 "SFP_24,Separation Filter Pattern Register $3" else rgroup.long 0x160++0x03 line.long 0x00 "SFP_24,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x164++0x03 line.long 0x00 "SFP_25,Separation Filter Pattern Register $3" else rgroup.long 0x164++0x03 line.long 0x00 "SFP_25,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x168++0x03 line.long 0x00 "SFP_26,Separation Filter Pattern Register $3" else rgroup.long 0x168++0x03 line.long 0x00 "SFP_26,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x16C++0x03 line.long 0x00 "SFP_27,Separation Filter Pattern Register $3" else rgroup.long 0x16C++0x03 line.long 0x00 "SFP_27,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x170++0x03 line.long 0x00 "SFP_28,Separation Filter Pattern Register $3" else rgroup.long 0x170++0x03 line.long 0x00 "SFP_28,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x174++0x03 line.long 0x00 "SFP_29,Separation Filter Pattern Register $3" else rgroup.long 0x174++0x03 line.long 0x00 "SFP_29,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x178++0x03 line.long 0x00 "SFP_30,Separation Filter Pattern Register $3" else rgroup.long 0x178++0x03 line.long 0x00 "SFP_30,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x17C++0x03 line.long 0x00 "SFP_31,Separation Filter Pattern Register $3" else rgroup.long 0x17C++0x03 line.long 0x00 "SFP_31,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x1C0++0x07 line.long 0x00 "SFM_0,Separation Filter Mask Register 0" line.long 0x04 "SFM_1,Separation Filter Mask Register 1" group.long 0x300++0x03 line.long 0x00 "TGC,Transmit Configuration Register" bitfld.long 0x00 20.--21. " TBD_3[1:0] ,Transmit FIFO size (Stream Class A)" "0,1,2,3" bitfld.long 0x00 16.--17. " TBD_2[1:0] ,Transmit FIFO size (Stream Class B)" "0,1,2,3" bitfld.long 0x00 12.--13. " TBD_1[1:0] ,Transmit FIFO size (Network Control)" "0,1,2,3" bitfld.long 0x00 8.--9. " TBD_0[1:0] ,Transmit FIFO size (Best Effort)" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " TQP[1:0] ,Transmit queue priority" "Non-AVB mode,AVB mode 1,,AVB mode 2" bitfld.long 0x00 3. " TSM_3 ,Transmit synchronous mode (Stream Class A)" "Write-back,?..." bitfld.long 0x00 2. " TSM_2 ,Transmit synchronous mode (Stream Class B)" "Write-back,?..." bitfld.long 0x00 1. " TSM_1 ,Transmit synchronous mode (Network Control)" "Write-back,?..." textline " " bitfld.long 0x00 0. " TSM_0 ,Transmit synchronous mode (Best Effort)" "Write-back,?..." else rgroup.long 0x1C0++0x07 line.long 0x00 "SFM_0,Separation Filter Mask Register 0" line.long 0x04 "SFM_1,Separation Filter Mask Register 1" rgroup.long 0x300++0x03 line.long 0x00 "TGC,Transmit Configuration Register" bitfld.long 0x00 20.--21. " TBD_3[1:0] ,Transmit FIFO size (Stream Class A)" "0,1,2,3" bitfld.long 0x00 16.--17. " TBD_2[1:0] ,Transmit FIFO size (Stream Class B)" "0,1,2,3" bitfld.long 0x00 12.--13. " TBD_1[1:0] ,Transmit FIFO size (Network Control)" "0,1,2,3" bitfld.long 0x00 8.--9. " TBD_0[1:0] ,Transmit FIFO size (Best Effort)" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " TQP[1:0] ,Transmit queue priority" "Non-AVB mode,AVB mode 1,,AVB mode 2" bitfld.long 0x00 3. " TSM_3 ,Transmit synchronous mode (Stream Class A)" "Write-back,?..." bitfld.long 0x00 2. " TSM_2 ,Transmit synchronous mode (Stream Class B)" "Write-back,?..." bitfld.long 0x00 1. " TSM_1 ,Transmit synchronous mode (Network Control)" "Write-back,?..." textline " " bitfld.long 0x00 0. " TSM_0 ,Transmit synchronous mode (Best Effort)" "Write-back,?..." endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x4) group.long 0x304++0x03 line.long 0x00 "TCCR,Transmit Configuration Control Register" bitfld.long 0x00 9. " TFR ,Time stamp FIFO release" "No effect,Release" bitfld.long 0x00 8. " TFEN ,Time stamp FIFO enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSRQ_3 ,Transmit start request (Queue 3 (Stream Class A))" "Empty or stopped,Requested" textline " " bitfld.long 0x00 2. " TSRQ_2 ,Transmit start request (Queue 2 (Stream Class B))" "Empty or stopped,Requested" bitfld.long 0x00 1. " TSRQ_1 ,Transmit start request (Queue 1 (Network Control))" "Empty or stopped,Requested" bitfld.long 0x00 0. " TSRQ_0 ,Transmit start request (Queue 0 (Best Effort))" "Empty or stopped,Requested" else group.long 0x304++0x03 line.long 0x00 "TCCR,Transmit Configuration Control Register" bitfld.long 0x00 9. " TFR ,Time stamp FIFO release" "No effect,Release" bitfld.long 0x00 8. " TFEN ,Time stamp FIFO enable" "Disabled,Enabled" rbitfld.long 0x00 3. " TSRQ_3 ,Transmit start request (Queue 3 (Stream Class A))" "Empty or stopped,Requested" textline " " rbitfld.long 0x00 2. " TSRQ_2 ,Transmit start request (Queue 2 (Stream Class B))" "Empty or stopped,Requested" rbitfld.long 0x00 1. " TSRQ_1 ,Transmit start request (Queue 1 (Network Control))" "Empty or stopped,Requested" rbitfld.long 0x00 0. " TSRQ_0 ,Transmit start request (Queue 0 (Best Effort))" "Empty or stopped,Requested" endif rgroup.long 0x308++0x0F line.long 0x00 "TSR,Transmit Status Register" bitfld.long 0x00 8.--10. " TFFL[2:0] ,Time Stamp FIFO Count" "Empty,1,Full,?..." bitfld.long 0x00 2.--3. " CCS_1[1:0] ,CBS counter status 1 (Class A)" "Within limit,Less or equal lower,Greater or equal upper,?..." bitfld.long 0x00 0.--1. " CCS_0[1:0] ,CBS counter status 0 (Class B)" "Within limit,Less or equal lower,Greater or equal upper,?..." line.long 0x04 "TFA_0,Time Stamp FIFO Access Register 0" hexmask.long 0x04 0.--31. 1. " TSV[31:0] ,Time stamp value bits 31:0" line.long 0x08 "TFA_1,Time Stamp FIFO Access Register 1" hexmask.long 0x08 0.--31. 1. " TSV[63:32] ,Time stamp value bits 63:32" line.long 0x0C "TFA_2,Time Stamp FIFO Access Register 2" hexmask.long.word 0x0C 16.--25. 1. " TST[9:0] ,Time stamp tag" hexmask.long.word 0x0C 0.--15. 1. " TSV[79:64] ,Time stamp value bits 79:64" group.long 0x320++0x1F line.long 0x00 "CIVR_0,CBS Increment Value Register 0" line.long 0x04 "CIVR_1,CBS Increment Value Register 1" line.long 0x08 "CDVR_0,CBS Decrement Value Register 0" line.long 0x0C "CDVR_1,CBS Decrement Value Register 1" line.long 0x10 "CUL_0,CBS Upper Limit Register 0" line.long 0x14 "CUL_1,CBS Upper Limit Register 1" line.long 0x18 "CLL_0,CBS Lower Limit Register 0" line.long 0x1C "CLL_1,CBS Lower Limit Register 1" group.long 0x350++0x33 line.long 0x00 "DIC,Descriptor Interrupt Control Register" bitfld.long 0x00 15. " DPE_15 ,Descriptor Interrupt Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " DPE_14 ,Descriptor Interrupt Enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " DPE_13 ,Descriptor Interrupt Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " DPE_12 ,Descriptor Interrupt Enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " DPE_11 ,Descriptor Interrupt Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DPE_10 ,Descriptor Interrupt Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " DPE_9 ,Descriptor Interrupt Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " DPE_8 ,Descriptor Interrupt Enable 8" "Disabled,Enabled" bitfld.long 0x00 7. " DPE_7 ,Descriptor Interrupt Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " DPE_6 ,Descriptor Interrupt Enable 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DPE_5 ,Descriptor Interrupt Enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " DPE_4 ,Descriptor Interrupt Enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " DPE_3 ,Descriptor Interrupt Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " DPE_2 ,Descriptor Interrupt Enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " DPE_1 ,Descriptor Interrupt Enable 1" "Disabled,Enabled" line.long 0x04 "DIS,Descriptor Interrupt Status Register" bitfld.long 0x04 15. " DPF_15 ,Descriptor Interrupt Status 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " DPF_14 ,Descriptor Interrupt Status 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " DPF_13 ,Descriptor Interrupt Status 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " DPF_12 ,Descriptor Interrupt Status 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " DPF_11 ,Descriptor Interrupt Status 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DPF_10 ,Descriptor Interrupt Status 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " DPF_9 ,Descriptor Interrupt Status 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " DPF_8 ,Descriptor Interrupt Status 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " DPF_7 ,Descriptor Interrupt Status 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " DPF_6 ,Descriptor Interrupt Status 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " DPF_5 ,Descriptor Interrupt Status 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " DPF_4 ,Descriptor Interrupt Status 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " DPF_3 ,Descriptor Interrupt Status 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " DPF_2 ,Descriptor Interrupt Status 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " DPF_1 ,Descriptor Interrupt Status 1" "No interrupt,Interrupt" line.long 0x08 "EIC,Error Interrupt Control Register" bitfld.long 0x08 8. " TFFE ,Time stamp FIFO full-error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " CULE_1 ,CBS upper limit error interrupt enable (Class A)" "Disabled,Enabled" bitfld.long 0x08 6. " CULE_0 ,CBS upper limit error interrupt enable (Class B)" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " CLLE_1 ,CBS lower limit error interrupt enable (Class A)" "Disabled,Enabled" bitfld.long 0x08 4. " CLLE_0 ,CBS lower limit error interrupt enable (Class B)" "Disabled,Enabled" bitfld.long 0x08 3. " SEE ,Separation error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " QEE ,Queue error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 1. " MTEE ,E-MAC transmission error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " MREE ,E-MAC reception error interrupt enable" "Disabled,Enabled" line.long 0x0C "EIS,Error Interrupt Status Register" bitfld.long 0x0C 16. " QFS ,Queue full error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 8. " TFFF ,Time stamp FIFO full-error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 7. " CULF_1 ,CBS upper limit error interrupt status (Class A)" "No interrupt,Interrupt" bitfld.long 0x0C 6. " CULF_0 ,CBS upper limit error interrupt status (Class B)" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 5. " CLLF_1 ,CBS lower limit error interrupt status (Class A)" "No interrupt,Interrupt" bitfld.long 0x0C 4. " CLLF_0 ,CBS lower limit error interrupt status (Class B)" "No interrupt,Interrupt" bitfld.long 0x0C 3. " SEF ,Separation error interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 2. " QEF ,Queue error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 1. " MTEF ,E-MAC transmission error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 0. " MREF ,E-MAC reception error interrupt status" "No interrupt,Interrupt" line.long 0x10 "RIC_0,Receive Interrupt Control Register 0" bitfld.long 0x10 17. " FRE_17 ,Receive frame enable 17 (Stream)" "Disabled,Enabled" bitfld.long 0x10 16. " FRE_16 ,Receive frame enable 16 (Stream)" "Disabled,Enabled" bitfld.long 0x10 15. " FRE_15 ,Receive frame enable 15 (Stream)" "Disabled,Enabled" bitfld.long 0x10 14. " FRE_14 ,Receive frame enable 14 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " FRE_13 ,Receive frame enable 13 (Stream)" "Disabled,Enabled" bitfld.long 0x10 12. " FRE_12 ,Receive frame enable 12 (Stream)" "Disabled,Enabled" bitfld.long 0x10 11. " FRE_11 ,Receive frame enable 11 (Stream)" "Disabled,Enabled" bitfld.long 0x10 10. " FRE_10 ,Receive frame enable 10 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " FRE_9 ,Receive frame enable 9 (Stream)" "Disabled,Enabled" bitfld.long 0x10 8. " FRE_8 ,Receive frame enable 8 (Stream)" "Disabled,Enabled" bitfld.long 0x10 7. " FRE_7 ,Receive frame enable 7 (Stream)" "Disabled,Enabled" bitfld.long 0x10 6. " FRE_6 ,Receive frame enable 6 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " FRE_5 ,Receive frame enable 5 (Stream)" "Disabled,Enabled" bitfld.long 0x10 4. " FRE_4 ,Receive frame enable 4 (Stream)" "Disabled,Enabled" bitfld.long 0x10 3. " FRE_3 ,Receive frame enable 3 (Stream)" "Disabled,Enabled" bitfld.long 0x10 2. " FRE_2 ,Receive frame enable 2 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " FRE_1 ,Receive frame enable 1 (Network Control)" "Disabled,Enabled" bitfld.long 0x10 0. " FRE_0 ,Receive frame enable 0 (Best Effort)" "Disabled,Enabled" line.long 0x14 "RIS_0,Receive Interrupt Status Register 0" bitfld.long 0x14 17. " FRF_17 ,Receive frame interrupt status 17 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 16. " FRF_16 ,Receive frame interrupt status 16 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 15. " FRF_15 ,Receive frame interrupt status 15 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 14. " FRF_14 ,Receive frame interrupt status 14 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 13. " FRF_13 ,Receive frame interrupt status 13 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 12. " FRF_12 ,Receive frame interrupt status 12 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 11. " FRF_11 ,Receive frame interrupt status 11 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 10. " FRF_10 ,Receive frame interrupt status 10 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 9. " FRF_9 ,Receive frame interrupt status 9 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 8. " FRF_8 ,Receive frame interrupt status 8 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 7. " FRF_7 ,Receive frame interrupt status 7 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 6. " FRF_6 ,Receive frame interrupt status 6 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " FRF_5 ,Receive frame interrupt status 5 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 4. " FRF_4 ,Receive frame interrupt status 4 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 3. " FRF_3 ,Receive frame interrupt status 3 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 2. " FRF_2 ,Receive frame interrupt status 2 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 1. " FRF_1 ,Receive frame interrupt status 1 (Network Control)" "No interrupt,Interrupt" bitfld.long 0x14 0. " FRF_0 ,Receive frame interrupt status 0 (Best Effort)" "No interrupt,Interrupt" line.long 0x18 "RIC_1,Receive Interrupt Control Register 1" bitfld.long 0x18 31. " RFWE ,Receive FIFO warning interrupt enable" "Disabled,Enabled" line.long 0x1C "RIS_1,Receive Interrupt Status Register 1" bitfld.long 0x1C 31. " RFWE ,Receive FIFO warning status enable" "No interrupt,Interrupt" line.long 0x20 "RIC_2,Receive Interrupt Control Register 2" bitfld.long 0x20 31. " QFE_31 ,Receive FIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 17. " QFE_17 ,Receive queue 17 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 16. " QFE_16 ,Receive queue 16 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 15. " QFE_15 ,Receive queue 15 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 14. " QFE_14 ,Receive queue 14 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 13. " QFE_13 ,Receive queue 13 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 12. " QFE_12 ,Receive queue 12 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 11. " QFE_11 ,Receive queue 11 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 10. " QFE_10 ,Receive queue 10 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 9. " QFE_9 ,Receive queue 9 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 8. " QFE_8 ,Receive queue 8 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 7. " QFE_7 ,Receive queue 7 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 6. " QFE_6 ,Receive queue 6 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 5. " QFE_5 ,Receive queue 5 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 4. " QFE_4 ,Receive queue 4 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 3. " QFE_3 ,Receive queue 3 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " QFE_2 ,Receive queue 2 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 1. " QFE_1 ,Receive queue 1 (Network Control) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 0. " QFE_0 ,Receive queue 0 (Best Effort) full interrupt enable" "Disabled,Enabled" line.long 0x24 "RIS_2,Receive Interrupt Status Register 2" bitfld.long 0x24 31. " QFE_31 ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 17. " QFE_17 ,Receive queue 17 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 16. " QFE_16 ,Receive queue 16 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 15. " QFE_15 ,Receive queue 15 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 14. " QFE_14 ,Receive queue 14 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 13. " QFE_13 ,Receive queue 13 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 12. " QFE_12 ,Receive queue 12 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 11. " QFE_11 ,Receive queue 11 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 10. " QFE_10 ,Receive queue 10 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 9. " QFE_9 ,Receive queue 9 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 8. " QFE_8 ,Receive queue 8 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 7. " QFE_7 ,Receive queue 7 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 6. " QFE_6 ,Receive queue 6 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 5. " QFE_5 ,Receive queue 5 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 4. " QFE_4 ,Receive queue 4 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 3. " QFE_3 ,Receive queue 3 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 2. " QFE_2 ,Receive queue 2 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 1. " QFE_1 ,Receive queue 1 (Network Control) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 0. " QFE_0 ,Receive queue 0 (Best Effort) full interrupt status" "No interrupt,Interrupt" line.long 0x28 "TIC,Transmit Interrupt Control Register" bitfld.long 0x28 9. " TFWE ,Time stamp FIFO warning interrupt enable" "Disabled,Enabled" bitfld.long 0x28 8. " TFUE ,Time stamp FIFO update interrupt enable" "Disabled,Enabled" line.long 0x2C "TIC,Transmit Interrupt Control Register" bitfld.long 0x2C 9. " TFWE ,Time stamp FIFO warning interrupt status" "No interrupt,Interrupt" bitfld.long 0x2C 8. " TFUE ,Time stamp FIFO update interrupt status" "No interrupt,Interrupt" line.long 0x30 "ISS,Interrupt Summary Status Register" bitfld.long 0x30 31. " DPS_15 ,Descriptor interrupt 15 summary" "No interrupt,Interrupt" bitfld.long 0x30 30. " DPS_14 ,Descriptor interrupt 14 summary" "No interrupt,Interrupt" bitfld.long 0x30 29. " DPS_13 ,Descriptor interrupt 13 summary" "No interrupt,Interrupt" bitfld.long 0x30 28. " DPS_12 ,Descriptor interrupt 12 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 27. " DPS_11 ,Descriptor interrupt 11 summary" "No interrupt,Interrupt" bitfld.long 0x30 26. " DPS_10 ,Descriptor interrupt 10 summary" "No interrupt,Interrupt" bitfld.long 0x30 25. " DPS_9 ,Descriptor interrupt 9 summary" "No interrupt,Interrupt" bitfld.long 0x30 24. " DPS_8 ,Descriptor interrupt 8 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 23. " DPS_7 ,Descriptor interrupt 7 summary" "No interrupt,Interrupt" bitfld.long 0x30 22. " DPS_6 ,Descriptor interrupt 6 summary" "No interrupt,Interrupt" bitfld.long 0x30 21. " DPS_5 ,Descriptor interrupt 5 summary" "No interrupt,Interrupt" bitfld.long 0x30 20. " DPS_4 ,Descriptor interrupt 4 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 19. " DPS_3 ,Descriptor interrupt 3 summary" "No interrupt,Interrupt" bitfld.long 0x30 18. " DPS_2 ,Descriptor interrupt 2 summary" "No interrupt,Interrupt" bitfld.long 0x30 17. " DPS_1 ,Descriptor interrupt 1 summary" "No interrupt,Interrupt" bitfld.long 0x30 13. " CGIS ,gPTP interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 12. " RFWS ,Receive FIFO warning interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 9. " TFWS ,Time stamp FIFO warning interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 8. " TFUS ,Time stamp FIFO update interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 7. " MS ,E-MAC interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 6. " ES ,Error interrupt summary" "No interrupt,Interrupt" width 7. if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x3))==0x0)&&(((per.l(ad:0xE6800000+0x0)&0x30000))!=0x0)) group.long 0x390++0x03 "gPTP Registers" line.long 0x00 "GCCR,gPTP Configuration Control Register" bitfld.long 0x00 8.--9. " TCSS[1:0] ,Timer capture source select" "gPTP timer value,Adjusted gPTP timer value,AVTP presentation time,?..." bitfld.long 0x00 5. " LMTT ,Maximum transit time configuration request" "Setting completed,Requested" bitfld.long 0x00 4. " LPTC ,Presentation time compare value configuration request" "Setting completed,Requested" textline " " bitfld.long 0x00 3. " LTI ,Timer increment value configuration request" "Setting completed,Requested" bitfld.long 0x00 2. " LTO ,Timer offset value configuration request" "Setting completed,Requested" bitfld.long 0x00 0.--1. " TCR[1:0] ,Timer Control Request" "Not requested,gPTP/AVTP present. time reset,,Captures value set in TCSS" else group.long 0x390++0x03 "gPTP Registers" line.long 0x00 "GCCR,gPTP Configuration Control Register" bitfld.long 0x00 8.--9. " TCSS[1:0] ,Timer capture source select" "gPTP timer value,Adjusted gPTP timer value,AVTP presentation time,?..." bitfld.long 0x00 5. " LMTT ,Maximum transit time configuration request" "Setting completed,Requested" bitfld.long 0x00 4. " LPTC ,Presentation time compare value configuration request" "Setting completed,Requested" textline " " bitfld.long 0x00 3. " LTI ,Timer increment value configuration request" "Setting completed,Requested" bitfld.long 0x00 2. " LTO ,Timer offset value configuration request" "Setting completed,Requested" rbitfld.long 0x00 0.--1. " TCR[1:0] ,Timer Control Request" "Not requested,gPTP/AVTP present. time reset,,Captures value set in TCSS" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x20))==0x20)) rgroup.long 0x394++0x03 line.long 0x00 "GMTT,gPTP Maximum Transit Time Configuration Register" else group.long 0x394++0x03 line.long 0x00 "GMTT,gPTP Maximum Transit Time Configuration Register" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x10))==0x10)) rgroup.long 0x398++0x03 line.long 0x00 "GPTC,gPTP Presentation Time Comparison Register" else group.long 0x398++0x03 line.long 0x00 "GPTC,gPTP Presentation Time Comparison Register" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x8))==0x8)) rgroup.long 0x39C++0x03 line.long 0x00 "GTI,gPTP Timer Increment Configuration Register" hexmask.long 0x00 0.--27. 1. " TIV[27:0] ,gPTP Timer Increment Value" else group.long 0x39C++0x03 line.long 0x00 "GTI,gPTP Timer Increment Configuration Register" hexmask.long 0x00 0.--27. 1. " TIV[27:0] ,gPTP Timer Increment Value" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x4))==0x4)) rgroup.long 0x3A0++0x0B line.long 0x00 "GTO_0,gPTP Timer Offset Configuration Register 0" hexmask.long 0x00 0.--31. 1. " TOV[31:0] ,Timer offset value bits 31:0" line.long 0x04 "GTO_1,gPTP Timer Offset Configuration Register 1" hexmask.long 0x04 0.--31. 1. " TOV[63:32] ,Timer offset value bits 63:32" line.long 0x08 "GTO_2,gPTP Timer Offset Configuration Register 2" hexmask.long.word 0x08 0.--15. 1. " TOV[79:64] ,Timer offset value bits 79:64" else group.long 0x3A0++0x0B line.long 0x00 "GTO_0,gPTP Timer Offset Configuration Register 0" hexmask.long 0x00 0.--31. 1. " TOV[31:0] ,Timer offset value bits 31:0" line.long 0x04 "GTO_1,gPTP Timer Offset Configuration Register 1" hexmask.long 0x04 0.--31. 1. " TOV[63:32] ,Timer offset value bits 63:32" line.long 0x08 "GTO_2,gPTP Timer Offset Configuration Register 2" hexmask.long.word 0x08 0.--15. 1. " TOV[79:64] ,Timer offset value bits 79:64" endif group.long 0x3AC++0x07 line.long 0x00 "GIC,gPTP Interrupt Control Register" bitfld.long 0x00 2. " PTME ,Presentation time match interrupt enable" "Disabled,Enabled" line.long 0x04 "GIS,gPTP Interrupt Status Register" bitfld.long 0x04 2. " PTME ,Presentation time match interrupt flag" "No interrupt,Interrupt" if (((per.l(ad:0xE6800000+0x390)&0x3))==0x3) hgroup.long 0x3B8++0x0B hide.long 0x00 "GCT_0,gPTP Timer Capture Register 0" hide.long 0x04 "GCT_1,gPTP Timer Capture Register 1" hide.long 0x08 "GCT_2,gPTP Timer Capture Register 2" else group.long 0x3B8++0x0B line.long 0x00 "GCT_0,gPTP Timer Capture Register 0" hexmask.long 0x00 0.--31. 1. " CTV[31:0] ,gPTP timer capture value bits 31:0" line.long 0x04 "GCT_1,gPTP Timer Capture Register 1" hexmask.long 0x04 0.--31. 1. " CTV[63:32] ,gPTP timer capture value bits 63:32" line.long 0x08 "GCT_2,gPTP Timer Capture Register 2" hexmask.long.word 0x08 0.--15. 1. " CTV[79:64] ,gPTP timer capture value bits 79:64" endif tree.end tree "E-MAC Configuration" width 8. if (((per.l(ad:0xE6800000+0x500)&0x6))==0x0) group.long 0x500++0x03 line.long 0x00 "ECMR,E-MAC Mode Register" bitfld.long 0x00 26. " TRCCM ,Counter clear mode" "Writing clears,Reading clears" bitfld.long 0x00 23. " RCSC ,Checksum automatic calculation" "Disabled,Enabled" bitfld.long 0x00 21. " DPAD ,Enable padding insert in data for transmission when fewer than 60 bytes are to be transmitted" "Inserted,Not inserted" bitfld.long 0x00 20. " RZPF ,PAUSE frame reception with time = 0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " PFR ,PAUSE frame receive mode. Transfers frame to the AVB-DMAC" "Not transferred,Transferred" bitfld.long 0x00 17. " RXF ,Operating mode for flow control in reception" "PAUSE frame det. disabled,Flow ctr. for RX port enabled" bitfld.long 0x00 9. " MPDE ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RE ,Reception enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TE ,Transmission enable" "Disabled,Enabled" bitfld.long 0x00 1. " DM ,Duplex mode" ",Full-duplex" bitfld.long 0x00 0. " PRM ,Promiscuous mode" "Normal operation,Promiscuous mode" else group.long 0x500++0x03 line.long 0x00 "ECMR,E-MAC Mode Register" rbitfld.long 0x00 26. " TRCCM ,Counter clear mode" "Writing clears,Reading clears" rbitfld.long 0x00 23. " RCSC ,Checksum automatic calculation" "Disabled,Enabled" rbitfld.long 0x00 21. " DPAD ,Enable padding insert in data for transmission when fewer than 60 bytes are to be transmitted" "Inserted,Not inserted" rbitfld.long 0x00 20. " RZPF ,PAUSE frame reception with time = 0 enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 18. " PFR ,PAUSE frame receive mode. Transfers frame to the AVB-DMAC" "Not transferred,Transferred" rbitfld.long 0x00 17. " RXF ,Operating mode for flow control in reception" "PAUSE frame det. disabled,Flow ctr. for RX port enabled" rbitfld.long 0x00 9. " MPDE ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RE ,Reception enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TE ,Transmission enable" "Disabled,Enabled" rbitfld.long 0x00 1. " DM ,Duplex mode" ",Full-duplex" rbitfld.long 0x00 0. " PRM ,Promiscuous mode" "Normal operation,Promiscuous mode" endif group.long 0x508++0x03 line.long 0x00 "RFLR,Receive Frame Length Register" hexmask.long.tbyte 0x00 0.--17. 1. " RFL[17:0] ,Receive frame length" group.long 0x510++0x03 line.long 0x00 "ECSR,E-MAC Status Register" bitfld.long 0x00 3. " PHYI ,PHY interrupt terminal state bit" "Not asserted,Asserted" bitfld.long 0x00 2. " LCHNG ,Link signal change bit" "Not detected,Detected" eventfld.long 0x00 1. " MPD ,Magic packet detection" "Not detected,Detected" eventfld.long 0x00 0. " ICD ,Illegal carrier detection" "Not detected,Detected" group.long 0x518++0x03 line.long 0x00 "ECSIPR,E-MAC Interrupt Permission Register" bitfld.long 0x00 1. " MPDIP ,Magic packet detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ICDIP ,Illegal carrier detect interrupt enable" "Disabled,Enabled" group.long 0x520++0x03 line.long 0x00 "PIR,PHY Interface Register" bitfld.long 0x00 3. " MDI ,MII Management data-in" "Low,High" bitfld.long 0x00 2. " MDO ,MII Management data-out" "Low,High" bitfld.long 0x00 1. " MMD ,MII Management mode" "Read,Write" bitfld.long 0x00 0. " MDC ,MII Management data clock" "Low,High" rgroup.long 0x528++0x03 line.long 0x00 "PSR,PHY Status Register" bitfld.long 0x00 0. " LMON ,Link status pin state" "Low,High" group.long 0x52C++0x03 line.long 0x00 "PIPR,PHY_INT Polarity Register" bitfld.long 0x00 0. " PHYIP ,PHY interrupt input pin polarity" "Active low,Active high" group.long 0x558++0x03 line.long 0x00 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x00 0.--15. 1. " MP[15:0] ,These bits set the TIME parameter value of a manual PAUSE frame" rgroup.long 0x55C++0x07 line.long 0x00 "PFTCR,PAUSE Frame Transmit Counter" hexmask.long.word 0x00 0.--15. 1. " PFTXC[15:0] ,Counter for counting the number of transmitted PAUSE frames" line.long 0x04 "PFRCR,PAUSE Frame Receive Counter" hexmask.long.word 0x04 0.--15. 1. " PFRXC[15:0] ,Counter for counting the number of received PAUSE frames" if (((per.l(ad:0xE6800000+0x500)&0x6))==0x0) group.long 0x5B0++0x03 line.long 0x00 "GECMR,E-MAC Mode Register 2" bitfld.long 0x00 0. " SPEED ,Transfer Speed Setting" "100Mbps,1000Mbps" group.long 0x5C0++0x03 line.long 0x00 "MAHR,E-MAC Address High Register" hexmask.long 0x00 0.--31. 1. " MA[47:16] ,E-MAC Address Bits 47 to 16" group.long 0x5C8++0x03 line.long 0x00 "MALR,E-MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MA[15:0] ,E-MAC Address Bits 15 to 0" else rgroup.long 0x5B0++0x03 line.long 0x00 "GECMR,E-MAC Mode Register 2" bitfld.long 0x00 0. " SPEED ,Transfer Speed Setting" "100Mbps,1000Mbps" rgroup.long 0x5C0++0x03 line.long 0x00 "MAHR,E-MAC Address High Register" hexmask.long 0x00 0.--31. 1. " MA[47:16] ,E-MAC Address Bits 47 to 16" rgroup.long 0x5C8++0x03 line.long 0x00 "MALR,E-MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MA[15:0] ,E-MAC Address Bits 15 to 0" endif group.long 0x740++0x03 line.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " CEFC[15:0] ,These bits indicate the number of CRC error frames received" group.long 0x748++0x03 line.long 0x00 "FRECR,Frame Receive Error Counter Register" hexmask.long.word 0x00 0.--15. 1. " FREC[15:0] ,These bits indicate the number of errors during frame reception" group.long 0x750++0x03 line.long 0x00 "TSFRCR,Too-Short Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " TSFRC[15:0] ,These bits indicate the number of frames received with a length of less than 64 bytes" group.long 0x758++0x03 line.long 0x00 "TLFRCR,Too-Long Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " TLFC[15:0] ,These bits indicate the number of frames received with a length exceeding the value in RFLR" group.long 0x760++0x03 line.long 0x00 "RFCR,Residual-Bit Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " RFC[15:0] ,These bits indicate the number of received frames containing residual bits" group.long 0x778++0x03 line.long 0x00 "MAFCR,Multicast Address Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " MAFC[15:0] ,These bits indicate the number of multicast frames that have been received" tree.end width 0xB tree.end tree.open "CAN (Controller Area Network)" tree "Channel 0" base ad:0xE6E80000 width 12. group.word 0x840++0x01 line.word 0x00 "C0CTLR,CAN0 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" textline " " bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C0CLKR,CAN0 Clock Select Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X") bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" else bitfld.byte 0x00 0. " CCLKS ,CAN Clock Source Select" "Peripheral,Main" endif group.long 0x844++0x03 line.long 0x00 "C0BCR,CAN0 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" if (((per.w(ad:0xE6E80000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C0MKR0,CAN0 Mask Register 0" hide.long 0x4 "C0MKR1,CAN0 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C0MKR2,CAN0 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C0MKR3,CAN0 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C0MKR4,CAN0 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C0MKR5,CAN0 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C0MKR6,CAN0 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C0MKR7,CAN0 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C0MKR8,CAN0 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C0MKR9,CAN0 Mask Register 9" endif if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C0MKIVLR1,CAN0 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C0MKIVLR0,CAN0 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV0 ,Mask valid for mailbox 0" "Valid,Invalid" tree "CAN Mailboxes registers" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C0MB63_DLC,CAN0 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C0MB63_D0,CAN0 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C0MB63_D1,CAN0 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C0MB63_D2,CAN0 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C0MB63_D3,CAN0 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C0MB63_D4,CAN0 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C0MB63_D5,CAN0 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C0MB63_D6,CAN0 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C0MB63_D7,CAN0 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C0MB63_TS,CAN0 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C0MB62_DLC,CAN0 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C0MB62_D0,CAN0 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C0MB62_D1,CAN0 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C0MB62_D2,CAN0 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C0MB62_D3,CAN0 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C0MB62_D4,CAN0 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C0MB62_D5,CAN0 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C0MB62_D6,CAN0 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C0MB62_D7,CAN0 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C0MB62_TS,CAN0 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C0MB61_DLC,CAN0 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C0MB61_D0,CAN0 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C0MB61_D1,CAN0 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C0MB61_D2,CAN0 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C0MB61_D3,CAN0 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C0MB61_D4,CAN0 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C0MB61_D5,CAN0 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C0MB61_D6,CAN0 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C0MB61_D7,CAN0 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C0MB61_TS,CAN0 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C0MB60_DLC,CAN0 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C0MB60_D0,CAN0 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C0MB60_D1,CAN0 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C0MB60_D2,CAN0 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C0MB60_D3,CAN0 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C0MB60_D4,CAN0 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C0MB60_D5,CAN0 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C0MB60_D6,CAN0 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C0MB60_D7,CAN0 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C0MB60_TS,CAN0 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C0MB59_DLC,CAN0 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C0MB59_D0,CAN0 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C0MB59_D1,CAN0 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C0MB59_D2,CAN0 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C0MB59_D3,CAN0 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C0MB59_D4,CAN0 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C0MB59_D5,CAN0 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C0MB59_D6,CAN0 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C0MB59_D7,CAN0 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C0MB59_TS,CAN0 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C0MB58_DLC,CAN0 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C0MB58_D0,CAN0 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C0MB58_D1,CAN0 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C0MB58_D2,CAN0 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C0MB58_D3,CAN0 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C0MB58_D4,CAN0 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C0MB58_D5,CAN0 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C0MB58_D6,CAN0 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C0MB58_D7,CAN0 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C0MB58_TS,CAN0 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C0MB57_DLC,CAN0 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C0MB57_D0,CAN0 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C0MB57_D1,CAN0 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C0MB57_D2,CAN0 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C0MB57_D3,CAN0 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C0MB57_D4,CAN0 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C0MB57_D5,CAN0 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C0MB57_D6,CAN0 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C0MB57_D7,CAN0 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C0MB57_TS,CAN0 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C0MB56_DLC,CAN0 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C0MB56_D0,CAN0 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C0MB56_D1,CAN0 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C0MB56_D2,CAN0 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C0MB56_D3,CAN0 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C0MB56_D4,CAN0 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C0MB56_D5,CAN0 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C0MB56_D6,CAN0 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C0MB56_D7,CAN0 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C0MB56_TS,CAN0 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C0MB55_DLC,CAN0 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C0MB55_D0,CAN0 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C0MB55_D1,CAN0 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C0MB55_D2,CAN0 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C0MB55_D3,CAN0 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C0MB55_D4,CAN0 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C0MB55_D5,CAN0 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C0MB55_D6,CAN0 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C0MB55_D7,CAN0 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C0MB55_TS,CAN0 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C0MB54_DLC,CAN0 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C0MB54_D0,CAN0 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C0MB54_D1,CAN0 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C0MB54_D2,CAN0 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C0MB54_D3,CAN0 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C0MB54_D4,CAN0 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C0MB54_D5,CAN0 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C0MB54_D6,CAN0 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C0MB54_D7,CAN0 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C0MB54_TS,CAN0 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C0MB53_DLC,CAN0 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C0MB53_D0,CAN0 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C0MB53_D1,CAN0 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C0MB53_D2,CAN0 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C0MB53_D3,CAN0 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C0MB53_D4,CAN0 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C0MB53_D5,CAN0 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C0MB53_D6,CAN0 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C0MB53_D7,CAN0 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C0MB53_TS,CAN0 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C0MB52_DLC,CAN0 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C0MB52_D0,CAN0 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C0MB52_D1,CAN0 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C0MB52_D2,CAN0 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C0MB52_D3,CAN0 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C0MB52_D4,CAN0 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C0MB52_D5,CAN0 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C0MB52_D6,CAN0 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C0MB52_D7,CAN0 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C0MB52_TS,CAN0 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C0MB51_DLC,CAN0 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C0MB51_D0,CAN0 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C0MB51_D1,CAN0 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C0MB51_D2,CAN0 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C0MB51_D3,CAN0 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C0MB51_D4,CAN0 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C0MB51_D5,CAN0 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C0MB51_D6,CAN0 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C0MB51_D7,CAN0 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C0MB51_TS,CAN0 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C0MB50_DLC,CAN0 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C0MB50_D0,CAN0 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C0MB50_D1,CAN0 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C0MB50_D2,CAN0 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C0MB50_D3,CAN0 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C0MB50_D4,CAN0 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C0MB50_D5,CAN0 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C0MB50_D6,CAN0 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C0MB50_D7,CAN0 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C0MB50_TS,CAN0 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C0MB49_DLC,CAN0 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C0MB49_D0,CAN0 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C0MB49_D1,CAN0 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C0MB49_D2,CAN0 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C0MB49_D3,CAN0 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C0MB49_D4,CAN0 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C0MB49_D5,CAN0 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C0MB49_D6,CAN0 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C0MB49_D7,CAN0 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C0MB49_TS,CAN0 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C0MB48_DLC,CAN0 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C0MB48_D0,CAN0 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C0MB48_D1,CAN0 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C0MB48_D2,CAN0 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C0MB48_D3,CAN0 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C0MB48_D4,CAN0 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C0MB48_D5,CAN0 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C0MB48_D6,CAN0 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C0MB48_D7,CAN0 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C0MB48_TS,CAN0 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C0MB47_DLC,CAN0 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C0MB47_D0,CAN0 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C0MB47_D1,CAN0 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C0MB47_D2,CAN0 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C0MB47_D3,CAN0 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C0MB47_D4,CAN0 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C0MB47_D5,CAN0 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C0MB47_D6,CAN0 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C0MB47_D7,CAN0 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C0MB47_TS,CAN0 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C0MB46_DLC,CAN0 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C0MB46_D0,CAN0 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C0MB46_D1,CAN0 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C0MB46_D2,CAN0 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C0MB46_D3,CAN0 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C0MB46_D4,CAN0 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C0MB46_D5,CAN0 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C0MB46_D6,CAN0 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C0MB46_D7,CAN0 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C0MB46_TS,CAN0 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C0MB45_DLC,CAN0 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C0MB45_D0,CAN0 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C0MB45_D1,CAN0 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C0MB45_D2,CAN0 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C0MB45_D3,CAN0 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C0MB45_D4,CAN0 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C0MB45_D5,CAN0 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C0MB45_D6,CAN0 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C0MB45_D7,CAN0 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C0MB45_TS,CAN0 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C0MB44_DLC,CAN0 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C0MB44_D0,CAN0 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C0MB44_D1,CAN0 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C0MB44_D2,CAN0 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C0MB44_D3,CAN0 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C0MB44_D4,CAN0 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C0MB44_D5,CAN0 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C0MB44_D6,CAN0 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C0MB44_D7,CAN0 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C0MB44_TS,CAN0 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C0MB43_DLC,CAN0 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C0MB43_D0,CAN0 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C0MB43_D1,CAN0 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C0MB43_D2,CAN0 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C0MB43_D3,CAN0 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C0MB43_D4,CAN0 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C0MB43_D5,CAN0 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C0MB43_D6,CAN0 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C0MB43_D7,CAN0 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C0MB43_TS,CAN0 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C0MB42_DLC,CAN0 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C0MB42_D0,CAN0 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C0MB42_D1,CAN0 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C0MB42_D2,CAN0 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C0MB42_D3,CAN0 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C0MB42_D4,CAN0 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C0MB42_D5,CAN0 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C0MB42_D6,CAN0 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C0MB42_D7,CAN0 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C0MB42_TS,CAN0 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C0MB41_DLC,CAN0 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C0MB41_D0,CAN0 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C0MB41_D1,CAN0 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C0MB41_D2,CAN0 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C0MB41_D3,CAN0 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C0MB41_D4,CAN0 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C0MB41_D5,CAN0 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C0MB41_D6,CAN0 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C0MB41_D7,CAN0 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C0MB41_TS,CAN0 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C0MB40_DLC,CAN0 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C0MB40_D0,CAN0 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C0MB40_D1,CAN0 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C0MB40_D2,CAN0 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C0MB40_D3,CAN0 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C0MB40_D4,CAN0 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C0MB40_D5,CAN0 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C0MB40_D6,CAN0 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C0MB40_D7,CAN0 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C0MB40_TS,CAN0 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C0MB39_DLC,CAN0 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C0MB39_D0,CAN0 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C0MB39_D1,CAN0 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C0MB39_D2,CAN0 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C0MB39_D3,CAN0 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C0MB39_D4,CAN0 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C0MB39_D5,CAN0 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C0MB39_D6,CAN0 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C0MB39_D7,CAN0 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C0MB39_TS,CAN0 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C0MB38_DLC,CAN0 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C0MB38_D0,CAN0 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C0MB38_D1,CAN0 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C0MB38_D2,CAN0 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C0MB38_D3,CAN0 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C0MB38_D4,CAN0 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C0MB38_D5,CAN0 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C0MB38_D6,CAN0 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C0MB38_D7,CAN0 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C0MB38_TS,CAN0 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C0MB37_DLC,CAN0 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C0MB37_D0,CAN0 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C0MB37_D1,CAN0 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C0MB37_D2,CAN0 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C0MB37_D3,CAN0 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C0MB37_D4,CAN0 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C0MB37_D5,CAN0 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C0MB37_D6,CAN0 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C0MB37_D7,CAN0 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C0MB37_TS,CAN0 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C0MB36_DLC,CAN0 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C0MB36_D0,CAN0 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C0MB36_D1,CAN0 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C0MB36_D2,CAN0 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C0MB36_D3,CAN0 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C0MB36_D4,CAN0 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C0MB36_D5,CAN0 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C0MB36_D6,CAN0 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C0MB36_D7,CAN0 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C0MB36_TS,CAN0 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C0MB35_DLC,CAN0 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C0MB35_D0,CAN0 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C0MB35_D1,CAN0 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C0MB35_D2,CAN0 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C0MB35_D3,CAN0 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C0MB35_D4,CAN0 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C0MB35_D5,CAN0 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C0MB35_D6,CAN0 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C0MB35_D7,CAN0 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C0MB35_TS,CAN0 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C0MB34_DLC,CAN0 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C0MB34_D0,CAN0 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C0MB34_D1,CAN0 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C0MB34_D2,CAN0 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C0MB34_D3,CAN0 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C0MB34_D4,CAN0 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C0MB34_D5,CAN0 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C0MB34_D6,CAN0 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C0MB34_D7,CAN0 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C0MB34_TS,CAN0 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C0MB33_DLC,CAN0 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C0MB33_D0,CAN0 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C0MB33_D1,CAN0 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C0MB33_D2,CAN0 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C0MB33_D3,CAN0 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C0MB33_D4,CAN0 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C0MB33_D5,CAN0 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C0MB33_D6,CAN0 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C0MB33_D7,CAN0 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C0MB33_TS,CAN0 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C0MB32_DLC,CAN0 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C0MB32_D0,CAN0 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C0MB32_D1,CAN0 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C0MB32_D2,CAN0 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C0MB32_D3,CAN0 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C0MB32_D4,CAN0 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C0MB32_D5,CAN0 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C0MB32_D6,CAN0 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C0MB32_D7,CAN0 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C0MB32_TS,CAN0 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C0MB31_DLC,CAN0 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C0MB31_D0,CAN0 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C0MB31_D1,CAN0 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C0MB31_D2,CAN0 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C0MB31_D3,CAN0 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C0MB31_D4,CAN0 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C0MB31_D5,CAN0 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C0MB31_D6,CAN0 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C0MB31_D7,CAN0 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C0MB31_TS,CAN0 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C0MB30_DLC,CAN0 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C0MB30_D0,CAN0 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C0MB30_D1,CAN0 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C0MB30_D2,CAN0 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C0MB30_D3,CAN0 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C0MB30_D4,CAN0 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C0MB30_D5,CAN0 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C0MB30_D6,CAN0 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C0MB30_D7,CAN0 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C0MB30_TS,CAN0 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C0MB29_DLC,CAN0 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C0MB29_D0,CAN0 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C0MB29_D1,CAN0 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C0MB29_D2,CAN0 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C0MB29_D3,CAN0 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C0MB29_D4,CAN0 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C0MB29_D5,CAN0 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C0MB29_D6,CAN0 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C0MB29_D7,CAN0 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C0MB29_TS,CAN0 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C0MB28_DLC,CAN0 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C0MB28_D0,CAN0 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C0MB28_D1,CAN0 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C0MB28_D2,CAN0 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C0MB28_D3,CAN0 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C0MB28_D4,CAN0 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C0MB28_D5,CAN0 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C0MB28_D6,CAN0 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C0MB28_D7,CAN0 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C0MB28_TS,CAN0 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C0MB27_DLC,CAN0 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C0MB27_D0,CAN0 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C0MB27_D1,CAN0 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C0MB27_D2,CAN0 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C0MB27_D3,CAN0 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C0MB27_D4,CAN0 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C0MB27_D5,CAN0 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C0MB27_D6,CAN0 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C0MB27_D7,CAN0 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C0MB27_TS,CAN0 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C0MB26_DLC,CAN0 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C0MB26_D0,CAN0 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C0MB26_D1,CAN0 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C0MB26_D2,CAN0 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C0MB26_D3,CAN0 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C0MB26_D4,CAN0 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C0MB26_D5,CAN0 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C0MB26_D6,CAN0 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C0MB26_D7,CAN0 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C0MB26_TS,CAN0 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C0MB25_DLC,CAN0 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C0MB25_D0,CAN0 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C0MB25_D1,CAN0 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C0MB25_D2,CAN0 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C0MB25_D3,CAN0 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C0MB25_D4,CAN0 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C0MB25_D5,CAN0 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C0MB25_D6,CAN0 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C0MB25_D7,CAN0 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C0MB25_TS,CAN0 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C0MB24_DLC,CAN0 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C0MB24_D0,CAN0 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C0MB24_D1,CAN0 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C0MB24_D2,CAN0 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C0MB24_D3,CAN0 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C0MB24_D4,CAN0 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C0MB24_D5,CAN0 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C0MB24_D6,CAN0 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C0MB24_D7,CAN0 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C0MB24_TS,CAN0 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C0MB23_DLC,CAN0 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C0MB23_D0,CAN0 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C0MB23_D1,CAN0 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C0MB23_D2,CAN0 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C0MB23_D3,CAN0 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C0MB23_D4,CAN0 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C0MB23_D5,CAN0 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C0MB23_D6,CAN0 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C0MB23_D7,CAN0 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C0MB23_TS,CAN0 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C0MB22_DLC,CAN0 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C0MB22_D0,CAN0 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C0MB22_D1,CAN0 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C0MB22_D2,CAN0 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C0MB22_D3,CAN0 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C0MB22_D4,CAN0 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C0MB22_D5,CAN0 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C0MB22_D6,CAN0 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C0MB22_D7,CAN0 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C0MB22_TS,CAN0 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C0MB21_DLC,CAN0 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C0MB21_D0,CAN0 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C0MB21_D1,CAN0 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C0MB21_D2,CAN0 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C0MB21_D3,CAN0 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C0MB21_D4,CAN0 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C0MB21_D5,CAN0 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C0MB21_D6,CAN0 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C0MB21_D7,CAN0 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C0MB21_TS,CAN0 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C0MB20_DLC,CAN0 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C0MB20_D0,CAN0 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C0MB20_D1,CAN0 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C0MB20_D2,CAN0 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C0MB20_D3,CAN0 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C0MB20_D4,CAN0 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C0MB20_D5,CAN0 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C0MB20_D6,CAN0 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C0MB20_D7,CAN0 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C0MB20_TS,CAN0 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C0MB19_DLC,CAN0 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C0MB19_D0,CAN0 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C0MB19_D1,CAN0 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C0MB19_D2,CAN0 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C0MB19_D3,CAN0 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C0MB19_D4,CAN0 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C0MB19_D5,CAN0 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C0MB19_D6,CAN0 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C0MB19_D7,CAN0 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C0MB19_TS,CAN0 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C0MB18_DLC,CAN0 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C0MB18_D0,CAN0 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C0MB18_D1,CAN0 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C0MB18_D2,CAN0 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C0MB18_D3,CAN0 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C0MB18_D4,CAN0 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C0MB18_D5,CAN0 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C0MB18_D6,CAN0 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C0MB18_D7,CAN0 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C0MB18_TS,CAN0 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C0MB17_DLC,CAN0 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C0MB17_D0,CAN0 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C0MB17_D1,CAN0 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C0MB17_D2,CAN0 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C0MB17_D3,CAN0 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C0MB17_D4,CAN0 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C0MB17_D5,CAN0 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C0MB17_D6,CAN0 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C0MB17_D7,CAN0 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C0MB17_TS,CAN0 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C0MB16_DLC,CAN0 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C0MB16_D0,CAN0 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C0MB16_D1,CAN0 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C0MB16_D2,CAN0 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C0MB16_D3,CAN0 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C0MB16_D4,CAN0 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C0MB16_D5,CAN0 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C0MB16_D6,CAN0 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C0MB16_D7,CAN0 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C0MB16_TS,CAN0 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C0MB15_DLC,CAN0 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C0MB15_D0,CAN0 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C0MB15_D1,CAN0 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C0MB15_D2,CAN0 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C0MB15_D3,CAN0 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C0MB15_D4,CAN0 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C0MB15_D5,CAN0 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C0MB15_D6,CAN0 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C0MB15_D7,CAN0 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C0MB15_TS,CAN0 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C0MB14_DLC,CAN0 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C0MB14_D0,CAN0 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C0MB14_D1,CAN0 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C0MB14_D2,CAN0 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C0MB14_D3,CAN0 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C0MB14_D4,CAN0 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C0MB14_D5,CAN0 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C0MB14_D6,CAN0 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C0MB14_D7,CAN0 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C0MB14_TS,CAN0 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C0MB13_DLC,CAN0 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C0MB13_D0,CAN0 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C0MB13_D1,CAN0 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C0MB13_D2,CAN0 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C0MB13_D3,CAN0 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C0MB13_D4,CAN0 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C0MB13_D5,CAN0 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C0MB13_D6,CAN0 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C0MB13_D7,CAN0 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C0MB13_TS,CAN0 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C0MB12_DLC,CAN0 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C0MB12_D0,CAN0 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C0MB12_D1,CAN0 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C0MB12_D2,CAN0 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C0MB12_D3,CAN0 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C0MB12_D4,CAN0 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C0MB12_D5,CAN0 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C0MB12_D6,CAN0 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C0MB12_D7,CAN0 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C0MB12_TS,CAN0 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C0MB11_DLC,CAN0 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C0MB11_D0,CAN0 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C0MB11_D1,CAN0 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C0MB11_D2,CAN0 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C0MB11_D3,CAN0 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C0MB11_D4,CAN0 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C0MB11_D5,CAN0 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C0MB11_D6,CAN0 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C0MB11_D7,CAN0 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C0MB11_TS,CAN0 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C0MB10_DLC,CAN0 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C0MB10_D0,CAN0 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C0MB10_D1,CAN0 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C0MB10_D2,CAN0 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C0MB10_D3,CAN0 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C0MB10_D4,CAN0 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C0MB10_D5,CAN0 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C0MB10_D6,CAN0 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C0MB10_D7,CAN0 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C0MB10_TS,CAN0 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C0MB9_DLC,CAN0 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C0MB9_D0,CAN0 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C0MB9_D1,CAN0 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C0MB9_D2,CAN0 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C0MB9_D3,CAN0 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C0MB9_D4,CAN0 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C0MB9_D5,CAN0 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C0MB9_D6,CAN0 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C0MB9_D7,CAN0 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C0MB9_TS,CAN0 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C0MB8_DLC,CAN0 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C0MB8_D0,CAN0 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C0MB8_D1,CAN0 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C0MB8_D2,CAN0 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C0MB8_D3,CAN0 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C0MB8_D4,CAN0 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C0MB8_D5,CAN0 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C0MB8_D6,CAN0 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C0MB8_D7,CAN0 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C0MB8_TS,CAN0 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C0MB7_DLC,CAN0 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C0MB7_D0,CAN0 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C0MB7_D1,CAN0 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C0MB7_D2,CAN0 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C0MB7_D3,CAN0 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C0MB7_D4,CAN0 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C0MB7_D5,CAN0 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C0MB7_D6,CAN0 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C0MB7_D7,CAN0 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C0MB7_TS,CAN0 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C0MB6_DLC,CAN0 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C0MB6_D0,CAN0 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C0MB6_D1,CAN0 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C0MB6_D2,CAN0 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C0MB6_D3,CAN0 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C0MB6_D4,CAN0 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C0MB6_D5,CAN0 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C0MB6_D6,CAN0 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C0MB6_D7,CAN0 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C0MB6_TS,CAN0 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C0MB5_DLC,CAN0 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C0MB5_D0,CAN0 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C0MB5_D1,CAN0 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C0MB5_D2,CAN0 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C0MB5_D3,CAN0 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C0MB5_D4,CAN0 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C0MB5_D5,CAN0 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C0MB5_D6,CAN0 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C0MB5_D7,CAN0 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C0MB5_TS,CAN0 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C0MB4_DLC,CAN0 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C0MB4_D0,CAN0 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C0MB4_D1,CAN0 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C0MB4_D2,CAN0 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C0MB4_D3,CAN0 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C0MB4_D4,CAN0 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C0MB4_D5,CAN0 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C0MB4_D6,CAN0 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C0MB4_D7,CAN0 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C0MB4_TS,CAN0 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C0MB3_DLC,CAN0 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C0MB3_D0,CAN0 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C0MB3_D1,CAN0 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C0MB3_D2,CAN0 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C0MB3_D3,CAN0 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C0MB3_D4,CAN0 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C0MB3_D5,CAN0 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C0MB3_D6,CAN0 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C0MB3_D7,CAN0 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C0MB3_TS,CAN0 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C0MB2_DLC,CAN0 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C0MB2_D0,CAN0 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C0MB2_D1,CAN0 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C0MB2_D2,CAN0 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C0MB2_D3,CAN0 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C0MB2_D4,CAN0 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C0MB2_D5,CAN0 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C0MB2_D6,CAN0 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C0MB2_D7,CAN0 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C0MB2_TS,CAN0 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C0MB1_DLC,CAN0 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C0MB1_D0,CAN0 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C0MB1_D1,CAN0 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C0MB1_D2,CAN0 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C0MB1_D3,CAN0 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C0MB1_D4,CAN0 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C0MB1_D5,CAN0 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C0MB1_D6,CAN0 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C0MB1_D7,CAN0 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C0MB1_TS,CAN0 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C0MB0_DLC,CAN0 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C0MB0_D0,CAN0 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C0MB0_D1,CAN0 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C0MB0_D2,CAN0 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C0MB0_D3,CAN0 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C0MB0_D4,CAN0 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C0MB0_D5,CAN0 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C0MB0_D6,CAN0 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C0MB0_D7,CAN0 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C0MB0_TS,CAN0 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end if (((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C0MIER1,CAN0 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42c++0x03 line.long 0x0 "C0MR1,CAN0 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C0MIER0,CAN0 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree "Message Control Registers" if (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" endif if (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" endif if (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" endif if (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" endif if (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" endif if (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" endif if (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" endif if (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" endif if (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C0MCTL31,CAN0 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C0MCTL30,CAN0 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C0MCTL29,CAN0 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C0MCTL28,CAN0 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C0MCTL27,CAN0 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C0MCTL26,CAN0 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C0MCTL25,CAN0 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C0MCTL24,CAN0 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C0MCTL23,CAN0 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C0MCTL22,CAN0 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C0MCTL21,CAN0 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C0MCTL20,CAN0 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C0MCTL19,CAN0 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C0MCTL18,CAN0 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C0MCTL17,CAN0 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C0MCTL16,CAN0 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C0MCTL15,CAN0 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C0MCTL14,CAN0 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C0MCTL13,CAN0 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C0MCTL12,CAN0 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C0MCTL11,CAN0 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C0MCTL10,CAN0 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C0MCTL9,CAN0 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C0MCTL8,CAN0 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C0MCTL7,CAN0 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C0MCTL6,CAN0 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C0MCTL5,CAN0 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C0MCTL4,CAN0 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C0MCTL3,CAN0 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C0MCTL2,CAN0 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C0MCTL1,CAN0 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C0MCTL0,CAN0 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end group.byte 0x848++0x0 line.byte 0x0 "C0RFCR,CAN0 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not warning,Warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C0TFCR,CAN0 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C0STR,CAN0 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not bus-off,Bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not error-passive,Error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not CAN sleep,CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not CAN halt,CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not CAN reset,CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" wgroup.byte 0x851++0x00 line.byte 0x0 "C0CSSR,CAN0 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C0MSSR,CAN0 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C0MSMR,CAN0 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C0AFSR,CAN0 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C0EIER,CAN0 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0EIFR,CAN0 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C0RECR,CAN0 Receive Error Count Register" line.byte 0x1 "C0TECR,CAN0 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C0ECSR,CAN0 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C0TSR,CAN0 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C0TCR,CAN0 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C0IER,CAN0 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0ISR,CAN0 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C0MBSMR,CAN0 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" sif cpu()=="R8A7792X" group.byte 0x85C++0x00 line.byte 0x00 "C0PECR,CAN0 Parity Error Control Register" bitfld.byte 0x00 7. " PF ,Parity Error Flag" "No error,Error" bitfld.byte 0x00 2. " PIE ,Parity Error Interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " PME ,Parity Enable Bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PM ,Parity Mode" "Operation Mode,Halt mode" group.word 0x85E++0x01 line.word 0x00 "C0PEACR,CAN0 Parity Error Address Capture Register" hexmask.word 0x00 0.--10. 1. " PA ,Parity Error Captured Address Bits" endif width 0xb tree.end tree "Channel 1" base ad:0xE6E88000 width 12. group.word 0x840++0x01 line.word 0x00 "C1CTLR,CAN1 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" textline " " bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C1CLKR,CAN1 Clock Select Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X") bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" else bitfld.byte 0x00 0. " CCLKS ,CAN Clock Source Select" "Peripheral,Main" endif group.long 0x844++0x03 line.long 0x00 "C1BCR,CAN1 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" if (((per.w(ad:0xE6E88000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C1MKR0,CAN1 Mask Register 0" hide.long 0x4 "C1MKR1,CAN1 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C1MKR2,CAN1 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C1MKR3,CAN1 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C1MKR4,CAN1 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C1MKR5,CAN1 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C1MKR6,CAN1 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C1MKR7,CAN1 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C1MKR8,CAN1 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C1MKR9,CAN1 Mask Register 9" endif if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C1MKIVLR1,CAN1 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C1MKIVLR0,CAN1 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV0 ,Mask valid for mailbox 0" "Valid,Invalid" tree "CAN Mailboxes registers" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C1MB63_DLC,CAN1 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C1MB63_D0,CAN1 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C1MB63_D1,CAN1 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C1MB63_D2,CAN1 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C1MB63_D3,CAN1 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C1MB63_D4,CAN1 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C1MB63_D5,CAN1 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C1MB63_D6,CAN1 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C1MB63_D7,CAN1 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C1MB63_TS,CAN1 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C1MB62_DLC,CAN1 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C1MB62_D0,CAN1 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C1MB62_D1,CAN1 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C1MB62_D2,CAN1 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C1MB62_D3,CAN1 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C1MB62_D4,CAN1 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C1MB62_D5,CAN1 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C1MB62_D6,CAN1 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C1MB62_D7,CAN1 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C1MB62_TS,CAN1 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C1MB61_DLC,CAN1 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C1MB61_D0,CAN1 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C1MB61_D1,CAN1 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C1MB61_D2,CAN1 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C1MB61_D3,CAN1 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C1MB61_D4,CAN1 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C1MB61_D5,CAN1 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C1MB61_D6,CAN1 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C1MB61_D7,CAN1 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C1MB61_TS,CAN1 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C1MB60_DLC,CAN1 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C1MB60_D0,CAN1 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C1MB60_D1,CAN1 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C1MB60_D2,CAN1 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C1MB60_D3,CAN1 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C1MB60_D4,CAN1 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C1MB60_D5,CAN1 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C1MB60_D6,CAN1 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C1MB60_D7,CAN1 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C1MB60_TS,CAN1 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C1MB59_DLC,CAN1 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C1MB59_D0,CAN1 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C1MB59_D1,CAN1 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C1MB59_D2,CAN1 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C1MB59_D3,CAN1 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C1MB59_D4,CAN1 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C1MB59_D5,CAN1 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C1MB59_D6,CAN1 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C1MB59_D7,CAN1 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C1MB59_TS,CAN1 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C1MB58_DLC,CAN1 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C1MB58_D0,CAN1 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C1MB58_D1,CAN1 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C1MB58_D2,CAN1 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C1MB58_D3,CAN1 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C1MB58_D4,CAN1 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C1MB58_D5,CAN1 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C1MB58_D6,CAN1 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C1MB58_D7,CAN1 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C1MB58_TS,CAN1 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C1MB57_DLC,CAN1 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C1MB57_D0,CAN1 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C1MB57_D1,CAN1 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C1MB57_D2,CAN1 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C1MB57_D3,CAN1 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C1MB57_D4,CAN1 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C1MB57_D5,CAN1 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C1MB57_D6,CAN1 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C1MB57_D7,CAN1 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C1MB57_TS,CAN1 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C1MB56_DLC,CAN1 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C1MB56_D0,CAN1 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C1MB56_D1,CAN1 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C1MB56_D2,CAN1 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C1MB56_D3,CAN1 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C1MB56_D4,CAN1 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C1MB56_D5,CAN1 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C1MB56_D6,CAN1 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C1MB56_D7,CAN1 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C1MB56_TS,CAN1 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C1MB55_DLC,CAN1 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C1MB55_D0,CAN1 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C1MB55_D1,CAN1 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C1MB55_D2,CAN1 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C1MB55_D3,CAN1 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C1MB55_D4,CAN1 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C1MB55_D5,CAN1 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C1MB55_D6,CAN1 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C1MB55_D7,CAN1 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C1MB55_TS,CAN1 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C1MB54_DLC,CAN1 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C1MB54_D0,CAN1 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C1MB54_D1,CAN1 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C1MB54_D2,CAN1 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C1MB54_D3,CAN1 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C1MB54_D4,CAN1 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C1MB54_D5,CAN1 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C1MB54_D6,CAN1 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C1MB54_D7,CAN1 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C1MB54_TS,CAN1 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C1MB53_DLC,CAN1 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C1MB53_D0,CAN1 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C1MB53_D1,CAN1 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C1MB53_D2,CAN1 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C1MB53_D3,CAN1 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C1MB53_D4,CAN1 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C1MB53_D5,CAN1 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C1MB53_D6,CAN1 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C1MB53_D7,CAN1 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C1MB53_TS,CAN1 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C1MB52_DLC,CAN1 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C1MB52_D0,CAN1 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C1MB52_D1,CAN1 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C1MB52_D2,CAN1 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C1MB52_D3,CAN1 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C1MB52_D4,CAN1 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C1MB52_D5,CAN1 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C1MB52_D6,CAN1 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C1MB52_D7,CAN1 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C1MB52_TS,CAN1 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C1MB51_DLC,CAN1 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C1MB51_D0,CAN1 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C1MB51_D1,CAN1 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C1MB51_D2,CAN1 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C1MB51_D3,CAN1 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C1MB51_D4,CAN1 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C1MB51_D5,CAN1 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C1MB51_D6,CAN1 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C1MB51_D7,CAN1 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C1MB51_TS,CAN1 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C1MB50_DLC,CAN1 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C1MB50_D0,CAN1 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C1MB50_D1,CAN1 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C1MB50_D2,CAN1 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C1MB50_D3,CAN1 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C1MB50_D4,CAN1 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C1MB50_D5,CAN1 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C1MB50_D6,CAN1 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C1MB50_D7,CAN1 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C1MB50_TS,CAN1 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C1MB49_DLC,CAN1 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C1MB49_D0,CAN1 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C1MB49_D1,CAN1 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C1MB49_D2,CAN1 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C1MB49_D3,CAN1 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C1MB49_D4,CAN1 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C1MB49_D5,CAN1 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C1MB49_D6,CAN1 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C1MB49_D7,CAN1 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C1MB49_TS,CAN1 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C1MB48_DLC,CAN1 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C1MB48_D0,CAN1 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C1MB48_D1,CAN1 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C1MB48_D2,CAN1 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C1MB48_D3,CAN1 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C1MB48_D4,CAN1 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C1MB48_D5,CAN1 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C1MB48_D6,CAN1 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C1MB48_D7,CAN1 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C1MB48_TS,CAN1 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C1MB47_DLC,CAN1 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C1MB47_D0,CAN1 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C1MB47_D1,CAN1 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C1MB47_D2,CAN1 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C1MB47_D3,CAN1 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C1MB47_D4,CAN1 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C1MB47_D5,CAN1 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C1MB47_D6,CAN1 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C1MB47_D7,CAN1 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C1MB47_TS,CAN1 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C1MB46_DLC,CAN1 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C1MB46_D0,CAN1 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C1MB46_D1,CAN1 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C1MB46_D2,CAN1 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C1MB46_D3,CAN1 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C1MB46_D4,CAN1 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C1MB46_D5,CAN1 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C1MB46_D6,CAN1 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C1MB46_D7,CAN1 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C1MB46_TS,CAN1 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C1MB45_DLC,CAN1 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C1MB45_D0,CAN1 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C1MB45_D1,CAN1 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C1MB45_D2,CAN1 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C1MB45_D3,CAN1 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C1MB45_D4,CAN1 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C1MB45_D5,CAN1 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C1MB45_D6,CAN1 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C1MB45_D7,CAN1 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C1MB45_TS,CAN1 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C1MB44_DLC,CAN1 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C1MB44_D0,CAN1 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C1MB44_D1,CAN1 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C1MB44_D2,CAN1 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C1MB44_D3,CAN1 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C1MB44_D4,CAN1 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C1MB44_D5,CAN1 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C1MB44_D6,CAN1 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C1MB44_D7,CAN1 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C1MB44_TS,CAN1 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C1MB43_DLC,CAN1 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C1MB43_D0,CAN1 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C1MB43_D1,CAN1 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C1MB43_D2,CAN1 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C1MB43_D3,CAN1 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C1MB43_D4,CAN1 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C1MB43_D5,CAN1 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C1MB43_D6,CAN1 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C1MB43_D7,CAN1 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C1MB43_TS,CAN1 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C1MB42_DLC,CAN1 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C1MB42_D0,CAN1 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C1MB42_D1,CAN1 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C1MB42_D2,CAN1 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C1MB42_D3,CAN1 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C1MB42_D4,CAN1 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C1MB42_D5,CAN1 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C1MB42_D6,CAN1 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C1MB42_D7,CAN1 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C1MB42_TS,CAN1 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C1MB41_DLC,CAN1 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C1MB41_D0,CAN1 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C1MB41_D1,CAN1 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C1MB41_D2,CAN1 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C1MB41_D3,CAN1 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C1MB41_D4,CAN1 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C1MB41_D5,CAN1 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C1MB41_D6,CAN1 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C1MB41_D7,CAN1 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C1MB41_TS,CAN1 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C1MB40_DLC,CAN1 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C1MB40_D0,CAN1 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C1MB40_D1,CAN1 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C1MB40_D2,CAN1 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C1MB40_D3,CAN1 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C1MB40_D4,CAN1 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C1MB40_D5,CAN1 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C1MB40_D6,CAN1 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C1MB40_D7,CAN1 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C1MB40_TS,CAN1 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C1MB39_DLC,CAN1 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C1MB39_D0,CAN1 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C1MB39_D1,CAN1 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C1MB39_D2,CAN1 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C1MB39_D3,CAN1 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C1MB39_D4,CAN1 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C1MB39_D5,CAN1 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C1MB39_D6,CAN1 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C1MB39_D7,CAN1 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C1MB39_TS,CAN1 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C1MB38_DLC,CAN1 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C1MB38_D0,CAN1 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C1MB38_D1,CAN1 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C1MB38_D2,CAN1 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C1MB38_D3,CAN1 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C1MB38_D4,CAN1 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C1MB38_D5,CAN1 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C1MB38_D6,CAN1 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C1MB38_D7,CAN1 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C1MB38_TS,CAN1 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C1MB37_DLC,CAN1 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C1MB37_D0,CAN1 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C1MB37_D1,CAN1 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C1MB37_D2,CAN1 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C1MB37_D3,CAN1 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C1MB37_D4,CAN1 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C1MB37_D5,CAN1 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C1MB37_D6,CAN1 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C1MB37_D7,CAN1 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C1MB37_TS,CAN1 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C1MB36_DLC,CAN1 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C1MB36_D0,CAN1 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C1MB36_D1,CAN1 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C1MB36_D2,CAN1 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C1MB36_D3,CAN1 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C1MB36_D4,CAN1 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C1MB36_D5,CAN1 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C1MB36_D6,CAN1 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C1MB36_D7,CAN1 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C1MB36_TS,CAN1 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C1MB35_DLC,CAN1 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C1MB35_D0,CAN1 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C1MB35_D1,CAN1 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C1MB35_D2,CAN1 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C1MB35_D3,CAN1 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C1MB35_D4,CAN1 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C1MB35_D5,CAN1 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C1MB35_D6,CAN1 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C1MB35_D7,CAN1 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C1MB35_TS,CAN1 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C1MB34_DLC,CAN1 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C1MB34_D0,CAN1 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C1MB34_D1,CAN1 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C1MB34_D2,CAN1 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C1MB34_D3,CAN1 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C1MB34_D4,CAN1 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C1MB34_D5,CAN1 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C1MB34_D6,CAN1 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C1MB34_D7,CAN1 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C1MB34_TS,CAN1 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C1MB33_DLC,CAN1 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C1MB33_D0,CAN1 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C1MB33_D1,CAN1 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C1MB33_D2,CAN1 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C1MB33_D3,CAN1 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C1MB33_D4,CAN1 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C1MB33_D5,CAN1 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C1MB33_D6,CAN1 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C1MB33_D7,CAN1 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C1MB33_TS,CAN1 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C1MB32_DLC,CAN1 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C1MB32_D0,CAN1 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C1MB32_D1,CAN1 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C1MB32_D2,CAN1 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C1MB32_D3,CAN1 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C1MB32_D4,CAN1 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C1MB32_D5,CAN1 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C1MB32_D6,CAN1 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C1MB32_D7,CAN1 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C1MB32_TS,CAN1 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C1MB31_DLC,CAN1 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C1MB31_D0,CAN1 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C1MB31_D1,CAN1 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C1MB31_D2,CAN1 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C1MB31_D3,CAN1 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C1MB31_D4,CAN1 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C1MB31_D5,CAN1 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C1MB31_D6,CAN1 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C1MB31_D7,CAN1 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C1MB31_TS,CAN1 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C1MB30_DLC,CAN1 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C1MB30_D0,CAN1 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C1MB30_D1,CAN1 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C1MB30_D2,CAN1 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C1MB30_D3,CAN1 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C1MB30_D4,CAN1 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C1MB30_D5,CAN1 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C1MB30_D6,CAN1 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C1MB30_D7,CAN1 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C1MB30_TS,CAN1 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C1MB29_DLC,CAN1 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C1MB29_D0,CAN1 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C1MB29_D1,CAN1 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C1MB29_D2,CAN1 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C1MB29_D3,CAN1 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C1MB29_D4,CAN1 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C1MB29_D5,CAN1 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C1MB29_D6,CAN1 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C1MB29_D7,CAN1 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C1MB29_TS,CAN1 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C1MB28_DLC,CAN1 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C1MB28_D0,CAN1 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C1MB28_D1,CAN1 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C1MB28_D2,CAN1 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C1MB28_D3,CAN1 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C1MB28_D4,CAN1 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C1MB28_D5,CAN1 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C1MB28_D6,CAN1 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C1MB28_D7,CAN1 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C1MB28_TS,CAN1 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C1MB27_DLC,CAN1 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C1MB27_D0,CAN1 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C1MB27_D1,CAN1 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C1MB27_D2,CAN1 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C1MB27_D3,CAN1 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C1MB27_D4,CAN1 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C1MB27_D5,CAN1 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C1MB27_D6,CAN1 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C1MB27_D7,CAN1 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C1MB27_TS,CAN1 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C1MB26_DLC,CAN1 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C1MB26_D0,CAN1 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C1MB26_D1,CAN1 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C1MB26_D2,CAN1 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C1MB26_D3,CAN1 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C1MB26_D4,CAN1 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C1MB26_D5,CAN1 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C1MB26_D6,CAN1 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C1MB26_D7,CAN1 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C1MB26_TS,CAN1 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C1MB25_DLC,CAN1 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C1MB25_D0,CAN1 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C1MB25_D1,CAN1 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C1MB25_D2,CAN1 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C1MB25_D3,CAN1 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C1MB25_D4,CAN1 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C1MB25_D5,CAN1 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C1MB25_D6,CAN1 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C1MB25_D7,CAN1 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C1MB25_TS,CAN1 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C1MB24_DLC,CAN1 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C1MB24_D0,CAN1 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C1MB24_D1,CAN1 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C1MB24_D2,CAN1 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C1MB24_D3,CAN1 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C1MB24_D4,CAN1 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C1MB24_D5,CAN1 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C1MB24_D6,CAN1 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C1MB24_D7,CAN1 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C1MB24_TS,CAN1 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C1MB23_DLC,CAN1 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C1MB23_D0,CAN1 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C1MB23_D1,CAN1 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C1MB23_D2,CAN1 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C1MB23_D3,CAN1 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C1MB23_D4,CAN1 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C1MB23_D5,CAN1 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C1MB23_D6,CAN1 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C1MB23_D7,CAN1 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C1MB23_TS,CAN1 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C1MB22_DLC,CAN1 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C1MB22_D0,CAN1 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C1MB22_D1,CAN1 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C1MB22_D2,CAN1 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C1MB22_D3,CAN1 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C1MB22_D4,CAN1 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C1MB22_D5,CAN1 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C1MB22_D6,CAN1 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C1MB22_D7,CAN1 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C1MB22_TS,CAN1 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C1MB21_DLC,CAN1 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C1MB21_D0,CAN1 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C1MB21_D1,CAN1 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C1MB21_D2,CAN1 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C1MB21_D3,CAN1 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C1MB21_D4,CAN1 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C1MB21_D5,CAN1 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C1MB21_D6,CAN1 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C1MB21_D7,CAN1 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C1MB21_TS,CAN1 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C1MB20_DLC,CAN1 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C1MB20_D0,CAN1 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C1MB20_D1,CAN1 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C1MB20_D2,CAN1 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C1MB20_D3,CAN1 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C1MB20_D4,CAN1 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C1MB20_D5,CAN1 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C1MB20_D6,CAN1 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C1MB20_D7,CAN1 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C1MB20_TS,CAN1 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C1MB19_DLC,CAN1 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C1MB19_D0,CAN1 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C1MB19_D1,CAN1 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C1MB19_D2,CAN1 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C1MB19_D3,CAN1 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C1MB19_D4,CAN1 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C1MB19_D5,CAN1 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C1MB19_D6,CAN1 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C1MB19_D7,CAN1 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C1MB19_TS,CAN1 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C1MB18_DLC,CAN1 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C1MB18_D0,CAN1 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C1MB18_D1,CAN1 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C1MB18_D2,CAN1 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C1MB18_D3,CAN1 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C1MB18_D4,CAN1 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C1MB18_D5,CAN1 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C1MB18_D6,CAN1 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C1MB18_D7,CAN1 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C1MB18_TS,CAN1 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C1MB17_DLC,CAN1 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C1MB17_D0,CAN1 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C1MB17_D1,CAN1 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C1MB17_D2,CAN1 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C1MB17_D3,CAN1 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C1MB17_D4,CAN1 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C1MB17_D5,CAN1 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C1MB17_D6,CAN1 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C1MB17_D7,CAN1 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C1MB17_TS,CAN1 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C1MB16_DLC,CAN1 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C1MB16_D0,CAN1 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C1MB16_D1,CAN1 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C1MB16_D2,CAN1 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C1MB16_D3,CAN1 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C1MB16_D4,CAN1 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C1MB16_D5,CAN1 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C1MB16_D6,CAN1 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C1MB16_D7,CAN1 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C1MB16_TS,CAN1 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C1MB15_DLC,CAN1 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C1MB15_D0,CAN1 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C1MB15_D1,CAN1 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C1MB15_D2,CAN1 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C1MB15_D3,CAN1 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C1MB15_D4,CAN1 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C1MB15_D5,CAN1 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C1MB15_D6,CAN1 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C1MB15_D7,CAN1 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C1MB15_TS,CAN1 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C1MB14_DLC,CAN1 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C1MB14_D0,CAN1 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C1MB14_D1,CAN1 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C1MB14_D2,CAN1 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C1MB14_D3,CAN1 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C1MB14_D4,CAN1 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C1MB14_D5,CAN1 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C1MB14_D6,CAN1 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C1MB14_D7,CAN1 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C1MB14_TS,CAN1 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C1MB13_DLC,CAN1 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C1MB13_D0,CAN1 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C1MB13_D1,CAN1 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C1MB13_D2,CAN1 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C1MB13_D3,CAN1 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C1MB13_D4,CAN1 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C1MB13_D5,CAN1 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C1MB13_D6,CAN1 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C1MB13_D7,CAN1 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C1MB13_TS,CAN1 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C1MB12_DLC,CAN1 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C1MB12_D0,CAN1 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C1MB12_D1,CAN1 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C1MB12_D2,CAN1 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C1MB12_D3,CAN1 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C1MB12_D4,CAN1 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C1MB12_D5,CAN1 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C1MB12_D6,CAN1 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C1MB12_D7,CAN1 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C1MB12_TS,CAN1 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C1MB11_DLC,CAN1 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C1MB11_D0,CAN1 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C1MB11_D1,CAN1 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C1MB11_D2,CAN1 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C1MB11_D3,CAN1 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C1MB11_D4,CAN1 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C1MB11_D5,CAN1 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C1MB11_D6,CAN1 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C1MB11_D7,CAN1 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C1MB11_TS,CAN1 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C1MB10_DLC,CAN1 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C1MB10_D0,CAN1 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C1MB10_D1,CAN1 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C1MB10_D2,CAN1 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C1MB10_D3,CAN1 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C1MB10_D4,CAN1 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C1MB10_D5,CAN1 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C1MB10_D6,CAN1 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C1MB10_D7,CAN1 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C1MB10_TS,CAN1 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C1MB9_DLC,CAN1 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C1MB9_D0,CAN1 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C1MB9_D1,CAN1 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C1MB9_D2,CAN1 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C1MB9_D3,CAN1 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C1MB9_D4,CAN1 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C1MB9_D5,CAN1 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C1MB9_D6,CAN1 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C1MB9_D7,CAN1 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C1MB9_TS,CAN1 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C1MB8_DLC,CAN1 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C1MB8_D0,CAN1 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C1MB8_D1,CAN1 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C1MB8_D2,CAN1 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C1MB8_D3,CAN1 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C1MB8_D4,CAN1 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C1MB8_D5,CAN1 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C1MB8_D6,CAN1 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C1MB8_D7,CAN1 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C1MB8_TS,CAN1 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C1MB7_DLC,CAN1 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C1MB7_D0,CAN1 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C1MB7_D1,CAN1 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C1MB7_D2,CAN1 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C1MB7_D3,CAN1 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C1MB7_D4,CAN1 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C1MB7_D5,CAN1 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C1MB7_D6,CAN1 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C1MB7_D7,CAN1 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C1MB7_TS,CAN1 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C1MB6_DLC,CAN1 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C1MB6_D0,CAN1 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C1MB6_D1,CAN1 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C1MB6_D2,CAN1 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C1MB6_D3,CAN1 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C1MB6_D4,CAN1 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C1MB6_D5,CAN1 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C1MB6_D6,CAN1 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C1MB6_D7,CAN1 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C1MB6_TS,CAN1 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C1MB5_DLC,CAN1 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C1MB5_D0,CAN1 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C1MB5_D1,CAN1 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C1MB5_D2,CAN1 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C1MB5_D3,CAN1 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C1MB5_D4,CAN1 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C1MB5_D5,CAN1 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C1MB5_D6,CAN1 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C1MB5_D7,CAN1 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C1MB5_TS,CAN1 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C1MB4_DLC,CAN1 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C1MB4_D0,CAN1 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C1MB4_D1,CAN1 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C1MB4_D2,CAN1 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C1MB4_D3,CAN1 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C1MB4_D4,CAN1 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C1MB4_D5,CAN1 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C1MB4_D6,CAN1 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C1MB4_D7,CAN1 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C1MB4_TS,CAN1 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C1MB3_DLC,CAN1 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C1MB3_D0,CAN1 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C1MB3_D1,CAN1 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C1MB3_D2,CAN1 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C1MB3_D3,CAN1 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C1MB3_D4,CAN1 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C1MB3_D5,CAN1 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C1MB3_D6,CAN1 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C1MB3_D7,CAN1 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C1MB3_TS,CAN1 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C1MB2_DLC,CAN1 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C1MB2_D0,CAN1 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C1MB2_D1,CAN1 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C1MB2_D2,CAN1 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C1MB2_D3,CAN1 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C1MB2_D4,CAN1 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C1MB2_D5,CAN1 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C1MB2_D6,CAN1 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C1MB2_D7,CAN1 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C1MB2_TS,CAN1 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C1MB1_DLC,CAN1 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C1MB1_D0,CAN1 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C1MB1_D1,CAN1 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C1MB1_D2,CAN1 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C1MB1_D3,CAN1 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C1MB1_D4,CAN1 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C1MB1_D5,CAN1 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C1MB1_D6,CAN1 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C1MB1_D7,CAN1 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C1MB1_TS,CAN1 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C1MB0_DLC,CAN1 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C1MB0_D0,CAN1 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C1MB0_D1,CAN1 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C1MB0_D2,CAN1 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C1MB0_D3,CAN1 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C1MB0_D4,CAN1 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C1MB0_D5,CAN1 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C1MB0_D6,CAN1 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C1MB0_D7,CAN1 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C1MB0_TS,CAN1 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end if (((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C1MIER1,CAN1 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42c++0x03 line.long 0x0 "C1MR1,CAN1 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C1MIER0,CAN1 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree "Message Control Registers" if (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" endif if (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" endif if (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" endif if (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" endif if (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" endif if (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" endif if (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" endif if (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" endif if (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C1MCTL31,CAN1 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C1MCTL30,CAN1 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C1MCTL29,CAN1 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C1MCTL28,CAN1 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C1MCTL27,CAN1 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C1MCTL26,CAN1 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C1MCTL25,CAN1 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C1MCTL24,CAN1 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C1MCTL23,CAN1 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C1MCTL22,CAN1 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C1MCTL21,CAN1 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C1MCTL20,CAN1 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C1MCTL19,CAN1 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C1MCTL18,CAN1 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C1MCTL17,CAN1 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C1MCTL16,CAN1 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C1MCTL15,CAN1 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C1MCTL14,CAN1 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C1MCTL13,CAN1 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C1MCTL12,CAN1 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C1MCTL11,CAN1 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C1MCTL10,CAN1 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C1MCTL9,CAN1 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C1MCTL8,CAN1 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C1MCTL7,CAN1 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C1MCTL6,CAN1 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C1MCTL5,CAN1 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C1MCTL4,CAN1 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C1MCTL3,CAN1 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C1MCTL2,CAN1 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C1MCTL1,CAN1 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C1MCTL0,CAN1 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end group.byte 0x848++0x0 line.byte 0x0 "C1RFCR,CAN1 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not warning,Warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C1TFCR,CAN1 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C1STR,CAN1 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not bus-off,Bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not error-passive,Error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not CAN sleep,CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not CAN halt,CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not CAN reset,CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" wgroup.byte 0x851++0x00 line.byte 0x0 "C1CSSR,CAN1 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C1MSSR,CAN1 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C1MSMR,CAN1 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C1AFSR,CAN1 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C1EIER,CAN1 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1EIFR,CAN1 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C1RECR,CAN1 Receive Error Count Register" line.byte 0x1 "C1TECR,CAN1 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C1ECSR,CAN1 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C1TSR,CAN1 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C1TCR,CAN1 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C1IER,CAN1 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1ISR,CAN1 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C1MBSMR,CAN1 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" sif cpu()=="R8A7792X" group.byte 0x85C++0x00 line.byte 0x00 "C1PECR,CAN1 Parity Error Control Register" bitfld.byte 0x00 7. " PF ,Parity Error Flag" "No error,Error" bitfld.byte 0x00 2. " PIE ,Parity Error Interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " PME ,Parity Enable Bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PM ,Parity Mode" "Operation Mode,Halt mode" group.word 0x85E++0x01 line.word 0x00 "C1PEACR,CAN1 Parity Error Address Capture Register" hexmask.word 0x00 0.--10. 1. " PA ,Parity Error Captured Address Bits" endif width 0xb tree.end tree.end tree.open "SCIF (Serial Communication Interface with FIFO)" tree "SCIF Channel 0" base ad:0xE6E60000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR0,Receive FIFO Data Register 0" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR0,Transmit FIFO Data Register 0" if (((per.w(ad:0xE6E60000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E60000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR0,Serial Control Register 0" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR0,Serial Control Register 0" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR0,Serial Status Register 0" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR0,Bit Rate Register 0" if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR0,FIFO Data Count Register 0" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR0,Serial Port Register 0" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR0,Line Status Register 0" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E60000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "SCIF Channel 1" base ad:0xE6E68000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR1,Receive FIFO Data Register 1" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR1,Transmit FIFO Data Register 1" if (((per.w(ad:0xE6E68000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E68000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR1,Serial Control Register 1" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR1,Serial Control Register 1" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR1,Serial Status Register 1" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR1,Bit Rate Register 1" if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR1,FIFO Data Count Register 1" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR1,Serial Port Register 1" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR1,Line Status Register 1" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E68000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "SCIF Channel 2" base ad:0xE6E58000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR2,Receive FIFO Data Register 2" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR2,Transmit FIFO Data Register 2" if (((per.w(ad:0xE6E58000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E58000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E58000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR2,Serial Control Register 2" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR2,Serial Control Register 2" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR2,Serial Status Register 2" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR2,Bit Rate Register 2" if (((per.w(ad:0xE6E58000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR2,FIFO Data Count Register 2" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR2,Serial Port Register 2" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR2,Line Status Register 2" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E58000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 2" line.word 0x00 "DL2,Frequency Division Register 2" group.word 0x34++0x01 line.word 0x00 "CKS2,Clock Select Register 2" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "SCIF Channel 3" base ad:0xE6EA8000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR3,Receive FIFO Data Register 3" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR3,Transmit FIFO Data Register 3" if (((per.w(ad:0xE6EA8000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6EA8000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6EA8000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR3,Serial Control Register 3" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR3,Serial Control Register 3" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR3,Serial Status Register 3" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR3,Bit Rate Register 3" if (((per.w(ad:0xE6EA8000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR3,FIFO Control Register 3" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR3,FIFO Control Register 3" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR3,FIFO Data Count Register 3" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR3,Serial Port Register 3" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR3,Line Status Register 3" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR3,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6EA8000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR3,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR3,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 3" line.word 0x00 "DL3,Frequency Division Register 3" group.word 0x34++0x01 line.word 0x00 "CKS3,Clock Select Register 3" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree.end tree.open "HSCIF (High Speed Serial Communication Interface with FIFO)" tree "Channel 0" base ad:0xE62C0000 width 11. hgroup.byte 0x14++0x00 hide.byte 0x00 "HSFRDR,Receive FIFO Data Register" in wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register" if (((per.w(ad:0xE62C0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2") rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " else bitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " endif bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1/0" "Internal/HSCK as input,Internal/HSCK as output,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "In progress,Ended" bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register" group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register" sif (cpuis("R8A77980*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470*")||(cpu()=="R8A77420*")||(cpu()=="R8A77430*")||(cpu()=="R8A77450*") hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data stored in HSFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data stored in HSFRDR" else hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data in SCFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data in SCFRDR" endif group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS port input/output" "Input,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS port data" "Low level,High level" bitfld.word 0x00 5. " CTSIO ,Serial port - CTS port input/output" "Input,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS port data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock port input/output" "Input,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock port data" "Low level,High level" bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Input,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register" bitfld.word 0x00 2. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register" bitfld.word 0x00 15. " SRE ,Sampling rate register enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling point register enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling point register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling rate register" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register" hexmask.word.byte 0x00 8.--14. 1. " PER[6:0] ,Parity error count" hexmask.word.byte 0x00 0.--6. 1. " FER[6:0] ,Framing error count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RSTRG[6:0] ,RTS output active trigger count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RTRG[6:0] ,Receive FIFO data count trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " TTRG[6:0] ,Transmit FIFO data count trigger" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77980*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77995*"))&&(!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" sif cpuis("R8A77470"*)||cpuis("R8A77951*")||cpuis("R8A77951-*")||cpuis("R8A77430*")||cpuis("R8A77440*") group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" elif cpuis("R8A77420*") group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" else group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "Channel 1" base ad:0xE62C8000 width 11. hgroup.byte 0x14++0x00 hide.byte 0x00 "HSFRDR,Receive FIFO Data Register" in wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register" if (((per.w(ad:0xE62C8000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2") rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " else bitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " endif bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1/0" "Internal/HSCK as input,Internal/HSCK as output,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "In progress,Ended" bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register" group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register" sif (cpuis("R8A77980*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470*")||(cpu()=="R8A77420*")||(cpu()=="R8A77430*")||(cpu()=="R8A77450*") hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data stored in HSFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data stored in HSFRDR" else hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data in SCFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data in SCFRDR" endif group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS port input/output" "Input,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS port data" "Low level,High level" bitfld.word 0x00 5. " CTSIO ,Serial port - CTS port input/output" "Input,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS port data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock port input/output" "Input,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock port data" "Low level,High level" bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Input,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register" bitfld.word 0x00 2. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register" bitfld.word 0x00 15. " SRE ,Sampling rate register enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling point register enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling point register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling rate register" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register" hexmask.word.byte 0x00 8.--14. 1. " PER[6:0] ,Parity error count" hexmask.word.byte 0x00 0.--6. 1. " FER[6:0] ,Framing error count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RSTRG[6:0] ,RTS output active trigger count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RTRG[6:0] ,Receive FIFO data count trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " TTRG[6:0] ,Transmit FIFO data count trigger" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77980*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77995*"))&&(!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" sif cpuis("R8A77470"*)||cpuis("R8A77951*")||cpuis("R8A77951-*")||cpuis("R8A77430*")||cpuis("R8A77440*") group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" elif cpuis("R8A77420*") group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" else group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree.end tree.open "I2C Bus Interface" tree "Channel 0" base ad:0xE6508000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 1" base ad:0xE6518000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 2" base ad:0xE6530000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 3" base ad:0xE6540000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 4" base ad:0xE6520000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 5" base ad:0xE6528000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree.end tree "IIC3 (IIC Bus Interface 3)" base ad:0xE60B0000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree.open "MSIOF (Clock-Synchronized Serial Interface with FIFO)" tree "MSIOF 0" base ad:0xE6E20000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 1" base ad:0xE6E10000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree.end tree "QSPI (Quad Serial Peripheral Interface)" base ad:0xE6B10000 width 9. group.byte 0x00++0x02 line.byte 0x00 "SPCR,Control Register" bitfld.byte 0x00 7. " SPRIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SPE ,SPI function enable" "Disabled,Enabled" bitfld.byte 0x00 5. " SPTIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " SPEIE ,Error interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " MSTR ,Master/slave mode select" "Slave,Master" sif (cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("RCARV2H")||(cpu()=="R8A77470")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77440") textline " " bitfld.byte 0x00 1. " WSWAP ,Word swap" "Not swapped,Swapped" bitfld.byte 0x00 0. " BSWAP ,Byte swap" "Not swapped,Swapped" endif line.byte 0x01 "SSLP,Slave Select Polarity Register" bitfld.byte 0x01 0. " SSLP ,SSL signal polarity setting" "Low,High" line.byte 0x02 "SPPCR,Pin Control Register" bitfld.byte 0x02 5. " MOIFE ,Master-mode output idle value fixing enable" "Disabled,Enabled" bitfld.byte 0x02 4. " MOIFV ,Master-mode output idle fixed value" "0,1" bitfld.byte 0x02 2. " IO3FV ,Single-/dual-SPI mode IO3 output fixed value" "0,1" textline " " bitfld.byte 0x02 1. " IO2FV ,Single-/dual-SPI mode IO2 output fixed value" "0,1" bitfld.byte 0x02 0. " SPLP ,Loopback mode" "Disabled,Enabled" rgroup.byte 0x03++0x00 line.byte 0x00 "SPSR,Status Register" bitfld.byte 0x00 7. " SPRFF ,Receive buffer full flag" "Not full,Full" bitfld.byte 0x00 6. " TEND ,Transmit end flag" "Not completed,Completed" bitfld.byte 0x00 5. " SPTEF ,Transmit buffer empty flag" "Not empty,Empty" group.long 0x04++0x03 line.long 0x00 "SPDR,Data Register" group.byte 0x08++0x00 line.byte 0x00 "SPSCR,Sequence Control Register" bitfld.byte 0x00 0.--1. " SPSC ,Sequence control specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..." rgroup.byte 0x09++0x00 line.byte 0x00 "SPSSR,Sequence Status Register" bitfld.byte 0x00 0.--1. " SPSS ,Sequence status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3" group.byte 0x0A++0x04 line.byte 0x00 "SPBR,Bit Rate Register" line.byte 0x01 "SPDCR,Data Control Register" bitfld.byte 0x01 7. " TXDMY ,Dummy data transmission enable" "Disabled,Enabled" line.byte 0x02 "SPCKD,Clock Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" else bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles,8.5 SPCLK cycles" endif line.byte 0x03 "SSLND,Slave Select Negation Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "0.5 SPCLK cycle,1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles" else bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" endif line.byte 0x04 "SPND,Next-Access Delay Register" bitfld.byte 0x04 0.--2. " SPNDL ,Next-access delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" group.word 0x10++0x03 line.word 0x00 "SPCMD0,Command Register 0" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x12++0x03 line.word 0x00 "SPCMD1,Command Register 1" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x14++0x03 line.word 0x00 "SPCMD2,Command Register 2" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x16++0x03 line.word 0x00 "SPCMD3,Command Register 3" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.byte 0x18++0x00 line.byte 0x00 "SPBFCR,Buffer Control Register" bitfld.byte 0x00 7. " TXRST ,Transmit buffer data reset" "No reset,Reset" bitfld.byte 0x00 6. " RXRST ,Receive buffer data reset" "No reset,Reset" bitfld.byte 0x00 4.--5. " TXTRG ,Transmit buffer data triggering number" "31 byte,30 bytes,28 bytes,0 byte" textline " " bitfld.byte 0x00 0.--2. " RXTRG ,Receive buffer data triggering number" "1 byte,2 bytes,4 bytes,5 bytes,8 bytes,16 bytes,24 bytes,32 bytes" rgroup.word 0x1A++0x01 line.word 0x00 "SPBDCR,Buffer Data Count Register" bitfld.word 0x00 8.--13. " TXBC ,Transmit data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," bitfld.word 0x00 0.--5. " RXBC ,Receive data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," group.long 0x1C++0x03 line.long 0x00 "SPBMUL0,Transfer Data Length Multiplier Setting Register 0" group.long 0x20++0x03 line.long 0x00 "SPBMUL1,Transfer Data Length Multiplier Setting Register 1" group.long 0x24++0x03 line.long 0x00 "SPBMUL2,Transfer Data Length Multiplier Setting Register 2" group.long 0x28++0x03 line.long 0x00 "SPBMUL3,Transfer Data Length Multiplier Setting Register 3" width 0x0B tree.end tree "RWDT (RCLK Watchdog Timer)" base ad:0xE6020000 width 9. if ((per.byte(ad:0xE6020000+0x04)&0x20)==0x20) rgroup.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" else group.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" endif group.byte 0x04++0x00 line.byte 0x00 "RWTCSRA,RCLK Watchdog Timer Control/Status Register A" bitfld.byte 0x00 7. " TME ,Timer operation enable" "Disabled,Enabled" rbitfld.byte 0x00 5. " WRFLG ,Write status flag" "Write access,No write access" bitfld.byte 0x00 4. " WOVF ,RWTCNT overflow status" "No overflow,Overflow" textline " " bitfld.byte 0x00 3. " WOVFE ,Overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " CKS0 ,RTC clock select" "/1,/4,/16,/32,/64,/128,/1024,Expanded mode" wgroup.long 0x08++0x03 line.long 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B (Use a word access to write to RWTCSRB, with H'A5 A5A5 in the upper byte)" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "33s,1.01s,2.02s,3.03s,4.04s,5.05s,6.06s,7.07s,8.08s,9.09s,10.1s,,,,,,33s,5.05s,10.1s,15.2s,20.2s,25.3s,30.3s,35.4s,40.4s,45.5s,50.5s,55.6s,60.6s,,,,33s,1.01min,2.02min,3.03min,4.04min,5.05min,6.06min,7.07min,8.08min,9.09min,10.1min,,,,,,33s,5.05min,10.1min,15.2min,20.2min,25.3min,30.3min,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "32s,1s,2s,3s,4s,5s,6s,7s,8s,9s,10s,,,,,,32s,5s,10s,15s,20s,25s,30s,35s,40s,45s,50s,55s,60s,,,,32s,1min,2min,3min,4min,5min,6min,7min,8min,9min,10min,,,,,,32s,5min,10min,15min,20min,25min,30min,?..." endif width 0xB tree.end tree "TPU (16-Bit Timer Pulse Unit)" base ad:0xE60F0000 width 8. group.word 0x00++0x1 "Timer Start Register" line.word 0x00 "TSTR,Timer Start Register" bitfld.word 0x00 4. " TMST ,Motor Control Sequence Start" "Stopped,Started" bitfld.word 0x00 3. " CST3 ,Counter 3 Start" "Stopped,Started" bitfld.word 0x00 2. " CST2 ,Counter 2 Start" "Stopped,Started" textline " " bitfld.word 0x00 1. " CST1 ,Counter 1 Start" "Stopped,Started" bitfld.word 0x00 0. " CST0 ,Counter 0 Start" "Stopped,Started" group.word 0x10++0x1 "Channel 0" line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x10+0x04)++0x1 line.word 0x00 "TMDR0,Timer Mode Register 0" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x10+0x08)++0x1 line.word 0x00 "TIOR0,Timer I/O Control Register 0" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x10+0x0C)++0x1 line.word 0x00 "TIER0,Timer Interrupt Enable Register 0" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x10+0x10)++0x1 line.word 0x00 "TSR0,Timer Status Registers 0" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x10+0x14)++0x1 line.word 0x00 "TCNT0,Timer Counter 0" group.word (0x10+0x18)++0x1 line.word 0x00 "TGRA0,Timer General Register A 0" group.word (0x10+0x1C)++0x1 line.word 0x00 "TGRB0,Timer General Register A 0" group.word (0x10+0x20)++0x1 line.word 0x00 "TGRC0,Timer General Register A 0" group.word (0x10+0x24)++0x1 line.word 0x00 "TGRD0,Timer General Register A 0" group.word 0x50++0x1 "Channel 1" line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x50+0x04)++0x1 line.word 0x00 "TMDR1,Timer Mode Register 1" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x50+0x08)++0x1 line.word 0x00 "TIOR1,Timer I/O Control Register 1" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x50+0x0C)++0x1 line.word 0x00 "TIER1,Timer Interrupt Enable Register 1" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x50+0x10)++0x1 line.word 0x00 "TSR1,Timer Status Registers 1" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x50+0x14)++0x1 line.word 0x00 "TCNT1,Timer Counter 1" group.word (0x50+0x18)++0x1 line.word 0x00 "TGRA1,Timer General Register A 1" group.word (0x50+0x1C)++0x1 line.word 0x00 "TGRB1,Timer General Register A 1" group.word (0x50+0x20)++0x1 line.word 0x00 "TGRC1,Timer General Register A 1" group.word (0x50+0x24)++0x1 line.word 0x00 "TGRD1,Timer General Register A 1" group.word 0x90++0x1 "Channel 2" line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x90+0x04)++0x1 line.word 0x00 "TMDR2,Timer Mode Register 2" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x90+0x08)++0x1 line.word 0x00 "TIOR2,Timer I/O Control Register 2" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x90+0x0C)++0x1 line.word 0x00 "TIER2,Timer Interrupt Enable Register 2" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x90+0x10)++0x1 line.word 0x00 "TSR2,Timer Status Registers 2" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x90+0x14)++0x1 line.word 0x00 "TCNT2,Timer Counter 2" group.word (0x90+0x18)++0x1 line.word 0x00 "TGRA2,Timer General Register A 2" group.word (0x90+0x1C)++0x1 line.word 0x00 "TGRB2,Timer General Register A 2" group.word (0x90+0x20)++0x1 line.word 0x00 "TGRC2,Timer General Register A 2" group.word (0x90+0x24)++0x1 line.word 0x00 "TGRD2,Timer General Register A 2" group.word 0xD0++0x1 "Channel 3" line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0xD0+0x04)++0x1 line.word 0x00 "TMDR3,Timer Mode Register 3" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0xD0+0x08)++0x1 line.word 0x00 "TIOR3,Timer I/O Control Register 3" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0xD0+0x0C)++0x1 line.word 0x00 "TIER3,Timer Interrupt Enable Register 3" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0xD0+0x10)++0x1 line.word 0x00 "TSR3,Timer Status Registers 3" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0xD0+0x14)++0x1 line.word 0x00 "TCNT3,Timer Counter 3" group.word (0xD0+0x18)++0x1 line.word 0x00 "TGRA3,Timer General Register A 3" group.word (0xD0+0x1C)++0x1 line.word 0x00 "TGRB3,Timer General Register A 3" group.word (0xD0+0x20)++0x1 line.word 0x00 "TGRC3,Timer General Register A 3" group.word (0xD0+0x24)++0x1 line.word 0x00 "TGRD3,Timer General Register A 3" group.word 0x100++0x1 "Motor settings registers" line.word 0x00 "TMIR,Motor Control Setting Register" bitfld.word 0x00 4. " TDMAE ,DMA used/unused Bit" "Unused,Unused" bitfld.word 0x00 3. " MTRPATDOWN ,Start and Stop Pattern Transition Ascending/Descending Select Bit" "Ascending,Descending" bitfld.word 0x00 1.--2. " MTRPATKIND ,Start and Stop Pattern Type Select Bit" "4 types,8 types,?..." textline " " bitfld.word 0x00 0. " MTRON ,TPU mode/Stepping Motor Control Mode Select Bit" "TPU,Stepping motor control" group.word 0x104++0x1 line.word 0x00 "TMRR,Motor Deceleration (Stop) Transition Register" bitfld.word 0x00 1. " REDUON0 ,Compulsorily change from normal to deceleration" "No,Yes" bitfld.word 0x00 0. " REDUON ,Compulsorily change from normal to deceleration" "No effect,Decelerate/Stop" rgroup.word 0x108++0x1 line.word 0x00 "TMSR,Motor Control Status Register" bitfld.word 0x00 3. " SITR ,Sequence state in motor control mode" "Not decelerated,Decelerated" bitfld.word 0x00 2. " SITT ,Sequence state in motor control mode" "Not normal,Normal" bitfld.word 0x00 1. " SITA ,Sequence state in motor control mode" "Not accelerated,Accelerated" textline " " bitfld.word 0x00 0. " SITS ,Sequence state in motor control mode" "Not stopped,Stopped" group.word 0x110++0x1 line.word 0x00 "TMMPR0,Motor Operation Pattern Storing Register 0" bitfld.word 0x00 15. " MP33 ,TPU0TO3 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 14. " MP32 ,TPU0TO2 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 13. " MP31 ,TPU0TO1 output value in motor operation pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " MP30 ,TPU0TO0 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 11. " MP23 ,TPU0TO3 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 10. " MP22 ,TPU0TO2 output value in motor operation pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " MP21 ,TPU0TO1 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 8. " MP20 ,TPU0TO0 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 7. " MP13 ,TPU0TO3 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " MP12 ,TPU0TO2 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 5. " MP11 ,TPU0TO1 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 4. " MP10 ,TPU0TO0 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " MP03 ,TPU0TO3 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 2. " MP02 ,TPU0TO2 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 1. " MP01 ,TPU0TO1 output value in motor operation pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " MP00 ,TPU0TO0 output value in motor operation pattern [0]" "Low,High" group.word 0x114++0x1 line.word 0x00 "TMMPR1,Motor Operation Pattern Storing Register 1" bitfld.word 0x00 15. " MP73 ,TPU0TO3 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 14. " MP72 ,TPU0TO2 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 13. " MP71 ,TPU0TO1 output value in motor operation pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " MP70 ,TPU0TO0 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 11. " MP63 ,TPU0TO3 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 10. " MP62 ,TPU0TO2 output value in motor operation pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " MP61 ,TPU0TO1 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 8. " MP60 ,TPU0TO0 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 7. " MP53 ,TPU0TO3 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " MP52 ,TPU0TO2 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 5. " MP51 ,TPU0TO1 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 4. " MP50 ,TPU0TO0 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " MP43 ,TPU0TO3 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 2. " MP42 ,TPU0TO2 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 1. " MP41 ,TPU0TO1 output value in motor operation pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " MP40 ,TPU0TO0 output value in motor operation pattern [4]" "Low,High" group.word 0x118++0x1 line.word 0x00 "TMSPR0,Motor Stop Pattern Storing Register 0" bitfld.word 0x00 15. " SP33 ,TPU0TO3 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 14. " SP32 ,TPU0TO2 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 13. " SP31 ,TPU0TO1 output value in motor stop pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " SP30 ,TPU0TO0 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 11. " SP23 ,TPU0TO3 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 10. " SP22 ,TPU0TO2 output value in motor stop pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " SP21 ,TPU0TO1 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 8. " SP20 ,TPU0TO0 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 7. " SP13 ,TPU0TO3 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " SP12 ,TPU0TO2 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 5. " SP11 ,TPU0TO1 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 4. " SP10 ,TPU0TO0 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " SP03 ,TPU0TO3 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 2. " SP02 ,TPU0TO2 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 1. " SP01 ,TPU0TO1 output value in motor stop pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " SP00 ,TPU0TO0 output value in motor stop pattern [0]" "Low,High" group.word 0x11C++0x1 line.word 0x00 "TMSPR1,Motor Stop Pattern Storing Register 1" bitfld.word 0x00 15. " SP73 ,TPU0TO3 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 14. " SP72 ,TPU0TO2 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 13. " SP71 ,TPU0TO1 output value in motor stop pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " SP70 ,TPU0TO0 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 11. " SP63 ,TPU0TO3 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 10. " SP62 ,TPU0TO2 output value in motor stop pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " SP61 ,TPU0TO1 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 8. " SP60 ,TPU0TO0 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 7. " SP53 ,TPU0TO3 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " SP52 ,TPU0TO2 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 5. " SP51 ,TPU0TO1 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 4. " SP50 ,TPU0TO0 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " SP43 ,TPU0TO3 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 2. " SP42 ,TPU0TO2 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 1. " SP41 ,TPU0TO1 output value in motor stop pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " SP40 ,TPU0TO0 output value in motor stop pattern [4]" "Low,High" group.word 0x120++0x1 line.word 0x00 "TMOPR,Motor Output Pattern Storing Register" bitfld.word 0x00 0.--2. " NOWPAT ,Current Pattern Number" "0,1,2,3,4,5,6,7" group.word 0x130++0x1 line.word 0x00 "TMASR,Motor Acceleration the Number of Steps Register" group.word 0x134++0x1 line.word 0x00 "TMTSR,Motor Normal the Number of Steps Register" group.word 0x138++0x1 line.word 0x00 "TMRSR,Motor Deceleration the Number of Steps Register" group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" rgroup.word 0x144++0x1 line.word 0x00 "TMTCR,Motor Control Normal Counter Register" width 0xB tree.end tree.open "CMT (Compare Match Timer)" tree "CMT 0" base ad:0xFFCA0000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 6. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" group.long 0x500++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif group.long 0x600++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif width 0xB tree.end tree "CMT 1" base ad:0xE6130000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 7. " CH7CLKE ,Channel 7 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 6. " CH6CLKE ,Channel 6 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH5CLKE ,Channel 5 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 4. " CH4CLKE ,Channel 4 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 3. " CH3CLKE ,Channel 3 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 2. " CH2CLKE ,Channel 2 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 1. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 0. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" if (0==0.) group.long 0x0++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==1.||0==2.||0==4.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==3.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==5.||0==6.||0==7.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (0==0.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==1.||0==2.||0==4.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==3.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==5.||0==6.||0==7.) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x0+0x10))&0x200)==0x200) group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif if (0==0.||0==1.||0==2.||0==3.||0==4.) group.long (0x0+0x20)++0x03 line.long 0x00 "CMCSRH0,Compare Match Timer Control/Status Register H0" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x0+0x24)++0x07 line.long 0x00 "CMCNTH0,Compare Match Timer Counter H 0" hexmask.long.word 0x00 0.--15. 1. " CMCNTH0 ,Compare Match Timer Counter H0" line.long 0x04 "CMCORH0,Compare Match Timer Constant Register H0" hexmask.long.word 0x04 0.--15. 1. " CMCORH0 ,Compare Match Timer Constant Register H0" endif if (0==0.||0==1.||0==2.||0==4.) group.long (0x0+0x40)++0x3 line.long 0x00 "CMCSRM0,Compare Match Timer Match Control/Status Register 0" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x0+0x44)++0x3 line.long 0x00 "CMCNTM0,Compare Match Timer Match Counter 0" endif if (0==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT0BK0,Compare Match Timer Counter 0 Backup 0" line.long 0x04 "CMCNT0BK1,Compare Match Timer Counter 0 Backup 1" width 9. endif if (1==0.) group.long 0x100++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==1.||1==2.||1==4.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==3.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==5.||1==6.||1==7.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (1==0.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==1.||1==2.||1==4.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==3.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==5.||1==6.||1==7.) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x100+0x10))&0x200)==0x200) group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif if (1==0.||1==1.||1==2.||1==3.||1==4.) group.long (0x100+0x20)++0x03 line.long 0x00 "CMCSRH1,Compare Match Timer Control/Status Register H1" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x100+0x24)++0x07 line.long 0x00 "CMCNTH1,Compare Match Timer Counter H 1" hexmask.long.word 0x00 0.--15. 1. " CMCNTH1 ,Compare Match Timer Counter H1" line.long 0x04 "CMCORH1,Compare Match Timer Constant Register H1" hexmask.long.word 0x04 0.--15. 1. " CMCORH1 ,Compare Match Timer Constant Register H1" endif if (1==0.||1==1.||1==2.||1==4.) group.long (0x100+0x40)++0x3 line.long 0x00 "CMCSRM1,Compare Match Timer Match Control/Status Register 1" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x100+0x44)++0x3 line.long 0x00 "CMCNTM1,Compare Match Timer Match Counter 1" endif if (1==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT1BK0,Compare Match Timer Counter 1 Backup 0" line.long 0x04 "CMCNT1BK1,Compare Match Timer Counter 1 Backup 1" width 9. endif if (2==0.) group.long 0x200++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==1.||2==2.||2==4.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==3.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==5.||2==6.||2==7.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (2==0.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==1.||2==2.||2==4.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==3.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==5.||2==6.||2==7.) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x200+0x10))&0x200)==0x200) group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" hexmask.long.word 0x00 0.--15. 1. " CMCNT2 ,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" hexmask.long.word 0x04 0.--15. 1. " CMCOR2 ,Compare Match Timer Constant Register 2" else group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" endif if (2==0.||2==1.||2==2.||2==3.||2==4.) group.long (0x200+0x20)++0x03 line.long 0x00 "CMCSRH2,Compare Match Timer Control/Status Register H2" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x200+0x24)++0x07 line.long 0x00 "CMCNTH2,Compare Match Timer Counter H 2" hexmask.long.word 0x00 0.--15. 1. " CMCNTH2 ,Compare Match Timer Counter H2" line.long 0x04 "CMCORH2,Compare Match Timer Constant Register H2" hexmask.long.word 0x04 0.--15. 1. " CMCORH2 ,Compare Match Timer Constant Register H2" endif if (2==0.||2==1.||2==2.||2==4.) group.long (0x200+0x40)++0x3 line.long 0x00 "CMCSRM2,Compare Match Timer Match Control/Status Register 2" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x200+0x44)++0x3 line.long 0x00 "CMCNTM2,Compare Match Timer Match Counter 2" endif if (2==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT2BK0,Compare Match Timer Counter 2 Backup 0" line.long 0x04 "CMCNT2BK1,Compare Match Timer Counter 2 Backup 1" width 9. endif if (3==0.) group.long 0x300++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==1.||3==2.||3==4.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==3.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==5.||3==6.||3==7.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (3==0.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==1.||3==2.||3==4.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==3.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==5.||3==6.||3==7.) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x300+0x10))&0x200)==0x200) group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" hexmask.long.word 0x00 0.--15. 1. " CMCNT3 ,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" hexmask.long.word 0x04 0.--15. 1. " CMCOR3 ,Compare Match Timer Constant Register 3" else group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" endif if (3==0.||3==1.||3==2.||3==3.||3==4.) group.long (0x300+0x20)++0x03 line.long 0x00 "CMCSRH3,Compare Match Timer Control/Status Register H3" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x300+0x24)++0x07 line.long 0x00 "CMCNTH3,Compare Match Timer Counter H 3" hexmask.long.word 0x00 0.--15. 1. " CMCNTH3 ,Compare Match Timer Counter H3" line.long 0x04 "CMCORH3,Compare Match Timer Constant Register H3" hexmask.long.word 0x04 0.--15. 1. " CMCORH3 ,Compare Match Timer Constant Register H3" endif if (3==0.||3==1.||3==2.||3==4.) group.long (0x300+0x40)++0x3 line.long 0x00 "CMCSRM3,Compare Match Timer Match Control/Status Register 3" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x300+0x44)++0x3 line.long 0x00 "CMCNTM3,Compare Match Timer Match Counter 3" endif if (3==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT3BK0,Compare Match Timer Counter 3 Backup 0" line.long 0x04 "CMCNT3BK1,Compare Match Timer Counter 3 Backup 1" width 9. endif if (4==0.) group.long 0x400++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==1.||4==2.||4==4.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==3.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==5.||4==6.||4==7.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (4==0.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==1.||4==2.||4==4.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==3.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==5.||4==6.||4==7.) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x400+0x10))&0x200)==0x200) group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" hexmask.long.word 0x00 0.--15. 1. " CMCNT4 ,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" hexmask.long.word 0x04 0.--15. 1. " CMCOR4 ,Compare Match Timer Constant Register 4" else group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" endif if (4==0.||4==1.||4==2.||4==3.||4==4.) group.long (0x400+0x20)++0x03 line.long 0x00 "CMCSRH4,Compare Match Timer Control/Status Register H4" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x400+0x24)++0x07 line.long 0x00 "CMCNTH4,Compare Match Timer Counter H 4" hexmask.long.word 0x00 0.--15. 1. " CMCNTH4 ,Compare Match Timer Counter H4" line.long 0x04 "CMCORH4,Compare Match Timer Constant Register H4" hexmask.long.word 0x04 0.--15. 1. " CMCORH4 ,Compare Match Timer Constant Register H4" endif if (4==0.||4==1.||4==2.||4==4.) group.long (0x400+0x40)++0x3 line.long 0x00 "CMCSRM4,Compare Match Timer Match Control/Status Register 4" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x400+0x44)++0x3 line.long 0x00 "CMCNTM4,Compare Match Timer Match Counter 4" endif if (4==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT4BK0,Compare Match Timer Counter 4 Backup 0" line.long 0x04 "CMCNT4BK1,Compare Match Timer Counter 4 Backup 1" width 9. endif if (5==0.) group.long 0x500++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==1.||5==2.||5==4.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==3.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==5.||5==6.||5==7.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (5==0.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==1.||5==2.||5==4.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==3.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==5.||5==6.||5==7.) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" hexmask.long.word 0x00 0.--15. 1. " CMCNT5 ,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" hexmask.long.word 0x04 0.--15. 1. " CMCOR5 ,Compare Match Timer Constant Register 5" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" endif if (5==0.||5==1.||5==2.||5==3.||5==4.) group.long (0x500+0x20)++0x03 line.long 0x00 "CMCSRH5,Compare Match Timer Control/Status Register H5" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x500+0x24)++0x07 line.long 0x00 "CMCNTH5,Compare Match Timer Counter H 5" hexmask.long.word 0x00 0.--15. 1. " CMCNTH5 ,Compare Match Timer Counter H5" line.long 0x04 "CMCORH5,Compare Match Timer Constant Register H5" hexmask.long.word 0x04 0.--15. 1. " CMCORH5 ,Compare Match Timer Constant Register H5" endif if (5==0.||5==1.||5==2.||5==4.) group.long (0x500+0x40)++0x3 line.long 0x00 "CMCSRM5,Compare Match Timer Match Control/Status Register 5" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x500+0x44)++0x3 line.long 0x00 "CMCNTM5,Compare Match Timer Match Counter 5" endif if (5==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT5BK0,Compare Match Timer Counter 5 Backup 0" line.long 0x04 "CMCNT5BK1,Compare Match Timer Counter 5 Backup 1" width 9. endif if (6==0.) group.long 0x600++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==1.||6==2.||6==4.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==3.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==5.||6==6.||6==7.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (6==0.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==1.||6==2.||6==4.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==3.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==5.||6==6.||6==7.) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" hexmask.long.word 0x00 0.--15. 1. " CMCNT6 ,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" hexmask.long.word 0x04 0.--15. 1. " CMCOR6 ,Compare Match Timer Constant Register 6" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" endif if (6==0.||6==1.||6==2.||6==3.||6==4.) group.long (0x600+0x20)++0x03 line.long 0x00 "CMCSRH6,Compare Match Timer Control/Status Register H6" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x600+0x24)++0x07 line.long 0x00 "CMCNTH6,Compare Match Timer Counter H 6" hexmask.long.word 0x00 0.--15. 1. " CMCNTH6 ,Compare Match Timer Counter H6" line.long 0x04 "CMCORH6,Compare Match Timer Constant Register H6" hexmask.long.word 0x04 0.--15. 1. " CMCORH6 ,Compare Match Timer Constant Register H6" endif if (6==0.||6==1.||6==2.||6==4.) group.long (0x600+0x40)++0x3 line.long 0x00 "CMCSRM6,Compare Match Timer Match Control/Status Register 6" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x600+0x44)++0x3 line.long 0x00 "CMCNTM6,Compare Match Timer Match Counter 6" endif if (6==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT6BK0,Compare Match Timer Counter 6 Backup 0" line.long 0x04 "CMCNT6BK1,Compare Match Timer Counter 6 Backup 1" width 9. endif if (7==0.) group.long 0x700++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==1.||7==2.||7==4.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==3.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==5.||7==6.||7==7.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (7==0.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==1.||7==2.||7==4.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==3.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==5.||7==6.||7==7.) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x700+0x10))&0x200)==0x200) group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" hexmask.long.word 0x00 0.--15. 1. " CMCNT7 ,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" hexmask.long.word 0x04 0.--15. 1. " CMCOR7 ,Compare Match Timer Constant Register 7" else group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" endif if (7==0.||7==1.||7==2.||7==3.||7==4.) group.long (0x700+0x20)++0x03 line.long 0x00 "CMCSRH7,Compare Match Timer Control/Status Register H7" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x700+0x24)++0x07 line.long 0x00 "CMCNTH7,Compare Match Timer Counter H 7" hexmask.long.word 0x00 0.--15. 1. " CMCNTH7 ,Compare Match Timer Counter H7" line.long 0x04 "CMCORH7,Compare Match Timer Constant Register H7" hexmask.long.word 0x04 0.--15. 1. " CMCORH7 ,Compare Match Timer Constant Register H7" endif if (7==0.||7==1.||7==2.||7==4.) group.long (0x700+0x40)++0x3 line.long 0x00 "CMCSRM7,Compare Match Timer Match Control/Status Register 7" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x700+0x44)++0x3 line.long 0x00 "CMCNTM7,Compare Match Timer Match Counter 7" endif if (7==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT7BK0,Compare Match Timer Counter 7 Backup 0" line.long 0x04 "CMCNT7BK1,Compare Match Timer Counter 7 Backup 1" width 9. endif width 0xB tree.end tree.end tree.open "TMU (Timer Unit)" tree "Timer 0" base ad:0xE61E0004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR0,Timer Start Register 0" bitfld.byte 0x00 2. " STR2 , Counter Start 2" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR1 , Counter Start 1" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR0 , Counter Start 0" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR0,Timer Constant Register 0" line.long 0x04 "TCNT0,Timer Counter 0" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR0,Timer Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR1,Timer Constant Register 1" line.long 0x04 "TCNT1,Timer Counter 1" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR1,Timer Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR2,Timer Constant Register 2" line.long 0x04 "TCNT2,Timer Counter 2" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR2,Timer Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR2,Input Capture Register 2" endif width 0xb tree.end tree "Timer 1" base ad:0xFFF60004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR1,Timer Start Register 1" bitfld.byte 0x00 2. " STR5 , Counter Start 5" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR4 , Counter Start 4" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR3 , Counter Start 3" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR3,Timer Constant Register 3" line.long 0x04 "TCNT3,Timer Counter 3" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR3,Timer Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR4,Timer Constant Register 4" line.long 0x04 "TCNT4,Timer Counter 4" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR4,Timer Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR5,Timer Constant Register 5" line.long 0x04 "TCNT5,Timer Counter 5" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR5,Timer Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" elif (cpu()=="RCARM2") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" else bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" endif width 0xb tree.end tree "Timer 2" base ad:0xFFF70004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR2,Timer Start Register 2" bitfld.byte 0x00 2. " STR8 , Counter Start 8" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR7 , Counter Start 7" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR6 , Counter Start 6" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR6,Timer Constant Register 6" line.long 0x04 "TCNT6,Timer Counter 6" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR6,Timer Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR7,Timer Constant Register 7" line.long 0x04 "TCNT7,Timer Counter 7" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR7,Timer Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR8,Timer Constant Register 8" line.long 0x04 "TCNT8,Timer Counter 8" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR8,Timer Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" elif (cpu()=="RCARM2") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif width 0xb tree.end tree "Timer 3" base ad:0xFFF80004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR3,Timer Start Register 3" bitfld.byte 0x00 2. " STR11 , Counter Start 11" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR10 , Counter Start 10" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR9 , Counter Start 9" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR9,Timer Constant Register 9" line.long 0x04 "TCNT9,Timer Counter 9" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR9,Timer Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR10,Timer Constant Register 10" line.long 0x04 "TCNT10,Timer Counter 10" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR10,Timer Control Register 10" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR11,Timer Constant Register 11" line.long 0x04 "TCNT11,Timer Counter 11" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR11,Timer Control Register 11" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " sif (cpu()=="R8A7792X") bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " endif bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." sif (cpu()=="R8A7792X") rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR11,Input Capture Register 11" endif elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif width 0xb tree.end tree.end tree.open "PWM Timer" tree "Channel 0" base ad:0xE6E30000 width 8. if (((per.l(ad:0xE6E30000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 1" base ad:0xE6E31000 width 8. if (((per.l(ad:0xE6E31000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 2" base ad:0xE6E32000 width 8. if (((per.l(ad:0xE6E32000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 3" base ad:0xE6E33000 width 8. if (((per.l(ad:0xE6E33000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 4" base ad:0xE6E34000 width 8. if (((per.l(ad:0xE6E34000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree.end tree "Gyro-ADC IF (A/D Converter Controller)" base ad:0xE6E54000 width 18. group.long 0x00++0x0f line.long 0x00 "MSR,Mode Select Register" bitfld.long 0x00 0.--1. " MODE_SEL ,These bits select the mode to match the ADC in use" "Mode 1 (MB88101A),Mode 2 (ADCS7476),,Mode 3 (MAX1162)" line.long 0x04 "SSSR,Start/Stop Setting Register" bitfld.long 0x04 0. " STAT ,Starts or stops operation of the Gyro-ADC IF and speed-pulse IF" "Stopped,Started" line.long 0x08 "ADCACLSR,ADC Access Clock Length Setting Register" hexmask.long.word 0x08 0.--9. 1. " ADC_CLOCK_LENGTH ,Set the count value to create the clock length per one clock cycle for accessing an ADC device" line.long 0x0c "125TLSR,1.25-ms Time Length Setting Register" hexmask.long.tbyte 0x0c 0.--16. 1. " 1.25MS ,Set the count value for creating a period of 1.25 ms" if (((per.l(ad:0xE6E54000))&0x3)==0x0) rgroup.long 0x10++0x0f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.word 0x0 0.--11. 1. " AD_CH0_DATA ,Realtime data (12 bits) of ch[0] is indicated in the AD_ch[0]_data[11:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.word 0x4 0.--11. 1. " AD_CH1_DATA ,Realtime data (12 bits) of ch[1] is indicated in the AD_ch[1]_data[11:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.word 0x8 0.--11. 1. " AD_CH2_DATA ,Realtime data (12 bits) of ch[2] is indicated in the AD_ch[2]_data[11:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.word 0xC 0.--11. 1. " AD_CH3_DATA ,Realtime data (12 bits) of ch[3] is indicated in the AD_ch[3]_data[11:0] bits" elif (((per.l(ad:0xE6E54000))&0x3)==0x1) rgroup.long 0x10++0x1f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.word 0x0 0.--14. 1. " AD_CH0_DATA ,Realtime data (15 bits) of ch[0] is indicated in the AD_ch[0]_data[14:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.word 0x4 0.--14. 1. " AD_CH1_DATA ,Realtime data (15 bits) of ch[1] is indicated in the AD_ch[1]_data[14:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.word 0x8 0.--14. 1. " AD_CH2_DATA ,Realtime data (15 bits) of ch[2] is indicated in the AD_ch[2]_data[14:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.word 0xC 0.--14. 1. " AD_CH3_DATA ,Realtime data (15 bits) of ch[3] is indicated in the AD_ch[3]_data[14:0] bits" line.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hexmask.long.word 0x10 0.--14. 1. " AD_CH4_DATA ,Realtime data (15 bits) of ch[4] is indicated in the AD_ch[4]_data[14:0] bits" line.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hexmask.long.word 0x14 0.--14. 1. " AD_CH5_DATA ,Realtime data (15 bits) of ch[5] is indicated in the AD_ch[5]_data[14:0] bits" line.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hexmask.long.word 0x18 0.--14. 1. " AD_CH6_DATA ,Realtime data (15 bits) of ch[6] is indicated in the AD_ch[6]_data[14:0] bits" line.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" hexmask.long.word 0x1C 0.--14. 1. " AD_CH7_DATA ,Realtime data (15 bits) of ch[7] is indicated in the AD_ch[7]_data[14:0] bits" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x10++0x1f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.tbyte 0x0 0.--23. 1. " AD_CH0_DATA ,Realtime data (24 bits) of ch[0] is indicated in the AD_ch[0]_data[23:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.tbyte 0x4 0.--23. 1. " AD_CH1_DATA ,Realtime data (24 bits) of ch[1] is indicated in the AD_ch[1]_data[23:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.tbyte 0x8 0.--23. 1. " AD_CH2_DATA ,Realtime data (24 bits) of ch[2] is indicated in the AD_ch[2]_data[23:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.tbyte 0xC 0.--23. 1. " AD_CH3_DATA ,Realtime data (24 bits) of ch[3] is indicated in the AD_ch[3]_data[23:0] bits" line.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hexmask.long.tbyte 0x10 0.--23. 1. " AD_CH4_DATA ,Realtime data (24 bits) of ch[4] is indicated in the AD_ch[4]_data[23:0] bits" line.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hexmask.long.tbyte 0x14 0.--23. 1. " AD_CH5_DATA ,Realtime data (24 bits) of ch[5] is indicated in the AD_ch[5]_data[23:0] bits" line.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hexmask.long.tbyte 0x18 0.--23. 1. " AD_CH6_DATA ,Realtime data (24 bits) of ch[6] is indicated in the AD_ch[6]_data[23:0] bits" line.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" hexmask.long.tbyte 0x1C 0.--23. 1. " AD_CH7_DATA ,Realtime data (24 bits) of ch[7] is indicated in the AD_ch[7]_data[23:0] bits" else hgroup.long 0x10++0x1f hide.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hide.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hide.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hide.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hide.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hide.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hide.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hide.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" endif if (((per.l(ad:0xE6E54000))&0x3)==0x0) rgroup.long 0x30++0x0f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long.word 0x0 0.--15. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long.word 0x4 0.--15. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long.word 0x8 0.--15. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long.word 0xC 0.--15. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[3] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x1) rgroup.long 0x30++0x1f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long.tbyte 0x0 0.--18. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long.tbyte 0x4 0.--18. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long.tbyte 0x8 0.--18. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long.tbyte 0xC 0.--18. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hexmask.long.tbyte 0x10 0.--18. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hexmask.long.tbyte 0x14 0.--18. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hexmask.long.tbyte 0x18 0.--18. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" hexmask.long.tbyte 0x1C 0.--18. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x30++0x1f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long 0x0 0.--27. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long 0x4 0.--27. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long 0x8 0.--27. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long 0xC 0.--27. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[3] data items" line.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hexmask.long 0x10 0.--27. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[4] data items" line.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hexmask.long 0x14 0.--27. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[5] data items" line.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hexmask.long 0x18 0.--27. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[6] data items" line.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" hexmask.long 0x1C 0.--27. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[7] data items" else hgroup.long 0x30++0x1f hide.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hide.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hide.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hide.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hide.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hide.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hide.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hide.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" endif if (((per.l(ad:0xE6E54000))&0x3)==(0x1||0x3)) rgroup.long 0x50++0x1f line.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hexmask.long.word 0x0 0.--15. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hexmask.long.word 0x4 0.--15. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hexmask.long.word 0x8 0.--15. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hexmask.long.word 0xC 0.--15. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hexmask.long.word 0x10 0.--15. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hexmask.long.word 0x14 0.--15. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hexmask.long.word 0x18 0.--15. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" hexmask.long.word 0x1C 0.--15. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x50++0x1f line.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hexmask.long.word 0x0 0.--14. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hexmask.long.word 0x4 0.--14. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hexmask.long.word 0x8 0.--14. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hexmask.long.word 0xC 0.--14. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hexmask.long.word 0x10 0.--14. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hexmask.long.word 0x14 0.--14. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hexmask.long.word 0x18 0.--14. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" hexmask.long.word 0x1C 0.--14. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" else hgroup.long 0x50++0x1f hide.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hide.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hide.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hide.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hide.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hide.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hide.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hide.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" endif sif (cpu()=="RCARM2")||(cpu()=="R8A7792X") group.long 0x70++0x03 line.long 0x00 "FIFOSR,FIFO Status Register" eventfld.long 0x00 30. " CH[7]_ERROR ,Channel 7 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 29. " CH[7]_FULL ,Channel 7 FIFO full" "Not full,Full" rbitfld.long 0x00 28. " CH[7]_EMPTY ,Channel 7 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 26. " CH[6]_ERROR ,Channel 6 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 25. " CH[6]_FULL ,Channel 6 FIFO full" "Not full,Full" rbitfld.long 0x00 24. " CH[6]_EMPTY ,Channel 6 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 22. " CH[5]_ERROR ,Channel 5 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 21. " CH[5]_FULL ,Channel 5 FIFO full" "Not full,Full" rbitfld.long 0x00 20. " CH[5]_EMPTY ,Channel 5 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 18. " CH[4]_ERROR ,Channel 4 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 17. " CH[4]_FULL ,Channel 4 FIFO full" "Not full,Full" rbitfld.long 0x00 16. " CH[4]_EMPTY ,Channel 4 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 14. " CH[3]_ERROR ,Channel 3 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 13. " CH[3]_FULL ,Channel 3 FIFO full" "Not full,Full" rbitfld.long 0x00 12. " CH[3]_EMPTY ,Channel 3 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 10. " CH[2]_ERROR ,Channel 2 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 9. " CH[2]_FULL ,Channel 2 FIFO full" "Not full,Full" rbitfld.long 0x00 8. " CH[2]_EMPTY ,Channel 2 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 6. " CH[1]_ERROR ,Channel 1 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 5. " CH[1]_FULL ,Channel 1 FIFO full" "Not full,Full" rbitfld.long 0x00 4. " CH[1]_EMPTY ,Channel 1 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 2. " CH[0]_ERROR ,Channel 0 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 1. " CH[0]_FULL ,Channel 0 FIFO full" "Not full,Full" rbitfld.long 0x00 0. " CH[0]_EMPTY ,Channel 0 FIFO empty" "Not empty,Empty" else group.long 0x70++0x03 line.long 0x00 "FIFOSR,FIFO Status Register" eventfld.long 0x00 30. " CH[7]_ERROR ,Channel 7 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 29. " CH[7]_FULL ,Channel 7 FIFO full" "Not full,Full" bitfld.long 0x00 28. " CH[7]_EMPTY ,Channel 7 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 26. " CH[6]_ERROR ,Channel 6 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 25. " CH[6]_FULL ,Channel 6 FIFO full" "Not full,Full" bitfld.long 0x00 24. " CH[6]_EMPTY ,Channel 6 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 22. " CH[5]_ERROR ,Channel 5 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 21. " CH[5]_FULL ,Channel 5 FIFO full" "Not full,Full" bitfld.long 0x00 20. " CH[5]_EMPTY ,Channel 5 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 18. " CH[4]_ERROR ,Channel 4 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 17. " CH[4]_FULL ,Channel 4 FIFO full" "Not full,Full" bitfld.long 0x00 16. " CH[4]_EMPTY ,Channel 4 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 14. " CH[3]_ERROR ,Channel 3 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 13. " CH[3]_FULL ,Channel 3 FIFO full" "Not full,Full" bitfld.long 0x00 12. " CH[3]_EMPTY ,Channel 3 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 10. " CH[2]_ERROR ,Channel 2 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 9. " CH[2]_FULL ,Channel 2 FIFO full" "Not full,Full" bitfld.long 0x00 8. " CH[2]_EMPTY ,Channel 2 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 6. " CH[1]_ERROR ,Channel 1 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 5. " CH[1]_FULL ,Channel 1 FIFO full" "Not full,Full" bitfld.long 0x00 4. " CH[1]_EMPTY ,Channel 1 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 2. " CH[0]_ERROR ,Channel 0 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 1. " CH[0]_FULL ,Channel 0 FIFO full" "Not full,Full" bitfld.long 0x00 0. " CH[0]_EMPTY ,Channel 0 FIFO empty" "Not empty,Empty" endif sif (cpu()=="R8A7792X") group.long 0x74++0x03 line.long 0x00 "INTR,Interrupt Register" bitfld.long 0x00 0. " INT ,Interrupt signal assertion" "Not asserted,Asserted" group.long 0x78++0x03 line.long 0x00 "INTENR,Interrupt Enable Register" bitfld.long 0x00 0. " INTEN ,Interrupt request enable" "Disabled,Enabled" endif textline " " width 0xb tree.end tree "THS/TSC (Thermal Sensor)" base ad:0xE61F0000 width 10. rgroup.long 0x10++0x3 line.long 0x00 "STR,Interrupt status register" bitfld.long 0x00 30. " PRTFLG ,Interrupt Temperature Status Flag" "Normal,Exceed" bitfld.long 0x00 3. " TJ03ST ,TJ03ST Detection Status" "Not detected,Detected" bitfld.long 0x00 2. " TJ02ST ,TJ02ST Detection Status" "Not detected,Detected" textline " " bitfld.long 0x00 1. " TJ01ST ,TJ01ST Detection Status" "Not detected,Detected" bitfld.long 0x00 0. " TJ00ST ,TJ00ST Detection Status" "Not detected,Detected" group.long 0x14++0x7 line.long 0x00 "ENR,Interrupt Enable Register" bitfld.long 0x00 3. " TJ03_EN ,Tj03 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TJ02_EN ,Tj02 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " TJ01_EN ,Tj01 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " TJ00_EN ,Tj00 interrupt enable" "Disabled,Enabled" line.long 0x04 "INT_MSK,Interrupt Mask Register" bitfld.long 0x04 3. " TJ03INT_MSK ,Tj03 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 2. " TJ02INT_MSK ,Tj02 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 1. " TJ01INT_MSK ,Tj01 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 0. " TJ00INT_MSK ,Tj00 interrupt request masked" "Not masked,Masked" group.long 0x20++0xF line.long 0x00 "POSNEG,Positive/Negative Logic Select Register" bitfld.long 0x00 3. " POSNEG3 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 2. " POSNEG2 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 1. " POSNEG1 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 0. " POSNEG0 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" line.long 0x04 "EDGLEVEL,Edge/Level Sensing Select Register" bitfld.long 0x04 3. " EDGLEVEL3 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 2. " EDGLEVEL2 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 1. " EDGLEVEL1 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 0. " EDGLEVEL0 ,Specifies the method to detect interrupt signal input" ",Edge" line.long 0x08 "FILONOFF,Chattering Prevention ON/OFF Setting Register" bitfld.long 0x08 3. " FILONOFF3 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 2. " FILONOFF2 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 1. " FILONOFF1 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 0. " FILONOFF0 ,Turns on or off the chattering prevention circuit" "Off,On" line.long 0x0C "THSCR,THS Control Register" bitfld.long 0x0C 12. " CPCTL ,Specifies the method to set the offset (CPTAP) of the comparator in the THS" "CPTAP3-0 bits,Automatically by hardware" bitfld.long 0x0C 8.--9. " THIDLE ,Selects either the normal operating state or the idle state of the THS" "Normal,,Normal/output stopped,Idle" bitfld.long 0x0C 4.--7. " RFTAP[3:0] ,Sets an offset value (RFTAP) of the op amp in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CPTAP[3:0] ,Sets the offset value (CPTAP) of the comparator in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x30++0x3 line.long 0x00 "THSSR,THS Status Register" bitfld.long 0x00 0.--5. " CTEMP[5:0] ,Indicates the current temperature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x34++0x3 line.long 0x00 "INTCTLR,Interrupt Control Register " bitfld.long 0x00 24.--29. " CTEMP3 ,Indicates the temperature that causes an INTDT3 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CTEMP2 ,Indicates the temperature that causes an INTDT2 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CTEMP1 ,Indicates the temperature that causes an INTDT1 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CTEMP0 ,Indicates the temperature that causes an INTDT0 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0xb tree.end tree.open "SYSC (System Controller)" base ad:0xE6180000 width 15. tree "Common Registers" rgroup.long 0x00++0x7 line.long 0x00 "SYSCSR,SYSC Status Register" bitfld.long 0x00 1. " PONENB ,SYSC power resume requests acceptance ready state" "Not ready,Ready" bitfld.long 0x00 0. " POFFENB ,SYSC power shutoff requests acceptance ready state" "Not ready,Ready" line.long 0x04 "SYSCISR,Interrupt Status Register" bitfld.long 0x04 24. " IMP ,IMP-X3 power shutoff/resume processing completion interrupt" "Not completed,Completed" bitfld.long 0x04 20. " SGX ,SGX power shutoff/resume processing completion interrupt" "Not completed,Completed" bitfld.long 0x04 12. " CA15_SCU ,CA15-SCU power shutoff/resume processing completion interrupt" "Not completed,Completed" textline " " bitfld.long 0x04 1. " CA15_CPU1 ,CA15-CPU1 power shutoff/resume processing completion interrupt" "Not completed,Completed" bitfld.long 0x04 0. " CA15_CPU0 ,CA15-CPU0 power shutoff/resume processing completion interrupt" "Not completed,Completed" wgroup.long 0x08++0x3 line.long 0x00 "SYSCISCR,Interrupt Status Clear Register" bitfld.long 0x00 24. " IMP ,IMP-X3 power shutoff/resume processing completion interrupt clear" "No effect,Clear" bitfld.long 0x00 20. " SGX ,SGX power shutoff/resume processing completion interrupt clear" "No effect,Clear" bitfld.long 0x00 12. " CA15_SCU ,CA15-SCU power shutoff/resume processing completion interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " CA15_CPU1 ,CA15-CPU1 power shutoff/resume processing completion interrupt clear" "No effect,Clear" bitfld.long 0x00 0. " CA15_CPU0 ,CA15-CPU0 power shutoff/resume processing completion interrupt clear" "No effect,Clear" group.long 0x0C++0x7 line.long 0x00 "SYSCIER,Interrupt Enable Register" bitfld.long 0x00 24. " IMP ,IMP-X3 power shutoff/resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " SGX ,SGX power shutoff/resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " CA15_SCU ,CA15-SCU power shutoff/resume processing completion interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CA15_CPU1 ,CA15-CPU1 power shutoff/resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " CA15_CPU0 ,CA15-CPU0 power shutoff/resume processing completion interrupt enable" "Disabled,Enabled" line.long 0x04 "SYSCIMR,Interrupt Mask Register" bitfld.long 0x04 24. " IMP ,IMP-X3 power shutoff/resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 20. " SGX ,SGX power shutoff/resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 12. " CA15_SCU ,CA15-SCU power shutoff/resume processing completion interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " CA15_CPU1 ,CA15-CPU1 power shutoff/resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 0. " CA15_CPU0 ,CA15-CPU0 power shutoff/resume processing completion interrupt mask" "Not masked,Masked" if (((per.l(ad:0xE6180000+0x04))&0x1000)==0x1000) group.long 0x14++0x3 line.long 0x00 "WUPMSKCA15,CA15 Wake Up Mask Register" bitfld.long 0x00 9. " CSD1 ,CA15 CPU1 + SCU area CSD1 factor receive wake up mask" "Not masked,Masked" bitfld.long 0x00 8. " CSD0 ,CA15 CPU0 + SCU area CSD0 factor receive wake up mask" "Not masked,Masked" bitfld.long 0x00 5. " FIQ1 ,CA15 CPU1 + SCU area FIQ1 factor receive wake up mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " FIQ0 ,CA15 CPU0 + SCU area FIQ0 factor receive wake up mask" "Not masked,Masked" bitfld.long 0x00 1. " IRQ1 ,CA15 CPU1 + SCU area IRQ1 factor receive wake up mask" "Not masked,Masked" bitfld.long 0x00 0. " IRQ0 ,CA15 CPU0 + SCU area IRQ0 factor receive wake up mask" "Not masked,Masked" else hgroup.long 0x14++0x3 hide.long 0x00 "WUPMSKCA15,CA15 Wake Up Mask Register" endif rgroup.long 0x20++0x3 line.long 0x00 "SYSCEERSR,External Event Request Status Register" bitfld.long 0x00 9. " FIQ_CA15[1] ,FIQ interrupt power resume request CA15 CPU1 acceptance" "Not accepted,Accepted" bitfld.long 0x00 8. " FIQ_CA15[0] ,FIQ interrupt power resume request CA15 CPU0 acceptance" "Not accepted,Accepted" bitfld.long 0x00 5. " IRQ_CA15[1] ,IRQ interrupt power resume request CA15 CPU1 acceptance" "Not accepted,Accepted" textline " " bitfld.long 0x00 4. " IRQ_CA15[0] ,IRQ interrupt power resume request CA15 CPU0 acceptance" "Not accepted,Accepted" bitfld.long 0x00 1. " WFI_CA15[1] ,WFI interrupt power resume request CA15 CPU1 acceptance" "Not accepted,Accepted" bitfld.long 0x00 0. " WFI_CA15[0] ,WFI interrupt power resume request CA15 CPU0 acceptance" "Not accepted,Accepted" wgroup.long 0x24++0x3 line.long 0x00 "SYSCEERSCR,External Event Request Status Clear Register" bitfld.long 0x00 9. " FIQ_CA15[1] ,FIQ interrupt power resume request CA15 CPU1 acceptance clear" "No effect,Clear" bitfld.long 0x00 8. " FIQ_CA15[0] ,FIQ interrupt power resume request CA15 CPU0 acceptance clear" "No effect,Clear" bitfld.long 0x00 5. " IRQ_CA15[1] ,IRQ interrupt power resume request CA15 CPU1 acceptance clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " IRQ_CA15[0] ,IRQ interrupt power resume request CA15 CPU0 acceptance clear" "No effect,Clear" bitfld.long 0x00 1. " WFI_CA15[1] ,WFI interrupt power resume request CA15 CPU1 acceptance clear" "No effect,Clear" bitfld.long 0x00 0. " WFI_CA15[0] ,WFI interrupt power resume request CA15 CPU0 acceptance clear" "No effect,Clear" group.long 0x28++0x3 line.long 0x00 "SYSCEERSER,External Event Request Status Enable Register" bitfld.long 0x00 9. " FIQ_CA15[1] ,CA15 CPU1 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " FIQ_CA15[0] ,CA15 CPU0 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRQ_CA15[1] ,CA15 CPU1 IRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IRQ_CA15[0] ,CA15 CPU0 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " WFI_CA15[1] ,CA15 CPU1 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " WFI_CA15[0] ,CA15 CPU0 WFI external event interrupt enable" "Disabled,Enabled" tree.end tree "Power Control Registers for CA15" rgroup.long 0x40++0x3 line.long 0x00 "PWRSRCA15,Power Status Register CA15" bitfld.long 0x00 5. " PWRUP_CPU1 ,CPU1 non-power-shutoff state" "No,Yes" bitfld.long 0x00 4. " PWRUP_CPU0 ,CPU0 non-power-shutoff state" "No,Yes" textline " " bitfld.long 0x00 1. " PWRDWN_CPU1 ,CPU1 power-shutoff state" "No,Yes" bitfld.long 0x00 0. " PWRDWN_CPU0 ,CPU0 power-shutoff state" "No,Yes" rgroup.long 0x48++0x3 line.long 0x00 "PWROFFSRCA15,Power Shutoff Status Register CA15" bitfld.long 0x00 1. " CPU1 ,CPU1 power shutoff sequence execution status" "Not executed,Executed" bitfld.long 0x00 0. " CPU0 ,CPU0 power shutoff sequence execution status" "Not executed,Executed" rgroup.long 0x50++0x7 line.long 0x00 "PWRONSRCA15,Power resume status register CA15" bitfld.long 0x00 1. " CPU1 ,CPU1 power resume sequence execution status" "Not executed,Executed" bitfld.long 0x00 0. " CPU0 ,CPU0 power resume sequence execution status" "Not executed,Executed" line.long 0x04 "PWRERCA15,Power Shutoff/Resume Error Register CA15" bitfld.long 0x04 1. " CPU1 ,CPU1 power shutoff/resume request acceptance error" "No error,Error" bitfld.long 0x04 0. " CPU0 ,CPU0 power shutoff/resume request acceptance error" "No error,Error" tree.end tree "Power Control Registers for SGX" rgroup.long 0xC0++0x3 line.long 0x00 "PWRSRSGX,Power Status Register SGX" bitfld.long 0x00 4. " PWRUP ,SGX module power non-shutoff status" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,SGX module power shutoff status" "No,Yes" wgroup.long 0xC4++0x3 line.long 0x00 "PWROFFSRSGX,Power Shutoff Control Register SGX" bitfld.long 0x00 0. " PWRDWN ,Power-shutoff sequence start" "No effect,Shutoff" rgroup.long 0xC8++0x03 line.long 0x00 "PWROFFSRSGX,Power Shutoff Status Register SGX" bitfld.long 0x00 0. " DWNSTATE ,Power shutoff sequence execution status" "Not executed,Executed" wgroup.long 0xCC++0x03 line.long 0x00 "PWRONCRSGX,Power Resume Control Register SGX" bitfld.long 0x00 0. " PWRUP ,Power-resume sequence start" "No effect,Resume" rgroup.long 0xD0++0x03 line.long 0x00 "PWRONSRSGX,Power Resume Status Register SGX" bitfld.long 0x00 0. " UPSTATE ,Power resume sequence execution status" "Not executed,Executed" rgroup.long 0xD4++0x03 line.long 0x00 "PWRERSGX,Power Shutoff/Resume Error Register SGX" bitfld.long 0x00 0. " ERR ,Power shutoff/resume request acceptance error" "No error,Error" tree.end tree "Power Control Registers for IMP-X4" rgroup.long 0x140++0x3 line.long 0x00 "PWRSRIMP-X4,Power Status Register IMP-X4" bitfld.long 0x00 4. " PWRUP ,IMP-X4 power non-shutoff status" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,IMP-X4 power shutoff status" "No,Yes" wgroup.long 0x144++0x3 line.long 0x00 "PWROFFSRIMP-X4,Power Shutoff Control Register IMP-X4" bitfld.long 0x00 0. " PWRDWN ,Power-shutoff sequence start" "No shutoff,Shutoff" rgroup.long 0x148++0x03 line.long 0x00 "PWROFFSRIMP-X4,Power Shutoff Status Register IMP-X4" bitfld.long 0x00 0. " DWNSTATE ,Power shutoff sequence execution status" "Not executed,Executed" wgroup.long 0x14C++0x03 line.long 0x00 "PWRONCRIMP-X4,Power Resume Control Register IMP-X4" bitfld.long 0x00 0. " PWRUP ,Power-resume sequence start" "No effect,Resume" rgroup.long 0x150++0x03 line.long 0x00 "PWRONSRIMP-X4,Power Resume Status Register IMP-X4" bitfld.long 0x00 0. " UPSTATE ,Power resume sequence execution status" "Not executed,Executed" rgroup.long 0x154++0x03 line.long 0x00 "PWRERIMP-X4,Power Shutoff/Resume Error Register IMP-X4" bitfld.long 0x00 0. " ERR ,Power shutoff/resume request acceptance error" "No error,Error" tree.end tree "Power Control Registers for CA15 SCU" rgroup.long 0x180++0x3 line.long 0x00 "PWRSRCA15SCU,Power Status Register CA15 SCU" bitfld.long 0x00 4. " PWRUP ,CA15 SCU power non-shutoff status" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,CA15 SCU power shutoff status" "No,Yes" wgroup.long 0x184++0x3 line.long 0x00 "PWROFFSRCA15SCU,Power Shutoff Control Register CA15 SCU" bitfld.long 0x00 0. " PWRDWN ,Power-shutoff sequence start" "No shutoff,Shutoff" rgroup.long 0x188++0x03 line.long 0x00 "PWROFFSRCA15SCU,Power Shutoff Status Register CA15 SCU" bitfld.long 0x00 0. " DWNSTATE ,Power shutoff sequence execution status" "Not executed,Executed" wgroup.long 0x18C++0x03 line.long 0x00 "PWRONCRCA15SCU,Power Resume Control Register CA15 SCU" bitfld.long 0x00 0. " PWRUP ,Power-resume sequence start" "No effect,Resume" rgroup.long 0x190++0x03 line.long 0x00 "PWRONSRCA15SCU,Power Resume Status Register CA15 SCU" bitfld.long 0x00 0. " UPSTATE ,Power resume sequence execution status" "Not executed,Executed" rgroup.long 0x194++0x03 line.long 0x00 "PWRERCA15SCU,Power Shutoff/Resume Error Register CA15 SCU" bitfld.long 0x00 0. " ERR ,Power shutoff/resume request acceptance error" "No error,Error" tree.end width 0xb tree.end tree "CRC (Cyclic Redundancy Check)" base ad:0xE6580000 width 15. group.long 0x00++0x07 line.long 0x00 "DCRA0CIN,CRC Input Register" line.long 0x04 "DCRA0COUT,CRC Data Register" group.byte 0x20++0x00 line.byte 0x00 "DCRA0CTL,CRC Control Register" bitfld.byte 0x00 4.--5. " ISZ ,The value written to this field determines the valid bit width of input data" "32 bits,?..." bitfld.byte 0x00 0.--1. " POL ,The value written to this field determines the generator polynomial for the CRC codes" "32-bit CRC code,?..." width 0xb tree.end tree "RFSO (Failure Self-Detection Circuit)" base ad:0xE6560000 width 15. group.long 0x00++0x07 line.long 0x00 "CNT0_INI,Interval Timer Initial Value Setting Register" line.long 0x04 "CNT1_INI,Timeout Detection Timer Initial Value Setting Register" group.long 0x08++0x07 line.long 0x00 "FSO_CTL,Control Register" hexmask.long.word 0x00 16.--31. 1. " KEYCODE ,Register write enable code" bitfld.long 0x00 9. " TOE ,CNT1 (timeout detection timer) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " ITE ,CNT0 (interval timer) interrupt enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 6. " TOI ,CNT1 (timeout detection timer) interrupt request" "No interrupt,Interrupt" rbitfld.long 0x00 5. " ITI ,CNT0 (interval timer) interrupt request" "No interrupt,Interrupt" rbitfld.long 0x00 4. " TOES ,FSO_TOE pin timeout error bit status appropriate output" "Not output,Output" textline " " rbitfld.long 0x00 3. " CFES_1 ,FSO_CFE_1 pin timeout error bit status appropriate output" "Not output,Output" bitfld.long 0x00 2. " CFEO_1 ,FSO_CFE_0 pin timeout error bit status appropriate output" "Equal,Different" textline " " bitfld.long 0x00 1. " CFEO_0 ,Test routine expectant value verification result" "Equal,Different" rbitfld.long 0x00 0. " CFES_0 ,Test routine expectant value verification result on CFEO_0 = 1" "0,1" line.long 0x04 "CNT_DIV,Timer Counter Clock Frequency Division Setting Register" wgroup.long 0x10++0x03 line.long 0x00 "FSO_CMD,Command Register" hexmask.long.word 0x00 16.--31. 1. " KEYCODE ,Register write enable code" bitfld.long 0x00 3. " TOC ,CNT1 (timeout detection timer) interrupt clear" "No effect,Clear" bitfld.long 0x00 2. " ITC ,CNT0 (interval timer) interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " CNTS1 ,CNT1 (timeout detection timer) activation" "Stopped,Activated" bitfld.long 0x00 0. " CNTS0 ,CNT0 (interval timer) activation" "Stopped,Activated" rgroup.long 0x14++0x07 line.long 0x00 "CNT0_STS,Interval Timer Value Display Register" line.long 0x04 "CNT1_STS,Timeout Detection Timer Value Display Register" width 0xb tree.end tree "PC (Parity Control)" base ad:0xE6570000 width 15. group.long 0x00++0x37 line.long 0x00 "PCCR,Parity Check Control Register" bitfld.long 0x00 24. " DBSCRPGE ,DBSC Read Parity Generator Enable" "Disabled,Enabled" bitfld.long 0x00 18. " CCI4WPGE ,CCI400 Write Parity Generator Enable" "Disabled,Enabled" bitfld.long 0x00 17. " CA15WPGE ,CA15 Write Parity Generator Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CA15RPCE ,Enables or disables CA15 Read Parity Checker" "Disabled,Enabled" bitfld.long 0x00 0. " DBSCWPCE ,Enables or disables DBSC Write Parity Checker" "Disabled,Enabled" line.long 0x04 "GPIOSR,GPIO Status Register" bitfld.long 0x04 0. " PERROR ,Parity error status" "No error,Error" line.long 0x10 "WDPESR,Write Data Parity Error Status Register" bitfld.long 0x10 0. " DBSC ,Parity error status from DBSC" "No error,Error" line.long 0x14 "WSPESR,Write Strobe Parity Error Status Register" bitfld.long 0x14 0. " DBSC ,Write strobe parity error status from DBSC write parity checker" "No error,Error" line.long 0x18 "RDPESR,Read Data Parity Error Status Register" bitfld.long 0x18 1. " CA15 ,Parity error status from CA15 read parity checker" "No error,Error" line.long 0x20 "WDPEGR,Write Strobe Parity Error Generate Register" bitfld.long 0x20 0. " DBSC ,Write 1 to this bit to generate a pseudo write data parity error" "No effect,Generated" line.long 0x24 "WSPEGR,Write Strobe Parity Error Generate Register" bitfld.long 0x24 0. " DBSC ,Write 1 to this bit to generate a pseudo write strobe parity error" "No effect,Generated" line.long 0x28 "RDPEGR,Read Data Parity Error Generate Register" bitfld.long 0x28 1. " CA15 ,Write 1 to this bit to generate a pseudo read data parity error" "No effect,Generated" line.long 0x30 "CA15PEIER,CA15 Parity Error Interrupt Enable Register" bitfld.long 0x30 12. " CA15RDEIE ,CA15 read parity checker read data error interrupt enable" "Disabled,Enabled" bitfld.long 0x30 4. " DBSCWDEIE ,DBSC write parity checker write data error interrupt enable" "Disabled,Enabled" bitfld.long 0x30 0. " DBSCWSEIE ,DBSC write parity checker write strobe error interrupt enable" "Disabled,Enabled" line.long 0x34 "CA15PEISR,CA15 Parity Error Interrupt Status Register" bitfld.long 0x34 31. " ALL ,Any error occurrence interrupt flag" "No interrupt,Interrupt" bitfld.long 0x34 12. " CA15RDEIS ,CA15 read parity checker read data error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x34 4. " DBSCWDEIS ,DBSC write parity checker write data error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x34 0. " DBSCWSEIS ,DBSC write parity checker write strobe error interrupt flag" "No interrupt,Interrupt" width 0xb tree.end tree "PRR (Product Register)" base ad:0xFF000044 width 15. rgroup.long 0x00++0x03 line.long 0x00 "PRR,Product Register" hexmask.long.byte 0x00 27.--31. 1. " CA15EN ,CA15 CPU State" bitfld.long 0x00 31. " CA15EN[4] ,CA15 State" "Has two CA15 CPUs,Does not have two CA15 CPUs" bitfld.long 0x00 28. " CA15EN[1] ,CA15 CPU1 State" "Has CA15 CPU1,Does not have CA15 CPU1" textline " " bitfld.long 0x00 27. " CA15EN[0] ,CA15 CPU0 State" "Has CA15 CPU0,Does not have CA15 CPU0" hexmask.long.byte 0x00 8.--14. 1. " PRODUCT ,Product ID Number" hexmask.long.byte 0x00 0.--7. 1. " CUT ,Cut Number" width 0xb tree.end textline ""